Lines Matching defs:cpu_dyn_regs
418 struct cpu_dyn_regs { struct
419 __le32 cpu_pq_base_addr_low;
420 __le32 cpu_pq_base_addr_high;
421 __le32 cpu_pq_length;
422 __le32 cpu_pq_init_status;
423 __le32 cpu_eq_base_addr_low;
424 __le32 cpu_eq_base_addr_high;
425 __le32 cpu_eq_length;
426 __le32 cpu_eq_ci;
427 __le32 cpu_cq_base_addr_low;
428 __le32 cpu_cq_base_addr_high;
429 __le32 cpu_cq_length;
430 __le32 cpu_pf_pq_pi;
431 __le32 cpu_boot_dev_sts0;
432 __le32 cpu_boot_dev_sts1;
433 __le32 cpu_boot_err0;
434 __le32 cpu_boot_err1;
435 __le32 cpu_boot_status;
436 __le32 fw_upd_sts;
437 __le32 fw_upd_cmd;
438 __le32 fw_upd_pending_sts;
439 __le32 fuse_ver_offset;
440 __le32 preboot_ver_offset;
441 __le32 uboot_ver_offset;
442 __le32 hw_state;
443 __le32 kmd_msg_to_cpu;
444 __le32 cpu_cmd_status_to_host;
445 __le32 gic_host_pi_upd_irq;
446 __le32 gic_tpc_qm_irq_ctrl;
447 __le32 gic_mme_qm_irq_ctrl;
448 __le32 gic_dma_qm_irq_ctrl;
449 __le32 gic_nic_qm_irq_ctrl;
450 __le32 gic_dma_core_irq_ctrl;
451 __le32 gic_host_halt_irq;
452 __le32 gic_host_ints_irq;
453 __le32 gic_host_soft_rst_irq;
454 __le32 gic_rot_qm_irq_ctrl;
455 __le32 cpu_rst_status;
456 __le32 eng_arc_irq_ctrl;
457 __le32 reserved1[20]; /* reserve for future use */
567 struct cpu_dyn_regs cpu_dyn_regs; member
594 struct cpu_dyn_regs cpu_dyn_regs; member