linux/gpio/driver.h

1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/pinctrl/pinconf-generic.h>
48  * struct gpio_irq_chip - GPIO interrupt controller
54 	 * GPIO IRQ chip implementation, provided by GPIO driver.
61 	 * Interrupt translation domain; responsible for mapping between GPIO
78 	 * If non-NULL, will be set as the parent of this GPIO interrupt
90 	 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
98 	 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
99 	 * @need_valid_mask to make these GPIO lines unavailable for
113 	 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
125 	 * This optional callback is used to translate the child's GPIO line
126 	 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
136 	 * The IRQ domain operations that will be used for this GPIO IRQ
148 	 * GPIO IRQs, provided by GPIO driver.
155 	 * Default IRQ triggering type applied during GPIO driver
156 	 * initialization, provided by GPIO driver.
163 	 * Per GPIO IRQ chip lockdep class for IRQ lock.
170 	 * Per GPIO IRQ chip lockdep class for IRQ request.
177 	 * The interrupt handler for the GPIO chip's parent interrupts, may be
206 	 * The number of interrupt parents of a GPIO chip.
213 	 * A list of interrupt parents of a GPIO chip. This is owned by the
221 	 * A list of interrupt parents for each line of a GPIO chip.
243 	 * Flag to track GPIO chip irq member's initialization.
244 	 * This flag will make sure GPIO chip irq members are not used
267 	 * used if not all GPIO lines are valid interrupts. Sometimes some
270 	 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
323  * struct gpio_chip - abstract a GPIO controller
324  * @label: a functional name for the GPIO device, such as a part
325  *	number or the name of the SoC IP-block implementing it.
330  * @request: optional hook for chip-specific activation, such as
332  * @free: optional hook for chip-specific deactivation, such as
337  *	function, even on input-only or output-only gpio chips.
339  *	This can be omitted on input-only or output-only gpio chips.
341  *	This can be omitted on input-only or output-only gpio chips.
349  * @to_irq: optional hook supporting non-static gpiod_to_irq() mappings;
357  *	requires special mapping of the pins that provides GPIO functionality.
358  *	It is called after adding GPIO chip and before adding IRQ chip.
359  * @en_hw_timestamp: Dependent on GPIO chip, an optional routine to
361  * @dis_hw_timestamp: Dependent on GPIO chip, an optional routine to
363  * @base: identifies the first GPIO number handled by this chip;
365  *	DEPRECATION: providing anything non-negative and nailing the base
366  *	offset of GPIO chips is deprecated. Please pass -1 as base to
368  *	get rid of the static GPIO number space in the long run.
369  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
370  *	handled is (base + ngpio - 1).
371  * @offset: when multiple gpio chips belong to the same device this
376  *      may be NULL if there is no alias for the GPIO, however the
379  *      number of the gpio.
381  *	must while accessing GPIO expander chips over I2C or SPI. This
385  * @read_reg: reader function for generic GPIO
386  * @write_reg: writer function for generic GPIO
387  * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing
389  *	generic GPIO core. It is for internal housekeeping only.
390  * @reg_dat: data (in) register for generic GPIO
391  * @reg_set: output set register (out=high) for generic GPIO
392  * @reg_clr: output clear register (out=low) for generic GPIO
393  * @reg_dir_out: direction out setting register for generic GPIO
394  * @reg_dir_in: direction in setting register for generic GPIO
397  * @bgpio_bits: number of register bits used for a generic GPIO i.e.
399  * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
401  * @bgpio_data:	shadowed data register for generic GPIO to clear/set bits
403  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
410  * chips, dedicated GPIO expanders, and so on.
413  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
414  * are referenced through calls like gpio_get_value(gpio), the offset
415  * is calculated by subtracting @base from the gpio number.
496 	 * Integrates interrupt chip functionality with the GPIO chip. Can be
512 	 * If CONFIG_OF_GPIO is enabled, then all GPIO controllers described in
519 	 * Number of cells used to form the GPIO specifier.
526 	 * Callback to translate a device tree GPIO specifier into a chip-
527 	 * relative GPIO number and flags.
553  * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
556  * @_base:	first GPIO in the range
558  * @_label:	label of current GPIO
569 /* Iterates over all requested GPIO of the given @chip */
571 	for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
579  * gpiochip_add_data() - register a gpio_chip
580  * @gc: the chip to register, with gc->base initialized
581  * @data: driver-private data associated with this chip
586  * can be freely used, the gc->parent device must be registered before
587  * the gpio framework's arch_initcall().  Otherwise sysfs initialization
593  * If gc->base is negative, this requests dynamic assignment of
594  * a range of valid GPIOs.
598  * gc->base is invalid or already associated with a different chip.
661 	girq->chip = (struct irq_chip *)chip;  in gpio_irq_chip_set_chip()
730 	return -EINVAL;  in gpiochip_irqchip_add_domain()
740  * struct gpio_pin_range - pin range controlled by a gpio chip
743  * @range: actual range of pins controlled by a gpio controller
748 	struct pinctrl_gpio_range range;  member
817 	/* GPIO can never have been requested */  in gpiod_to_chip()
819 	return ERR_PTR(-ENODEV);  in gpiod_to_chip()
825 	return ERR_PTR(-ENODEV);  in gpiod_to_gpio_device()
831 	return -ENODEV;  in gpio_device_get_base()
844 	return -EINVAL;  in gpiochip_lock_as_irq()
856 		if (!fwnode_property_present(child, "gpio-controller")) {} else