Lines Matching defs:SRC
96 #define BPF_ALU64_REG_OFF(OP, DST, SRC, OFF) \
100 .src_reg = SRC, \
104 #define BPF_ALU64_REG(OP, DST, SRC) \
105 BPF_ALU64_REG_OFF(OP, DST, SRC, 0)
107 #define BPF_ALU32_REG_OFF(OP, DST, SRC, OFF) \
111 .src_reg = SRC, \
115 #define BPF_ALU32_REG(OP, DST, SRC) \
116 BPF_ALU32_REG_OFF(OP, DST, SRC, 0)
162 #define BPF_MOV64_REG(DST, SRC) \
166 .src_reg = SRC, \
170 #define BPF_MOV32_REG(DST, SRC) \
174 .src_reg = SRC, \
198 #define BPF_MOVSX64_REG(DST, SRC, OFF) \
202 .src_reg = SRC, \
206 #define BPF_MOVSX32_REG(DST, SRC, OFF) \
210 .src_reg = SRC, \
232 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \
236 .src_reg = SRC, \
252 #define BPF_MOV64_RAW(TYPE, DST, SRC, IMM) \
256 .src_reg = SRC, \
260 #define BPF_MOV32_RAW(TYPE, DST, SRC, IMM) \
264 .src_reg = SRC, \
280 #define BPF_LD_IND(SIZE, SRC, IMM) \
284 .src_reg = SRC, \
290 #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \
294 .src_reg = SRC, \
300 #define BPF_LDX_MEMSX(SIZE, DST, SRC, OFF) \
304 .src_reg = SRC, \
310 #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \
314 .src_reg = SRC, \
334 #define BPF_ATOMIC_OP(SIZE, OP, DST, SRC, OFF) \
338 .src_reg = SRC, \
343 #define BPF_STX_XADD(SIZE, DST, SRC, OFF) BPF_ATOMIC_OP(SIZE, BPF_ADD, DST, SRC, OFF)
357 #define BPF_JMP_REG(OP, DST, SRC, OFF) \
361 .src_reg = SRC, \
377 #define BPF_JMP32_REG(OP, DST, SRC, OFF) \
381 .src_reg = SRC, \
429 #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \
433 .src_reg = SRC, \