Lines Matching +full:dp +full:- +full:aux +full:- +full:bus
47 int drm_dp_read_clock_recovery_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
49 int drm_dp_read_channel_eq_delay(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE],
52 void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,
55 void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
57 void drm_dp_lttpr_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
60 int drm_dp_128b132b_read_aux_rd_interval(struct drm_dp_aux *aux);
75 * struct drm_dp_vsc_sdp - drm DP VSC SDP
77 * This structure represents a DP VSC SDP of drm
78 * It is based on DP 1.4 spec [Table 2-116: VSC SDP Header Bytes] and
79 * [Table 2-117: VSC SDP Payload for DB16 through DB18]
81 * @sdp_type: secondary-data packet type
88 * @content_type: CTA-861-G defines content types and expected processing by a sink device
166 /* DP/eDP DSC support */
177 return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & in drm_dp_sink_supports_dsc()
184 return dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] | in drm_edp_dsc_sink_output_bpp()
185 ((dsc_dpcd[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] & in drm_edp_dsc_sink_output_bpp()
193 return dsc_dpcd[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] * in drm_dp_dsc_sink_max_slice_width()
198 * drm_dp_dsc_sink_supports_format() - check if sink supports DSC with given output format
199 * @dsc_dpcd : DSC-capability DPCDs of the sink
207 return dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] & output_format; in drm_dp_dsc_sink_supports_format()
210 /* Forward Error Correction Support on DP 1.4 */
230 /* Ignore MSA timing for Adaptive Sync support on DP 1.4 */
239 * drm_edp_backlight_supported() - Check an eDP DPCD for VESA backlight support
256 * drm_dp_is_uhbr_rate - Determine if a link rate is UHBR
269 * DisplayPort AUX channel
273 * struct drm_dp_aux_msg - DisplayPort AUX channel transaction
293 * struct drm_dp_aux_cec - DisplayPort CEC-Tunneling-over-AUX
295 * @adap: the CEC adapter for CEC-Tunneling-over-AUX support.
307 * struct drm_dp_aux - DisplayPort AUX channel
309 * An AUX channel can also be used to transport I2C messages to a sink. A
321 * @name: user-visible name of this AUX channel and the
322 * I2C-over-AUX adapter.
330 * @ddc: I2C adapter that can be used for I2C-over-AUX
337 * AUX channel.
342 * @drm_dev: pointer to the &drm_device that owns this AUX channel.
346 * It should be set to the &drm_device that will be using this AUX
356 * AUX channel
380 * @transfer: transfers a message representing a single AUX
383 * This is a hardware-specific implementation of how
389 * were transferred, or a negative error-code on failure.
392 * the %-EBUSY error, which causes a transaction to be retried.
393 * On a short, helpers will return %-EPROTO to make it simpler
404 * - If the @dev providing the AUX bus is currently unpowered then
407 * - If we're on eDP (using a drm_panel) and the panel is not in a
412 * drm_panel driver is initiating a DP AUX transfer it may power
417 ssize_t (*transfer)(struct drm_dp_aux *aux,
430 * the logic in the DP controller has a long debouncing time. The
432 * DP controller is ready to send AUX transactions.
434 * This function returns 0 if HPD was asserted or -ETIMEDOUT if time
443 * that's associated with the DP AUX channel. This is different from
448 int (*wait_hpd_asserted)(struct drm_dp_aux *aux, unsigned long wait_us);
451 * @i2c_nack_count: Counts I2C NACKs, used for DP validation.
455 * @i2c_defer_count: Counts I2C DEFERs, used for DP validation.
459 * @cec: struct containing fields used for CEC-Tunneling-over-AUX.
463 * @is_remote: Is this AUX CH actually using sideband messaging.
468 int drm_dp_dpcd_probe(struct drm_dp_aux *aux, unsigned int offset);
469 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
471 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
475 * drm_dp_dpcd_readb() - read a single byte from the DPCD
476 * @aux: DisplayPort AUX channel
483 static inline ssize_t drm_dp_dpcd_readb(struct drm_dp_aux *aux, in drm_dp_dpcd_readb() argument
486 return drm_dp_dpcd_read(aux, offset, valuep, 1); in drm_dp_dpcd_readb()
490 * drm_dp_dpcd_writeb() - write a single byte to the DPCD
491 * @aux: DisplayPort AUX channel
498 static inline ssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux, in drm_dp_dpcd_writeb() argument
501 return drm_dp_dpcd_write(aux, offset, &value, 1); in drm_dp_dpcd_writeb()
504 int drm_dp_read_dpcd_caps(struct drm_dp_aux *aux,
507 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
510 int drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux,
514 bool drm_dp_send_real_edid_checksum(struct drm_dp_aux *aux,
517 int drm_dp_read_downstream_info(struct drm_dp_aux *aux,
543 int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]);
548 struct drm_dp_aux *aux);
561 int drm_dp_read_sink_count(struct drm_dp_aux *aux);
563 int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux,
566 int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux,
576 void drm_dp_remote_aux_init(struct drm_dp_aux *aux);
577 void drm_dp_aux_init(struct drm_dp_aux *aux);
578 int drm_dp_aux_register(struct drm_dp_aux *aux);
579 void drm_dp_aux_unregister(struct drm_dp_aux *aux);
581 int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc);
582 int drm_dp_stop_crc(struct drm_dp_aux *aux);
593 * struct drm_dp_desc - DP branch/sink device descriptor
594 * @ident: DP device identification from DPCD 0x400 (sink) or 0x500 (branch).
602 int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc,
606 * enum drm_dp_quirk - Display Port sink/branch device specific quirks
630 * The device does not set SINK_COUNT to a non-zero value.
639 * The DSC caps can be read from the physical aux instead.
659 * drm_dp_has_quirk() - does the DP device have a specific quirk
663 * Return true if DP device identified by @desc has @quirk.
668 return desc->quirks & BIT(quirk); in drm_dp_has_quirk()
672 * struct drm_edp_backlight_info - Probed eDP backlight info struct
674 * @pwm_freq_pre_divider: The PWM frequency pre-divider value being used for this backlight, if any
677 * @aux_enable: Does the panel support the AUX enable cap?
678 * @aux_set: Does the panel support setting the brightness through AUX?
694 drm_edp_backlight_init(struct drm_dp_aux *aux, struct drm_edp_backlight_info *bl,
697 int drm_edp_backlight_set_level(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl,
699 int drm_edp_backlight_enable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl,
701 int drm_edp_backlight_disable(struct drm_dp_aux *aux, const struct drm_edp_backlight_info *bl);
706 int drm_panel_dp_aux_backlight(struct drm_panel *panel, struct drm_dp_aux *aux);
711 struct drm_dp_aux *aux) in drm_panel_dp_aux_backlight() argument
719 void drm_dp_cec_irq(struct drm_dp_aux *aux);
720 void drm_dp_cec_register_connector(struct drm_dp_aux *aux,
722 void drm_dp_cec_unregister_connector(struct drm_dp_aux *aux);
723 void drm_dp_cec_attach(struct drm_dp_aux *aux, u16 source_physical_address);
724 void drm_dp_cec_set_edid(struct drm_dp_aux *aux, const struct edid *edid);
725 void drm_dp_cec_unset_edid(struct drm_dp_aux *aux);
727 static inline void drm_dp_cec_irq(struct drm_dp_aux *aux) in drm_dp_cec_irq() argument
732 drm_dp_cec_register_connector(struct drm_dp_aux *aux, in drm_dp_cec_register_connector() argument
737 static inline void drm_dp_cec_unregister_connector(struct drm_dp_aux *aux) in drm_dp_cec_unregister_connector() argument
741 static inline void drm_dp_cec_attach(struct drm_dp_aux *aux, in drm_dp_cec_attach() argument
746 static inline void drm_dp_cec_set_edid(struct drm_dp_aux *aux, in drm_dp_cec_set_edid() argument
751 static inline void drm_dp_cec_unset_edid(struct drm_dp_aux *aux) in drm_dp_cec_unset_edid() argument
758 * struct drm_dp_phy_test_params - DP Phy Compliance parameters
761 * @phy_pattern: DP Phy test pattern from DPCD 0x248
762 * @hbr2_reset: DP HBR2_COMPLIANCE_SCRAMBLER_RESET from DCPD 0x24A and 0x24B
763 * @custom80: DP Test_80BIT_CUSTOM_PATTERN from DPCDs 0x250 through 0x259
775 int drm_dp_get_phy_test_pattern(struct drm_dp_aux *aux,
777 int drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux,
781 int drm_dp_pcon_frl_prepare(struct drm_dp_aux *aux, bool enable_frl_ready_hpd);
782 bool drm_dp_pcon_is_frl_ready(struct drm_dp_aux *aux);
783 int drm_dp_pcon_frl_configure_1(struct drm_dp_aux *aux, int max_frl_gbps,
785 int drm_dp_pcon_frl_configure_2(struct drm_dp_aux *aux, int max_frl_mask,
787 int drm_dp_pcon_reset_frl_config(struct drm_dp_aux *aux);
788 int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux);
790 bool drm_dp_pcon_hdmi_link_active(struct drm_dp_aux *aux);
791 int drm_dp_pcon_hdmi_link_mode(struct drm_dp_aux *aux, u8 *frl_trained_mask);
792 void drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux,
798 int drm_dp_pcon_pps_default(struct drm_dp_aux *aux);
799 int drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128]);
800 int drm_dp_pcon_pps_override_param(struct drm_dp_aux *aux, u8 pps_param[6]);
803 int drm_dp_pcon_convert_rgb_to_ycbcr(struct drm_dp_aux *aux, u8 color_spc);