Lines Matching +full:ignore +full:- +full:power +full:- +full:on +full:- +full:sel
1 // SPDX-License-Identifier: GPL-2.0
20 #include <linux/dma-mapping.h>
23 #include "xhci-trace.h"
24 #include "xhci-debugfs.h"
25 #include "xhci-dbgcap.h"
32 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
35 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 struct xhci_segment *seg = ring->first_seg; in td_on_ring()
45 if (!td || !td->start_seg) in td_on_ring()
48 if (seg == td->start_seg) in td_on_ring()
50 seg = seg->next; in td_on_ring()
51 } while (seg && seg != ring->first_seg); in td_on_ring()
57 * xhci_handshake - spin reading hc until handshake completes or fails
63 * Returns negative errno, or zero on success
67 * hardware flakeout), or the register reads as all-ones (hardware removed).
79 return -ENODEV; in xhci_handshake()
85 * xhci_handshake_check_state - same as xhci_handshake but takes an additional
98 xhci->xhc_state & exit_state, in xhci_handshake_check_state()
101 if (result == U32_MAX || xhci->xhc_state & exit_state) in xhci_handshake_check_state()
102 return -ENODEV; in xhci_handshake_check_state()
117 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce()
121 cmd = readl(&xhci->op_regs->command); in xhci_quiesce()
123 writel(cmd, &xhci->op_regs->command); in xhci_quiesce()
141 ret = xhci_handshake(&xhci->op_regs->status, in xhci_halt()
148 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_halt()
149 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_halt()
162 temp = readl(&xhci->op_regs->command); in xhci_start()
164 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.", in xhci_start()
166 writel(temp, &xhci->op_regs->command); in xhci_start()
172 ret = xhci_handshake(&xhci->op_regs->status, in xhci_start()
174 if (ret == -ETIMEDOUT) in xhci_start()
180 xhci->xhc_state = 0; in xhci_start()
181 xhci->run_graceperiod = jiffies + msecs_to_jiffies(500); in xhci_start()
200 state = readl(&xhci->op_regs->status); in xhci_reset()
204 return -ENODEV; in xhci_reset()
213 command = readl(&xhci->op_regs->command); in xhci_reset()
215 writel(command, &xhci->op_regs->command); in xhci_reset()
224 if (xhci->quirks & XHCI_INTEL_HOST) in xhci_reset()
227 ret = xhci_handshake_check_state(xhci, &xhci->op_regs->command, in xhci_reset()
232 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_reset()
233 usb_asmedia_modifyflowcontrol(to_pci_dev(xhci_to_hcd(xhci)->self.controller)); in xhci_reset()
241 ret = xhci_handshake(&xhci->op_regs->status, STS_CNR, 0, timeout_us); in xhci_reset()
243 xhci->usb2_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
244 xhci->usb2_rhub.bus_state.suspended_ports = 0; in xhci_reset()
245 xhci->usb2_rhub.bus_state.resuming_ports = 0; in xhci_reset()
246 xhci->usb3_rhub.bus_state.port_c_suspend = 0; in xhci_reset()
247 xhci->usb3_rhub.bus_state.suspended_ports = 0; in xhci_reset()
248 xhci->usb3_rhub.bus_state.resuming_ports = 0; in xhci_reset()
255 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_zero_64b_regs()
276 if (!(xhci->quirks & XHCI_ZERO_64B_REGS) || !domain || in xhci_zero_64b_regs()
277 domain->type == IOMMU_DOMAIN_IDENTITY) in xhci_zero_64b_regs()
283 val = readl(&xhci->op_regs->command); in xhci_zero_64b_regs()
285 writel(val, &xhci->op_regs->command); in xhci_zero_64b_regs()
288 val = readl(&xhci->op_regs->status); in xhci_zero_64b_regs()
290 writel(val, &xhci->op_regs->status); in xhci_zero_64b_regs()
293 val = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
295 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr); in xhci_zero_64b_regs()
296 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
298 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring); in xhci_zero_64b_regs()
300 intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1), in xhci_zero_64b_regs()
301 ARRAY_SIZE(xhci->run_regs->ir_set)); in xhci_zero_64b_regs()
306 ir = &xhci->run_regs->ir_set[i]; in xhci_zero_64b_regs()
307 val = xhci_read_64(xhci, &ir->erst_base); in xhci_zero_64b_regs()
309 xhci_write_64(xhci, 0, &ir->erst_base); in xhci_zero_64b_regs()
310 val= xhci_read_64(xhci, &ir->erst_dequeue); in xhci_zero_64b_regs()
312 xhci_write_64(xhci, 0, &ir->erst_dequeue); in xhci_zero_64b_regs()
315 /* Wait for the fault to appear. It will be cleared on reset */ in xhci_zero_64b_regs()
316 err = xhci_handshake(&xhci->op_regs->status, in xhci_zero_64b_regs()
327 if (!ir || !ir->ir_set) in xhci_enable_interrupter()
328 return -EINVAL; in xhci_enable_interrupter()
330 iman = readl(&ir->ir_set->irq_pending); in xhci_enable_interrupter()
331 writel(ER_IRQ_ENABLE(iman), &ir->ir_set->irq_pending); in xhci_enable_interrupter()
340 if (!ir || !ir->ir_set) in xhci_disable_interrupter()
341 return -EINVAL; in xhci_disable_interrupter()
343 iman = readl(&ir->ir_set->irq_pending); in xhci_disable_interrupter()
344 writel(ER_IRQ_DISABLE(iman), &ir->ir_set->irq_pending); in xhci_disable_interrupter()
358 rhub = &xhci->usb3_rhub; in compliance_mode_recovery()
359 hcd = rhub->hcd; in compliance_mode_recovery()
364 for (i = 0; i < rhub->num_ports; i++) { in compliance_mode_recovery()
365 temp = readl(rhub->ports[i]->addr); in compliance_mode_recovery()
372 "Compliance mode detected->port %d", in compliance_mode_recovery()
377 if (hcd->state == HC_STATE_SUSPENDED) in compliance_mode_recovery()
384 if (xhci->port_status_u0 != ((1 << rhub->num_ports) - 1)) in compliance_mode_recovery()
385 mod_timer(&xhci->comp_mode_recovery_timer, in compliance_mode_recovery()
390 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
397 * this quirk is needed on systems that have the failing hardware installed.
401 xhci->port_status_u0 = 0; in compliance_mode_recovery_timer_init()
402 timer_setup(&xhci->comp_mode_recovery_timer, compliance_mode_recovery, in compliance_mode_recovery_timer_init()
404 xhci->comp_mode_recovery_timer.expires = jiffies + in compliance_mode_recovery_timer_init()
407 add_timer(&xhci->comp_mode_recovery_timer); in compliance_mode_recovery_timer_init()
414 * USB3.0 re-driver and that need the Compliance Mode Quirk.
416 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
427 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard"))) in xhci_compliance_mode_recovery_timer_quirk_check()
441 return (xhci->port_status_u0 == ((1 << xhci->usb3_rhub.num_ports) - 1)); in xhci_all_ports_seen_u0()
446 * Initialize memory for HCD and xHC (one-time init).
458 spin_lock_init(&xhci->lock); in xhci_init()
459 if (xhci->hci_version == 0x95 && link_quirk) { in xhci_init()
462 xhci->quirks |= XHCI_LINK_TRB_QUIRK; in xhci_init()
472 xhci->quirks |= XHCI_COMP_MODE_QUIRK; in xhci_init()
479 /*-------------------------------------------------------------------------*/
483 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_run_finished()
491 spin_lock_irqsave(&xhci->lock, flags); in xhci_run_finished()
494 temp = readl(&xhci->op_regs->command); in xhci_run_finished()
496 writel(temp, &xhci->op_regs->command); in xhci_run_finished()
503 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_run_finished()
504 return -ENODEV; in xhci_run_finished()
507 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING; in xhci_run_finished()
509 if (xhci->quirks & XHCI_NEC_HOST) in xhci_run_finished()
512 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_run_finished()
527 * Setup MSI-X vectors and enable interrupts.
535 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_run()
540 hcd->uses_new_polling = 1; in xhci_run()
546 temp_64 = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); in xhci_run()
553 temp = readl(&ir->ir_set->irq_control); in xhci_run()
555 temp |= (xhci->imod_interval / 250) & ER_IRQ_INTERVAL_MASK; in xhci_run()
556 writel(temp, &ir->ir_set->irq_control); in xhci_run()
558 if (xhci->quirks & XHCI_NEC_HOST) { in xhci_run()
563 return -ENOMEM; in xhci_run()
580 set_bit(HCD_FLAG_DEFER_RH_REGISTER, &hcd->flags); in xhci_run()
599 struct xhci_interrupter *ir = xhci->interrupters[0]; in xhci_stop()
601 mutex_lock(&xhci->mutex); in xhci_stop()
605 mutex_unlock(&xhci->mutex); in xhci_stop()
611 spin_lock_irq(&xhci->lock); in xhci_stop()
612 xhci->xhc_state |= XHCI_STATE_HALTED; in xhci_stop()
613 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED; in xhci_stop()
616 spin_unlock_irq(&xhci->lock); in xhci_stop()
619 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_stop()
621 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_stop()
627 if (xhci->quirks & XHCI_AMD_PLL_FIX) in xhci_stop()
632 temp = readl(&xhci->op_regs->status); in xhci_stop()
633 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_stop()
640 "xhci_stop completed - status = %x", in xhci_stop()
641 readl(&xhci->op_regs->status)); in xhci_stop()
642 mutex_unlock(&xhci->mutex); in xhci_stop()
647 * Shutdown HC (not bus-specific)
659 if (xhci->quirks & XHCI_SPURIOUS_REBOOT) in xhci_shutdown()
660 usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); in xhci_shutdown()
664 __func__, hcd->self.busnum); in xhci_shutdown()
665 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_shutdown()
666 del_timer_sync(&hcd->rh_timer); in xhci_shutdown()
668 if (xhci->shared_hcd) { in xhci_shutdown()
669 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_shutdown()
670 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_shutdown()
673 spin_lock_irq(&xhci->lock); in xhci_shutdown()
678 * firmware delay in ADL-P PCH if port are left in U3 at shutdown in xhci_shutdown()
680 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP || in xhci_shutdown()
681 xhci->quirks & XHCI_RESET_TO_DEFAULT) in xhci_shutdown()
684 spin_unlock_irq(&xhci->lock); in xhci_shutdown()
687 "xhci_shutdown completed - status = %x", in xhci_shutdown()
688 readl(&xhci->op_regs->status)); in xhci_shutdown()
698 xhci->s3.command = readl(&xhci->op_regs->command); in xhci_save_registers()
699 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); in xhci_save_registers()
700 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_save_registers()
701 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); in xhci_save_registers()
705 for (i = 0; i < xhci->max_interrupters; i++) { in xhci_save_registers()
706 ir = xhci->interrupters[i]; in xhci_save_registers()
710 ir->s3_erst_size = readl(&ir->ir_set->erst_size); in xhci_save_registers()
711 ir->s3_erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); in xhci_save_registers()
712 ir->s3_erst_dequeue = xhci_read_64(xhci, &ir->ir_set->erst_dequeue); in xhci_save_registers()
713 ir->s3_irq_pending = readl(&ir->ir_set->irq_pending); in xhci_save_registers()
714 ir->s3_irq_control = readl(&ir->ir_set->irq_control); in xhci_save_registers()
723 writel(xhci->s3.command, &xhci->op_regs->command); in xhci_restore_registers()
724 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); in xhci_restore_registers()
725 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); in xhci_restore_registers()
726 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); in xhci_restore_registers()
729 for (i = 0; i < xhci->max_interrupters; i++) { in xhci_restore_registers()
730 ir = xhci->interrupters[i]; in xhci_restore_registers()
734 writel(ir->s3_erst_size, &ir->ir_set->erst_size); in xhci_restore_registers()
735 xhci_write_64(xhci, ir->s3_erst_base, &ir->ir_set->erst_base); in xhci_restore_registers()
736 xhci_write_64(xhci, ir->s3_erst_dequeue, &ir->ir_set->erst_dequeue); in xhci_restore_registers()
737 writel(ir->s3_irq_pending, &ir->ir_set->irq_pending); in xhci_restore_registers()
738 writel(ir->s3_irq_control, &ir->ir_set->irq_control); in xhci_restore_registers()
747 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
749 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, in xhci_set_cmd_ring_deq()
750 xhci->cmd_ring->dequeue) & in xhci_set_cmd_ring_deq()
752 xhci->cmd_ring->cycle_state; in xhci_set_cmd_ring_deq()
756 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); in xhci_set_cmd_ring_deq()
763 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
766 * middle of the ring (TRBs are 16-byte aligned).
773 ring = xhci->cmd_ring; in xhci_clear_command_ring()
774 seg = ring->deq_seg; in xhci_clear_command_ring()
776 memset(seg->trbs, 0, in xhci_clear_command_ring()
777 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); in xhci_clear_command_ring()
778 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= in xhci_clear_command_ring()
780 seg = seg->next; in xhci_clear_command_ring()
781 } while (seg != ring->deq_seg); in xhci_clear_command_ring()
784 ring->deq_seg = ring->first_seg; in xhci_clear_command_ring()
785 ring->dequeue = ring->first_seg->trbs; in xhci_clear_command_ring()
786 ring->enq_seg = ring->deq_seg; in xhci_clear_command_ring()
787 ring->enqueue = ring->dequeue; in xhci_clear_command_ring()
789 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; in xhci_clear_command_ring()
794 ring->cycle_state = 1; in xhci_clear_command_ring()
798 * Yes, this will need to be re-written after resume, but we're paranoid in xhci_clear_command_ring()
823 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_hub_port_wake()
825 for (i = 0; i < rhub->num_ports; i++) { in xhci_disable_hub_port_wake()
826 portsc = readl(rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
839 writel(t2, rhub->ports[i]->addr); in xhci_disable_hub_port_wake()
840 xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n", in xhci_disable_hub_port_wake()
841 rhub->hcd->self.busnum, i + 1, portsc, t2); in xhci_disable_hub_port_wake()
844 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_hub_port_wake()
854 status = readl(&xhci->op_regs->status); in xhci_pending_portevent()
863 port_index = xhci->usb2_rhub.num_ports; in xhci_pending_portevent()
864 ports = xhci->usb2_rhub.ports; in xhci_pending_portevent()
865 while (port_index--) { in xhci_pending_portevent()
866 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
871 port_index = xhci->usb3_rhub.num_ports; in xhci_pending_portevent()
872 ports = xhci->usb3_rhub.ports; in xhci_pending_portevent()
873 while (port_index--) { in xhci_pending_portevent()
874 portsc = readl(ports[port_index]->addr); in xhci_pending_portevent()
883 * Stop HC (not bus-specific)
896 if (!hcd->state) in xhci_suspend()
899 if (hcd->state != HC_STATE_SUSPENDED || in xhci_suspend()
900 (xhci->shared_hcd && xhci->shared_hcd->state != HC_STATE_SUSPENDED)) in xhci_suspend()
901 return -EINVAL; in xhci_suspend()
903 /* Clear root port wake on bits if wakeup not allowed. */ in xhci_suspend()
904 xhci_disable_hub_port_wake(xhci, &xhci->usb3_rhub, do_wakeup); in xhci_suspend()
905 xhci_disable_hub_port_wake(xhci, &xhci->usb2_rhub, do_wakeup); in xhci_suspend()
912 /* Don't poll the roothubs on bus suspend. */ in xhci_suspend()
914 __func__, hcd->self.busnum); in xhci_suspend()
915 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_suspend()
916 del_timer_sync(&hcd->rh_timer); in xhci_suspend()
917 if (xhci->shared_hcd) { in xhci_suspend()
918 clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_suspend()
919 del_timer_sync(&xhci->shared_hcd->rh_timer); in xhci_suspend()
922 if (xhci->quirks & XHCI_SUSPEND_DELAY) in xhci_suspend()
925 spin_lock_irq(&xhci->lock); in xhci_suspend()
926 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_suspend()
927 if (xhci->shared_hcd) in xhci_suspend()
928 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_suspend()
933 command = readl(&xhci->op_regs->command); in xhci_suspend()
935 writel(command, &xhci->op_regs->command); in xhci_suspend()
938 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1; in xhci_suspend()
940 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
943 spin_unlock_irq(&xhci->lock); in xhci_suspend()
944 return -ETIMEDOUT; in xhci_suspend()
952 command = readl(&xhci->op_regs->command); in xhci_suspend()
954 writel(command, &xhci->op_regs->command); in xhci_suspend()
955 xhci->broken_suspend = 0; in xhci_suspend()
956 if (xhci_handshake(&xhci->op_regs->status, in xhci_suspend()
967 res = readl(&xhci->op_regs->status); in xhci_suspend()
968 if ((xhci->quirks & XHCI_SNPS_BROKEN_SUSPEND) && in xhci_suspend()
971 xhci->broken_suspend = 1; in xhci_suspend()
974 spin_unlock_irq(&xhci->lock); in xhci_suspend()
975 return -ETIMEDOUT; in xhci_suspend()
978 spin_unlock_irq(&xhci->lock); in xhci_suspend()
984 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_suspend()
986 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_suspend()
997 * start xHC (not bus-specific)
1013 if (!hcd->state) in xhci_resume()
1020 if (time_before(jiffies, xhci->usb2_rhub.bus_state.next_statechange) || in xhci_resume()
1021 time_before(jiffies, xhci->usb3_rhub.bus_state.next_statechange)) in xhci_resume()
1024 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); in xhci_resume()
1025 if (xhci->shared_hcd) in xhci_resume()
1026 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); in xhci_resume()
1028 spin_lock_irq(&xhci->lock); in xhci_resume()
1030 if (hibernated || xhci->quirks & XHCI_RESET_ON_RESUME || xhci->broken_suspend) in xhci_resume()
1035 * Some controllers might lose power during suspend, so wait in xhci_resume()
1038 retval = xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1043 spin_unlock_irq(&xhci->lock); in xhci_resume()
1052 command = readl(&xhci->op_regs->command); in xhci_resume()
1054 writel(command, &xhci->op_regs->command); in xhci_resume()
1060 if (xhci_handshake(&xhci->op_regs->status, in xhci_resume()
1063 spin_unlock_irq(&xhci->lock); in xhci_resume()
1064 return -ETIMEDOUT; in xhci_resume()
1068 temp = readl(&xhci->op_regs->status); in xhci_resume()
1070 /* re-initialize the HC on Restore Error, or Host Controller Error */ in xhci_resume()
1072 !(xhci->xhc_state & XHCI_STATE_REMOVING)) { in xhci_resume()
1074 if (!xhci->broken_suspend) in xhci_resume()
1079 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && in xhci_resume()
1081 del_timer_sync(&xhci->comp_mode_recovery_timer); in xhci_resume()
1086 /* Let the USB core know _both_ roothubs lost power. */ in xhci_resume()
1087 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); in xhci_resume()
1088 if (xhci->shared_hcd) in xhci_resume()
1089 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); in xhci_resume()
1095 spin_unlock_irq(&xhci->lock); in xhci_resume()
1100 temp = readl(&xhci->op_regs->status); in xhci_resume()
1101 writel((temp & ~0x1fff) | STS_EINT, &xhci->op_regs->status); in xhci_resume()
1102 xhci_disable_interrupter(xhci->interrupters[0]); in xhci_resume()
1107 xhci_dbg(xhci, "xhci_stop completed - status = %x\n", in xhci_resume()
1108 readl(&xhci->op_regs->status)); in xhci_resume()
1122 if (!retval && xhci->shared_hcd) { in xhci_resume()
1124 retval = xhci_run(xhci->shared_hcd); in xhci_resume()
1127 hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1128 if (xhci->shared_hcd) in xhci_resume()
1129 xhci->shared_hcd->state = HC_STATE_SUSPENDED; in xhci_resume()
1134 command = readl(&xhci->op_regs->command); in xhci_resume()
1136 writel(command, &xhci->op_regs->command); in xhci_resume()
1137 xhci_handshake(&xhci->op_regs->status, STS_HALT, in xhci_resume()
1149 spin_unlock_irq(&xhci->lock); in xhci_resume()
1161 if (xhci->usb3_rhub.bus_state.suspended_ports || in xhci_resume()
1162 xhci->usb3_rhub.bus_state.bus_suspended) in xhci_resume()
1174 if (xhci->shared_hcd) in xhci_resume()
1175 usb_hcd_resume_root_hub(xhci->shared_hcd); in xhci_resume()
1181 * be re-initialized Always after a system resume. Ports are subject in xhci_resume()
1185 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running) in xhci_resume()
1188 if (xhci->quirks & XHCI_ASMEDIA_MODIFY_FLOWCONTROL) in xhci_resume()
1189 usb_asmedia_modifyflowcontrol(to_pci_dev(hcd->self.controller)); in xhci_resume()
1191 /* Re-enable port polling. */ in xhci_resume()
1193 __func__, hcd->self.busnum); in xhci_resume()
1194 if (xhci->shared_hcd) { in xhci_resume()
1195 set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); in xhci_resume()
1196 usb_hcd_poll_rh_status(xhci->shared_hcd); in xhci_resume()
1198 set_bit(HCD_FLAG_POLL_RH, &hcd->flags); in xhci_resume()
1206 /*-------------------------------------------------------------------------*/
1216 buf_len = urb->transfer_buffer_length; in xhci_map_temp_buffer()
1219 dev_to_node(hcd->self.sysdev)); in xhci_map_temp_buffer()
1222 sg_pcopy_to_buffer(urb->sg, urb->num_sgs, in xhci_map_temp_buffer()
1225 urb->transfer_buffer = temp; in xhci_map_temp_buffer()
1226 urb->transfer_dma = dma_map_single(hcd->self.sysdev, in xhci_map_temp_buffer()
1227 urb->transfer_buffer, in xhci_map_temp_buffer()
1228 urb->transfer_buffer_length, in xhci_map_temp_buffer()
1231 if (dma_mapping_error(hcd->self.sysdev, in xhci_map_temp_buffer()
1232 urb->transfer_dma)) { in xhci_map_temp_buffer()
1233 ret = -EAGAIN; in xhci_map_temp_buffer()
1236 urb->transfer_flags |= URB_DMA_MAP_SINGLE; in xhci_map_temp_buffer()
1253 tail_sg = urb->sg; in xhci_urb_temp_buffer_required()
1254 max_pkt = usb_endpoint_maxp(&urb->ep->desc); in xhci_urb_temp_buffer_required()
1256 if (!urb->num_sgs) in xhci_urb_temp_buffer_required()
1259 if (urb->dev->speed >= USB_SPEED_SUPER) in xhci_urb_temp_buffer_required()
1264 if (urb->transfer_buffer_length != 0 && in xhci_urb_temp_buffer_required()
1265 !(urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP)) { in xhci_urb_temp_buffer_required()
1266 for_each_sg(urb->sg, sg, urb->num_sgs, i) { in xhci_urb_temp_buffer_required()
1267 len = len + sg->length; in xhci_urb_temp_buffer_required()
1268 if (i > trb_size - 2) { in xhci_urb_temp_buffer_required()
1269 len = len - tail_sg->length; in xhci_urb_temp_buffer_required()
1290 buf_len = urb->transfer_buffer_length; in xhci_unmap_temp_buf()
1293 (urb->transfer_flags & URB_DMA_MAP_SINGLE)) in xhci_unmap_temp_buf()
1294 dma_unmap_single(hcd->self.sysdev, in xhci_unmap_temp_buf()
1295 urb->transfer_dma, in xhci_unmap_temp_buf()
1296 urb->transfer_buffer_length, in xhci_unmap_temp_buf()
1300 len = sg_pcopy_from_buffer(urb->sg, urb->num_sgs, in xhci_unmap_temp_buf()
1301 urb->transfer_buffer, in xhci_unmap_temp_buf()
1307 urb->actual_length = len; in xhci_unmap_temp_buf()
1310 urb->transfer_flags &= ~URB_DMA_MAP_SINGLE; in xhci_unmap_temp_buf()
1311 kfree(urb->transfer_buffer); in xhci_unmap_temp_buf()
1312 urb->transfer_buffer = NULL; in xhci_unmap_temp_buf()
1318 * transfers up to 8 bytes on output endpoints of any kind with wMaxPacketSize
1331 if (xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) { in xhci_map_urb_for_dma()
1345 if (urb->num_sgs && (urb->transfer_flags & URB_DMA_MAP_SINGLE)) in xhci_unmap_urb_for_dma()
1348 if ((xhci->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK) && unmap_temp_buf) in xhci_unmap_urb_for_dma()
1355 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1359 * Index = (epnum * 2) + direction - 1,
1362 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1371 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; in xhci_get_endpoint_index()
1403 return fls(added_ctxs) - 1; in xhci_last_valid_endpoint()
1407 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1417 return -EINVAL; in xhci_check_args()
1419 if (!udev->parent) { in xhci_check_args()
1426 if (!udev->slot_id || !xhci->devs[udev->slot_id]) { in xhci_check_args()
1429 return -EINVAL; in xhci_check_args()
1432 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_args()
1433 if (virt_dev->udev != udev) { in xhci_check_args()
1436 return -EINVAL; in xhci_check_args()
1440 if (xhci->xhc_state & XHCI_STATE_HALTED) in xhci_check_args()
1441 return -ENODEV; in xhci_check_args()
1454 * we need to issue an evaluate context command and wait on it.
1465 ep_ctx = xhci_get_ep_ctx(xhci, vdev->out_ctx, 0); in xhci_check_ep0_maxpacket()
1466 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); in xhci_check_ep0_maxpacket()
1467 max_packet_size = usb_endpoint_maxp(&vdev->udev->ep0.desc); in xhci_check_ep0_maxpacket()
1487 return -ENOMEM; in xhci_check_ep0_maxpacket()
1489 command->in_ctx = vdev->in_ctx; in xhci_check_ep0_maxpacket()
1490 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_ep0_maxpacket()
1494 ret = -ENOMEM; in xhci_check_ep0_maxpacket()
1498 xhci_endpoint_copy(xhci, vdev->in_ctx, vdev->out_ctx, 0); in xhci_check_ep0_maxpacket()
1500 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, 0); in xhci_check_ep0_maxpacket()
1501 ep_ctx->ep_info &= cpu_to_le32(~EP_STATE_MASK);/* must clear */ in xhci_check_ep0_maxpacket()
1502 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); in xhci_check_ep0_maxpacket()
1503 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); in xhci_check_ep0_maxpacket()
1505 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); in xhci_check_ep0_maxpacket()
1506 ctrl_ctx->drop_flags = 0; in xhci_check_ep0_maxpacket()
1508 ret = xhci_configure_endpoint(xhci, vdev->udev, command, in xhci_check_ep0_maxpacket()
1511 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); in xhci_check_ep0_maxpacket()
1514 dev_dbg(&vdev->udev->dev, "incorrect max packet size %d for ep0\n", in xhci_check_ep0_maxpacket()
1516 return -EINVAL; in xhci_check_ep0_maxpacket()
1519 kfree(command->completion); in xhci_check_ep0_maxpacket()
1526 * non-error returns are a promise to giveback() the urb later
1539 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_enqueue()
1541 if (usb_endpoint_xfer_isoc(&urb->ep->desc)) in xhci_urb_enqueue()
1542 num_tds = urb->number_of_packets; in xhci_urb_enqueue()
1543 else if (usb_endpoint_is_bulk_out(&urb->ep->desc) && in xhci_urb_enqueue()
1544 urb->transfer_buffer_length > 0 && in xhci_urb_enqueue()
1545 urb->transfer_flags & URB_ZERO_PACKET && in xhci_urb_enqueue()
1546 !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc))) in xhci_urb_enqueue()
1553 return -ENOMEM; in xhci_urb_enqueue()
1555 urb_priv->num_tds = num_tds; in xhci_urb_enqueue()
1556 urb_priv->num_tds_done = 0; in xhci_urb_enqueue()
1557 urb->hcpriv = urb_priv; in xhci_urb_enqueue()
1561 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_enqueue()
1563 ret = xhci_check_args(hcd, urb->dev, urb->ep, in xhci_urb_enqueue()
1566 ret = ret ? ret : -EINVAL; in xhci_urb_enqueue()
1570 slot_id = urb->dev->slot_id; in xhci_urb_enqueue()
1573 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1577 if (xhci->devs[slot_id]->flags & VDEV_PORT_ERROR) { in xhci_urb_enqueue()
1579 ret = -ENODEV; in xhci_urb_enqueue()
1583 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_enqueue()
1584 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for non-responsive xHCI host.\n", in xhci_urb_enqueue()
1585 urb->ep->desc.bEndpointAddress, urb); in xhci_urb_enqueue()
1586 ret = -ESHUTDOWN; in xhci_urb_enqueue()
1590 ep_state = &xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_urb_enqueue()
1595 ret = -EINVAL; in xhci_urb_enqueue()
1600 ret = -EINVAL; in xhci_urb_enqueue()
1604 switch (usb_endpoint_type(&urb->ep->desc)) { in xhci_urb_enqueue()
1626 urb->hcpriv = NULL; in xhci_urb_enqueue()
1628 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_enqueue()
1645 * when drivers timeout on the last submitted URB and attempt to cancel.
1648 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1657 * It also needs to account for multiple cancellations on happening at the same
1678 spin_lock_irqsave(&xhci->lock, flags); in xhci_urb_dequeue()
1688 vdev = xhci->devs[urb->dev->slot_id]; in xhci_urb_dequeue()
1689 urb_priv = urb->hcpriv; in xhci_urb_dequeue()
1693 ep_index = xhci_get_endpoint_index(&urb->ep->desc); in xhci_urb_dequeue()
1694 ep = &vdev->eps[ep_index]; in xhci_urb_dequeue()
1700 temp = readl(&xhci->op_regs->status); in xhci_urb_dequeue()
1701 if (temp == ~(u32)0 || xhci->xhc_state & XHCI_STATE_DYING) { in xhci_urb_dequeue()
1707 * check ring is not re-allocated since URB was enqueued. If it is, then in xhci_urb_dequeue()
1711 if (!td_on_ring(&urb_priv->td[0], ep_ring)) { in xhci_urb_dequeue()
1712 xhci_err(xhci, "Canceled URB td not found on endpoint ring"); in xhci_urb_dequeue()
1713 for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1714 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1715 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1716 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1721 if (xhci->xhc_state & XHCI_STATE_HALTED) { in xhci_urb_dequeue()
1724 for (i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1725 i < urb_priv->num_tds; in xhci_urb_dequeue()
1727 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1728 if (!list_empty(&td->td_list)) in xhci_urb_dequeue()
1729 list_del_init(&td->td_list); in xhci_urb_dequeue()
1730 if (!list_empty(&td->cancelled_td_list)) in xhci_urb_dequeue()
1731 list_del_init(&td->cancelled_td_list); in xhci_urb_dequeue()
1736 i = urb_priv->num_tds_done; in xhci_urb_dequeue()
1737 if (i < urb_priv->num_tds) in xhci_urb_dequeue()
1741 urb, urb->dev->devpath, in xhci_urb_dequeue()
1742 urb->ep->desc.bEndpointAddress, in xhci_urb_dequeue()
1744 urb_priv->td[i].start_seg, in xhci_urb_dequeue()
1745 urb_priv->td[i].first_trb)); in xhci_urb_dequeue()
1747 for (; i < urb_priv->num_tds; i++) { in xhci_urb_dequeue()
1748 td = &urb_priv->td[i]; in xhci_urb_dequeue()
1749 /* TD can already be on cancelled list if ep halted on it */ in xhci_urb_dequeue()
1750 if (list_empty(&td->cancelled_td_list)) { in xhci_urb_dequeue()
1751 td->cancel_status = TD_DIRTY; in xhci_urb_dequeue()
1752 list_add_tail(&td->cancelled_td_list, in xhci_urb_dequeue()
1753 &ep->cancelled_td_list); in xhci_urb_dequeue()
1760 if (!(ep->ep_state & EP_STOP_CMD_PENDING)) { in xhci_urb_dequeue()
1763 ret = -ENOMEM; in xhci_urb_dequeue()
1766 ep->ep_state |= EP_STOP_CMD_PENDING; in xhci_urb_dequeue()
1767 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, in xhci_urb_dequeue()
1772 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1779 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_urb_dequeue()
1780 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); in xhci_urb_dequeue()
1795 * the xhci->devs[slot_id] structure.
1813 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_drop_endpoint()
1814 return -ENODEV; in xhci_drop_endpoint()
1817 drop_flag = xhci_get_endpoint_flag(&ep->desc); in xhci_drop_endpoint()
1819 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", in xhci_drop_endpoint()
1824 in_ctx = xhci->devs[udev->slot_id]->in_ctx; in xhci_drop_endpoint()
1825 out_ctx = xhci->devs[udev->slot_id]->out_ctx; in xhci_drop_endpoint()
1833 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_drop_endpoint()
1836 * or the HCD has noted it is disabled, ignore this request in xhci_drop_endpoint()
1839 le32_to_cpu(ctrl_ctx->drop_flags) & in xhci_drop_endpoint()
1840 xhci_get_endpoint_flag(&ep->desc)) { in xhci_drop_endpoint()
1842 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL) in xhci_drop_endpoint()
1848 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); in xhci_drop_endpoint()
1849 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_drop_endpoint()
1851 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); in xhci_drop_endpoint()
1852 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_drop_endpoint()
1854 xhci_debugfs_remove_endpoint(xhci, xhci->devs[udev->slot_id], ep_index); in xhci_drop_endpoint()
1856 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); in xhci_drop_endpoint()
1859 (unsigned int) ep->desc.bEndpointAddress, in xhci_drop_endpoint()
1860 udev->slot_id, in xhci_drop_endpoint()
1878 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1896 ep->hcpriv = NULL; in xhci_add_endpoint()
1900 if (xhci->xhc_state & XHCI_STATE_DYING) in xhci_add_endpoint()
1901 return -ENODEV; in xhci_add_endpoint()
1903 added_ctxs = xhci_get_endpoint_flag(&ep->desc); in xhci_add_endpoint()
1909 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", in xhci_add_endpoint()
1914 virt_dev = xhci->devs[udev->slot_id]; in xhci_add_endpoint()
1915 in_ctx = virt_dev->in_ctx; in xhci_add_endpoint()
1923 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_add_endpoint()
1927 if (virt_dev->eps[ep_index].ring && in xhci_add_endpoint()
1928 !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) { in xhci_add_endpoint()
1931 (unsigned int) ep->desc.bEndpointAddress); in xhci_add_endpoint()
1932 return -EINVAL; in xhci_add_endpoint()
1936 * ignore this request. in xhci_add_endpoint()
1938 if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) { in xhci_add_endpoint()
1950 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", in xhci_add_endpoint()
1951 __func__, ep->desc.bEndpointAddress); in xhci_add_endpoint()
1952 return -ENOMEM; in xhci_add_endpoint()
1955 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); in xhci_add_endpoint()
1956 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); in xhci_add_endpoint()
1960 * this re-adds a new state for the endpoint from the new endpoint in xhci_add_endpoint()
1961 * descriptors. We must drop and re-add this endpoint, so we leave the in xhci_add_endpoint()
1964 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); in xhci_add_endpoint()
1967 ep->hcpriv = udev; in xhci_add_endpoint()
1969 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); in xhci_add_endpoint()
1973 (unsigned int) ep->desc.bEndpointAddress, in xhci_add_endpoint()
1974 udev->slot_id, in xhci_add_endpoint()
1988 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_zero_in_ctx()
2000 ctrl_ctx->drop_flags = 0; in xhci_zero_in_ctx()
2001 ctrl_ctx->add_flags = 0; in xhci_zero_in_ctx()
2002 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_zero_in_ctx()
2003 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_zero_in_ctx()
2005 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); in xhci_zero_in_ctx()
2007 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); in xhci_zero_in_ctx()
2008 ep_ctx->ep_info = 0; in xhci_zero_in_ctx()
2009 ep_ctx->ep_info2 = 0; in xhci_zero_in_ctx()
2010 ep_ctx->deq = 0; in xhci_zero_in_ctx()
2011 ep_ctx->tx_info = 0; in xhci_zero_in_ctx()
2024 ret = -ETIME; in xhci_configure_endpoint_result()
2027 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2029 ret = -ENOMEM; in xhci_configure_endpoint_result()
2034 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2036 ret = -ENOSPC; in xhci_configure_endpoint_result()
2041 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " in xhci_configure_endpoint_result()
2044 ret = -EINVAL; in xhci_configure_endpoint_result()
2047 dev_warn(&udev->dev, in xhci_configure_endpoint_result()
2049 ret = -ENODEV; in xhci_configure_endpoint_result()
2059 ret = -EINVAL; in xhci_configure_endpoint_result()
2074 ret = -ETIME; in xhci_evaluate_context_result()
2077 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2079 ret = -EINVAL; in xhci_evaluate_context_result()
2082 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2084 ret = -EINVAL; in xhci_evaluate_context_result()
2087 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2089 ret = -EINVAL; in xhci_evaluate_context_result()
2092 dev_warn(&udev->dev, in xhci_evaluate_context_result()
2094 ret = -ENODEV; in xhci_evaluate_context_result()
2098 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); in xhci_evaluate_context_result()
2099 ret = -EINVAL; in xhci_evaluate_context_result()
2109 ret = -EINVAL; in xhci_evaluate_context_result()
2121 /* Ignore the slot flag (bit 0), and the default control endpoint flag in xhci_count_num_new_endpoints()
2125 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_new_endpoints()
2126 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_new_endpoints()
2132 return hweight32(valid_add_flags) - in xhci_count_num_new_endpoints()
2142 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2; in xhci_count_num_dropped_endpoints()
2143 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2; in xhci_count_num_dropped_endpoints()
2145 return hweight32(valid_drop_flags) - in xhci_count_num_dropped_endpoints()
2155 * - the first configure endpoint command drops more endpoints than it adds
2156 * - a second configure endpoint command that adds more endpoints is queued
2157 * - the first configure endpoint command fails, so the config is unchanged
2158 * - the second command may succeed, even though there isn't enough resources
2160 * Must be called with xhci->lock held.
2168 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { in xhci_reserve_host_resources()
2172 xhci->num_active_eps, added_eps, in xhci_reserve_host_resources()
2173 xhci->limit_active_eps); in xhci_reserve_host_resources()
2174 return -ENOMEM; in xhci_reserve_host_resources()
2176 xhci->num_active_eps += added_eps; in xhci_reserve_host_resources()
2179 xhci->num_active_eps); in xhci_reserve_host_resources()
2187 * Must be called with xhci->lock held.
2195 xhci->num_active_eps -= num_failed_eps; in xhci_free_host_resources()
2199 xhci->num_active_eps); in xhci_free_host_resources()
2206 * Must be called with xhci->lock held.
2214 xhci->num_active_eps -= num_dropped_eps; in xhci_finish_resource_reservation()
2219 xhci->num_active_eps); in xhci_finish_resource_reservation()
2224 switch (udev->speed) { in xhci_get_block_size()
2243 if (interval_bw->overhead[LS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2245 if (interval_bw->overhead[FS_OVERHEAD_TYPE]) in xhci_get_largest_overhead()
2262 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table; in xhci_check_tt_bw_table()
2263 tt_info = virt_dev->tt_info; in xhci_check_tt_bw_table()
2270 if (old_active_eps == 0 && tt_info->active_eps != 0) { in xhci_check_tt_bw_table()
2271 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) in xhci_check_tt_bw_table()
2272 return -ENOMEM; in xhci_check_tt_bw_table()
2290 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) in xhci_check_ss_bw()
2291 return -ENOMEM; in xhci_check_ss_bw()
2294 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) in xhci_check_ss_bw()
2295 return -ENOMEM; in xhci_check_ss_bw()
2301 * This algorithm is a very conservative estimate of the worst-case scheduling
2309 * over-estimate.
2356 if (virt_dev->udev->speed >= USB_SPEED_SUPER) in xhci_check_bw_table()
2359 if (virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2368 bw_table = virt_dev->bw_table; in xhci_check_bw_table()
2372 block_size = xhci_get_block_size(virt_dev->udev); in xhci_check_bw_table()
2377 if (virt_dev->tt_info) { in xhci_check_bw_table()
2380 virt_dev->real_port); in xhci_check_bw_table()
2382 xhci_warn(xhci, "Not enough bandwidth on HS bus for " in xhci_check_bw_table()
2384 return -ENOMEM; in xhci_check_bw_table()
2388 virt_dev->tt_info->slot_id, in xhci_check_bw_table()
2389 virt_dev->tt_info->ttport); in xhci_check_bw_table()
2393 virt_dev->real_port); in xhci_check_bw_table()
2399 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + in xhci_check_bw_table()
2400 bw_table->interval_bw[0].num_packets * in xhci_check_bw_table()
2401 xhci_get_largest_overhead(&bw_table->interval_bw[0]); in xhci_check_bw_table()
2414 bw_table->interval_bw[i].num_packets; in xhci_check_bw_table()
2419 if (list_empty(&bw_table->interval_bw[i].endpoints)) in xhci_check_bw_table()
2425 ep_entry = bw_table->interval_bw[i].endpoints.next; in xhci_check_bw_table()
2430 virt_ep->bw_info.max_packet_size, in xhci_check_bw_table()
2438 &bw_table->interval_bw[i]); in xhci_check_bw_table()
2477 return -ENOMEM; in xhci_check_bw_table()
2481 * Ok, we know we have some packets left over after even-handedly in xhci_check_bw_table()
2483 * fit into, so we over-schedule and say they will be scheduled every in xhci_check_bw_table()
2489 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { in xhci_check_bw_table()
2490 unsigned int port_index = virt_dev->real_port - 1; in xhci_check_bw_table()
2497 xhci->rh_bw[port_index].num_active_tts; in xhci_check_bw_table()
2504 (max_bandwidth - bw_used - bw_reserved) * 100 / in xhci_check_bw_table()
2511 return -ENOMEM; in xhci_check_bw_table()
2514 bw_table->bw_used = bw_used; in xhci_check_bw_table()
2532 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); in xhci_get_ss_bw_consumed()
2534 if (ep_bw->ep_interval == 0) in xhci_get_ss_bw_consumed()
2536 (ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2538 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * in xhci_get_ss_bw_consumed()
2540 1 << ep_bw->ep_interval); in xhci_get_ss_bw_consumed()
2554 if (xhci_is_async_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2557 if (udev->speed >= USB_SPEED_SUPER) { in xhci_drop_ep_from_interval_table()
2558 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_drop_ep_from_interval_table()
2559 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= in xhci_drop_ep_from_interval_table()
2562 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= in xhci_drop_ep_from_interval_table()
2570 if (list_empty(&virt_ep->bw_endpoint_list)) in xhci_drop_ep_from_interval_table()
2575 if (udev->speed == USB_SPEED_HIGH) in xhci_drop_ep_from_interval_table()
2576 normalized_interval = ep_bw->ep_interval; in xhci_drop_ep_from_interval_table()
2578 normalized_interval = ep_bw->ep_interval - 3; in xhci_drop_ep_from_interval_table()
2581 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; in xhci_drop_ep_from_interval_table()
2582 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_drop_ep_from_interval_table()
2583 interval_bw->num_packets -= ep_bw->num_packets; in xhci_drop_ep_from_interval_table()
2584 switch (udev->speed) { in xhci_drop_ep_from_interval_table()
2586 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2589 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2592 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; in xhci_drop_ep_from_interval_table()
2601 tt_info->active_eps -= 1; in xhci_drop_ep_from_interval_table()
2602 list_del_init(&virt_ep->bw_endpoint_list); in xhci_drop_ep_from_interval_table()
2616 if (xhci_is_async_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2619 if (udev->speed == USB_SPEED_SUPER) { in xhci_add_ep_to_interval_table()
2620 if (xhci_is_sync_in_ep(ep_bw->type)) in xhci_add_ep_to_interval_table()
2621 xhci->devs[udev->slot_id]->bw_table->ss_bw_in += in xhci_add_ep_to_interval_table()
2624 xhci->devs[udev->slot_id]->bw_table->ss_bw_out += in xhci_add_ep_to_interval_table()
2632 if (udev->speed == USB_SPEED_HIGH) in xhci_add_ep_to_interval_table()
2633 normalized_interval = ep_bw->ep_interval; in xhci_add_ep_to_interval_table()
2635 normalized_interval = ep_bw->ep_interval - 3; in xhci_add_ep_to_interval_table()
2638 bw_table->interval0_esit_payload += ep_bw->max_esit_payload; in xhci_add_ep_to_interval_table()
2639 interval_bw = &bw_table->interval_bw[normalized_interval]; in xhci_add_ep_to_interval_table()
2640 interval_bw->num_packets += ep_bw->num_packets; in xhci_add_ep_to_interval_table()
2641 switch (udev->speed) { in xhci_add_ep_to_interval_table()
2643 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2646 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2649 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; in xhci_add_ep_to_interval_table()
2659 tt_info->active_eps += 1; in xhci_add_ep_to_interval_table()
2661 list_for_each_entry(smaller_ep, &interval_bw->endpoints, in xhci_add_ep_to_interval_table()
2663 if (ep_bw->max_packet_size >= in xhci_add_ep_to_interval_table()
2664 smaller_ep->bw_info.max_packet_size) { in xhci_add_ep_to_interval_table()
2666 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2667 &smaller_ep->bw_endpoint_list); in xhci_add_ep_to_interval_table()
2672 list_add_tail(&virt_ep->bw_endpoint_list, in xhci_add_ep_to_interval_table()
2673 &interval_bw->endpoints); in xhci_add_ep_to_interval_table()
2681 if (!virt_dev->tt_info) in xhci_update_tt_active_eps()
2684 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1]; in xhci_update_tt_active_eps()
2686 virt_dev->tt_info->active_eps != 0) { in xhci_update_tt_active_eps()
2687 rh_bw_info->num_active_tts += 1; in xhci_update_tt_active_eps()
2688 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2690 virt_dev->tt_info->active_eps == 0) { in xhci_update_tt_active_eps()
2691 rh_bw_info->num_active_tts -= 1; in xhci_update_tt_active_eps()
2692 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; in xhci_update_tt_active_eps()
2705 if (virt_dev->tt_info) in xhci_reserve_bandwidth()
2706 old_active_eps = virt_dev->tt_info->active_eps; in xhci_reserve_bandwidth()
2712 return -ENOMEM; in xhci_reserve_bandwidth()
2720 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2727 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2728 virt_dev->bw_table, in xhci_reserve_bandwidth()
2729 virt_dev->udev, in xhci_reserve_bandwidth()
2730 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2731 virt_dev->tt_info); in xhci_reserve_bandwidth()
2734 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); in xhci_reserve_bandwidth()
2739 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2740 virt_dev->bw_table, in xhci_reserve_bandwidth()
2741 virt_dev->udev, in xhci_reserve_bandwidth()
2742 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2743 virt_dev->tt_info); in xhci_reserve_bandwidth()
2764 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2765 virt_dev->bw_table, in xhci_reserve_bandwidth()
2766 virt_dev->udev, in xhci_reserve_bandwidth()
2767 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2768 virt_dev->tt_info); in xhci_reserve_bandwidth()
2771 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], in xhci_reserve_bandwidth()
2776 &virt_dev->eps[i].bw_info, in xhci_reserve_bandwidth()
2777 virt_dev->bw_table, in xhci_reserve_bandwidth()
2778 virt_dev->udev, in xhci_reserve_bandwidth()
2779 &virt_dev->eps[i], in xhci_reserve_bandwidth()
2780 virt_dev->tt_info); in xhci_reserve_bandwidth()
2782 return -ENOMEM; in xhci_reserve_bandwidth()
2801 return -EINVAL; in xhci_configure_endpoint()
2803 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2805 if (xhci->xhc_state & XHCI_STATE_DYING) { in xhci_configure_endpoint()
2806 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2807 return -ESHUTDOWN; in xhci_configure_endpoint()
2810 virt_dev = xhci->devs[udev->slot_id]; in xhci_configure_endpoint()
2812 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_configure_endpoint()
2814 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2817 return -ENOMEM; in xhci_configure_endpoint()
2820 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && in xhci_configure_endpoint()
2822 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2825 xhci->num_active_eps); in xhci_configure_endpoint()
2826 return -ENOMEM; in xhci_configure_endpoint()
2828 if ((xhci->quirks & XHCI_SW_BW_CHECKING) && in xhci_configure_endpoint()
2829 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) { in xhci_configure_endpoint()
2830 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2832 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2834 return -ENOMEM; in xhci_configure_endpoint()
2837 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_configure_endpoint()
2844 command->in_ctx->dma, in xhci_configure_endpoint()
2845 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2848 command->in_ctx->dma, in xhci_configure_endpoint()
2849 udev->slot_id, must_succeed); in xhci_configure_endpoint()
2851 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) in xhci_configure_endpoint()
2853 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2856 return -ENOMEM; in xhci_configure_endpoint()
2859 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2862 wait_for_completion(command->completion); in xhci_configure_endpoint()
2866 &command->status); in xhci_configure_endpoint()
2869 &command->status); in xhci_configure_endpoint()
2871 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_configure_endpoint()
2872 spin_lock_irqsave(&xhci->lock, flags); in xhci_configure_endpoint()
2880 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_configure_endpoint()
2888 struct xhci_virt_ep *ep = &vdev->eps[i]; in xhci_check_bw_drop_ep_streams()
2890 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_check_bw_drop_ep_streams()
2891 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n", in xhci_check_bw_drop_ep_streams()
2893 xhci_free_stream_info(xhci, ep->stream_info); in xhci_check_bw_drop_ep_streams()
2894 ep->stream_info = NULL; in xhci_check_bw_drop_ep_streams()
2895 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_check_bw_drop_ep_streams()
2905 * enqueued for any endpoint on the old config or interface. Nothing
2906 * else should be touching the xhci->devs[slot_id] structure, so we
2907 * don't need to take the xhci->lock for manipulating that.
2923 if ((xhci->xhc_state & XHCI_STATE_DYING) || in xhci_check_bandwidth()
2924 (xhci->xhc_state & XHCI_STATE_REMOVING)) in xhci_check_bandwidth()
2925 return -ENODEV; in xhci_check_bandwidth()
2928 virt_dev = xhci->devs[udev->slot_id]; in xhci_check_bandwidth()
2932 return -ENOMEM; in xhci_check_bandwidth()
2934 command->in_ctx = virt_dev->in_ctx; in xhci_check_bandwidth()
2936 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ in xhci_check_bandwidth()
2937 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_check_bandwidth()
2941 ret = -ENOMEM; in xhci_check_bandwidth()
2944 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_check_bandwidth()
2945 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); in xhci_check_bandwidth()
2946 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); in xhci_check_bandwidth()
2949 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && in xhci_check_bandwidth()
2950 ctrl_ctx->drop_flags == 0) { in xhci_check_bandwidth()
2955 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_check_bandwidth()
2956 for (i = 31; i >= 1; i--) { in xhci_check_bandwidth()
2959 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32)) in xhci_check_bandwidth()
2960 || (ctrl_ctx->add_flags & le32) || i == 1) { in xhci_check_bandwidth()
2961 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); in xhci_check_bandwidth()
2962 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i)); in xhci_check_bandwidth()
2975 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && in xhci_check_bandwidth()
2976 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) { in xhci_check_bandwidth()
2987 if (!virt_dev->eps[i].new_ring) in xhci_check_bandwidth()
2992 if (virt_dev->eps[i].ring) { in xhci_check_bandwidth()
2996 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; in xhci_check_bandwidth()
2997 virt_dev->eps[i].new_ring = NULL; in xhci_check_bandwidth()
3001 kfree(command->completion); in xhci_check_bandwidth()
3020 virt_dev = xhci->devs[udev->slot_id]; in xhci_reset_bandwidth()
3023 if (virt_dev->eps[i].new_ring) { in xhci_reset_bandwidth()
3025 xhci_ring_free(xhci, virt_dev->eps[i].new_ring); in xhci_reset_bandwidth()
3026 virt_dev->eps[i].new_ring = NULL; in xhci_reset_bandwidth()
3039 ctrl_ctx->add_flags = cpu_to_le32(add_flags); in xhci_setup_input_ctx_for_config_ep()
3040 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); in xhci_setup_input_ctx_for_config_ep()
3042 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_setup_input_ctx_for_config_ep()
3057 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_disable()
3059 udev = (struct usb_device *)host_ep->hcpriv; in xhci_endpoint_disable()
3060 if (!udev || !udev->slot_id) in xhci_endpoint_disable()
3063 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_disable()
3067 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_disable()
3068 ep = &vdev->eps[ep_index]; in xhci_endpoint_disable()
3071 if (ep->ep_state & EP_CLEARING_TT) { in xhci_endpoint_disable()
3072 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3077 if (ep->ep_state) in xhci_endpoint_disable()
3079 ep->ep_state); in xhci_endpoint_disable()
3081 host_ep->hcpriv = NULL; in xhci_endpoint_disable()
3082 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_disable()
3096 * vdev may be lost due to xHC restore error and re-initialization during S3/S4
3115 ep_index = xhci_get_endpoint_index(&host_ep->desc); in xhci_endpoint_reset()
3118 * Usb core assumes a max packet value for ep0 on FS devices until the in xhci_endpoint_reset()
3122 if (usb_endpoint_xfer_control(&host_ep->desc) && ep_index == 0) { in xhci_endpoint_reset()
3125 if (udev->speed != USB_SPEED_FULL || !udev->slot_id) in xhci_endpoint_reset()
3128 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3129 if (!vdev || vdev->udev != udev) in xhci_endpoint_reset()
3138 if (!host_ep->hcpriv) in xhci_endpoint_reset()
3140 udev = (struct usb_device *) host_ep->hcpriv; in xhci_endpoint_reset()
3141 vdev = xhci->devs[udev->slot_id]; in xhci_endpoint_reset()
3143 if (!udev->slot_id || !vdev) in xhci_endpoint_reset()
3146 ep = &vdev->eps[ep_index]; in xhci_endpoint_reset()
3149 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3150 if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) { in xhci_endpoint_reset()
3151 ep->ep_state &= ~EP_HARD_CLEAR_TOGGLE; in xhci_endpoint_reset()
3152 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3155 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3156 /* Only interrupt and bulk ep's use data toggle, USB2 spec 5.5.4-> */ in xhci_endpoint_reset()
3157 if (usb_endpoint_xfer_control(&host_ep->desc) || in xhci_endpoint_reset()
3158 usb_endpoint_xfer_isoc(&host_ep->desc)) in xhci_endpoint_reset()
3161 ep_flag = xhci_get_endpoint_flag(&host_ep->desc); in xhci_endpoint_reset()
3174 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3177 ep->ep_state |= EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3185 if (!list_empty(&ep->ring->td_list)) { in xhci_endpoint_reset()
3186 dev_err(&udev->dev, "EP not empty, refuse reset\n"); in xhci_endpoint_reset()
3187 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3192 err = xhci_queue_stop_endpoint(xhci, stop_cmd, udev->slot_id, in xhci_endpoint_reset()
3195 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3203 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3205 wait_for_completion(stop_cmd->completion); in xhci_endpoint_reset()
3207 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3210 ctrl_ctx = xhci_get_input_control_ctx(cfg_cmd->in_ctx); in xhci_endpoint_reset()
3212 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3219 xhci_setup_input_ctx_for_config_ep(xhci, cfg_cmd->in_ctx, vdev->out_ctx, in xhci_endpoint_reset()
3221 xhci_endpoint_copy(xhci, cfg_cmd->in_ctx, vdev->out_ctx, ep_index); in xhci_endpoint_reset()
3223 err = xhci_queue_configure_endpoint(xhci, cfg_cmd, cfg_cmd->in_ctx->dma, in xhci_endpoint_reset()
3224 udev->slot_id, false); in xhci_endpoint_reset()
3226 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3234 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3236 wait_for_completion(cfg_cmd->completion); in xhci_endpoint_reset()
3241 spin_lock_irqsave(&xhci->lock, flags); in xhci_endpoint_reset()
3242 if (ep->ep_state & EP_SOFT_CLEAR_TOGGLE) in xhci_endpoint_reset()
3243 ep->ep_state &= ~EP_SOFT_CLEAR_TOGGLE; in xhci_endpoint_reset()
3244 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_endpoint_reset()
3256 return -EINVAL; in xhci_check_streams_endpoint()
3259 return ret ? ret : -EINVAL; in xhci_check_streams_endpoint()
3260 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) { in xhci_check_streams_endpoint()
3263 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3264 return -EINVAL; in xhci_check_streams_endpoint()
3267 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_check_streams_endpoint()
3268 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_check_streams_endpoint()
3273 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3276 return -EINVAL; in xhci_check_streams_endpoint()
3278 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { in xhci_check_streams_endpoint()
3281 ep->desc.bEndpointAddress); in xhci_check_streams_endpoint()
3282 return -EINVAL; in xhci_check_streams_endpoint()
3292 /* The stream context array size must be a power of two */ in xhci_calculate_streams_entries()
3300 max_streams = HCC_MAX_PSA(xhci->hcc_params); in xhci_calculate_streams_entries()
3325 eps[i], udev->slot_id); in xhci_calculate_streams_and_bitmask()
3329 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); in xhci_calculate_streams_and_bitmask()
3330 if (max_streams < (*num_streams - 1)) { in xhci_calculate_streams_and_bitmask()
3332 eps[i]->desc.bEndpointAddress, in xhci_calculate_streams_and_bitmask()
3337 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_streams_and_bitmask()
3339 return -EINVAL; in xhci_calculate_streams_and_bitmask()
3355 slot_id = udev->slot_id; in xhci_calculate_no_streams_bitmask()
3356 if (!xhci->devs[slot_id]) in xhci_calculate_no_streams_bitmask()
3360 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3361 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; in xhci_calculate_no_streams_bitmask()
3367 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3376 eps[i]->desc.bEndpointAddress); in xhci_calculate_no_streams_bitmask()
3378 "with non-streams endpoint\n"); in xhci_calculate_no_streams_bitmask()
3381 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); in xhci_calculate_no_streams_bitmask()
3418 return -EINVAL; in xhci_alloc_streams()
3429 if ((xhci->quirks & XHCI_BROKEN_STREAMS) || in xhci_alloc_streams()
3430 HCC_MAX_PSA(xhci->hcc_params) < 4) { in xhci_alloc_streams()
3432 return -ENOSYS; in xhci_alloc_streams()
3437 return -ENOMEM; in xhci_alloc_streams()
3439 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_alloc_streams()
3444 return -ENOMEM; in xhci_alloc_streams()
3451 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3456 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3463 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3464 return -EINVAL; in xhci_alloc_streams()
3466 vdev = xhci->devs[udev->slot_id]; in xhci_alloc_streams()
3471 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3472 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; in xhci_alloc_streams()
3474 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3485 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3486 max_packet = usb_endpoint_maxp(&eps[i]->desc); in xhci_alloc_streams()
3487 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, in xhci_alloc_streams()
3491 if (!vdev->eps[ep_index].stream_info) in xhci_alloc_streams()
3502 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3503 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); in xhci_alloc_streams()
3505 xhci_endpoint_copy(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3506 vdev->out_ctx, ep_index); in xhci_alloc_streams()
3508 vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3513 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, in xhci_alloc_streams()
3514 vdev->out_ctx, ctrl_ctx, in xhci_alloc_streams()
3528 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_streams()
3530 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3531 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3533 udev->slot_id, ep_index); in xhci_alloc_streams()
3534 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; in xhci_alloc_streams()
3537 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_streams()
3540 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3544 return num_streams - 1; in xhci_alloc_streams()
3549 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_alloc_streams()
3550 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_alloc_streams()
3551 vdev->eps[ep_index].stream_info = NULL; in xhci_alloc_streams()
3555 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; in xhci_alloc_streams()
3556 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_alloc_streams()
3560 return -ENOMEM; in xhci_alloc_streams()
3583 vdev = xhci->devs[udev->slot_id]; in xhci_free_streams()
3586 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3590 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3591 return -EINVAL; in xhci_free_streams()
3598 ep_index = xhci_get_endpoint_index(&eps[0]->desc); in xhci_free_streams()
3599 command = vdev->eps[ep_index].stream_info->free_streams_command; in xhci_free_streams()
3600 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_free_streams()
3602 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3605 return -EINVAL; in xhci_free_streams()
3611 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3612 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); in xhci_free_streams()
3613 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= in xhci_free_streams()
3616 xhci_endpoint_copy(xhci, command->in_ctx, in xhci_free_streams()
3617 vdev->out_ctx, ep_index); in xhci_free_streams()
3619 &vdev->eps[ep_index]); in xhci_free_streams()
3621 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, in xhci_free_streams()
3622 vdev->out_ctx, ctrl_ctx, in xhci_free_streams()
3624 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3638 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_streams()
3640 ep_index = xhci_get_endpoint_index(&eps[i]->desc); in xhci_free_streams()
3641 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); in xhci_free_streams()
3642 vdev->eps[ep_index].stream_info = NULL; in xhci_free_streams()
3646 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; in xhci_free_streams()
3647 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; in xhci_free_streams()
3649 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_streams()
3659 * Must be called with xhci->lock held.
3669 if (virt_dev->eps[i].ring) { in xhci_free_device_endpoint_resources()
3674 xhci->num_active_eps -= num_dropped_eps; in xhci_free_device_endpoint_resources()
3680 xhci->num_active_eps); in xhci_free_device_endpoint_resources()
3687 * xhci_address_device(), and then re-set up the configuration. If this is
3689 * settings will be re-installed through the normal bandwidth allocation
3698 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3699 * re-allocate the device.
3717 slot_id = udev->slot_id; in xhci_discover_or_reset_device()
3718 virt_dev = xhci->devs[slot_id]; in xhci_discover_or_reset_device()
3721 "not exist. Re-allocate the device\n", slot_id); in xhci_discover_or_reset_device()
3726 return -EINVAL; in xhci_discover_or_reset_device()
3729 if (virt_dev->tt_info) in xhci_discover_or_reset_device()
3730 old_active_eps = virt_dev->tt_info->active_eps; in xhci_discover_or_reset_device()
3732 if (virt_dev->udev != udev) { in xhci_discover_or_reset_device()
3735 * Re-allocate the device. in xhci_discover_or_reset_device()
3738 "not match the udev. Re-allocate the device\n", in xhci_discover_or_reset_device()
3744 return -EINVAL; in xhci_discover_or_reset_device()
3748 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_discover_or_reset_device()
3749 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_discover_or_reset_device()
3765 return -ENOMEM; in xhci_discover_or_reset_device()
3769 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3774 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3778 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3781 wait_for_completion(reset_device_cmd->completion); in xhci_discover_or_reset_device()
3787 ret = reset_device_cmd->status; in xhci_discover_or_reset_device()
3792 ret = -ETIME; in xhci_discover_or_reset_device()
3798 xhci_get_slot_state(xhci, virt_dev->out_ctx)); in xhci_discover_or_reset_device()
3811 ret = -EINVAL; in xhci_discover_or_reset_device()
3816 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_discover_or_reset_device()
3817 spin_lock_irqsave(&xhci->lock, flags); in xhci_discover_or_reset_device()
3820 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_discover_or_reset_device()
3825 struct xhci_virt_ep *ep = &virt_dev->eps[i]; in xhci_discover_or_reset_device()
3827 if (ep->ep_state & EP_HAS_STREAMS) { in xhci_discover_or_reset_device()
3828 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n", in xhci_discover_or_reset_device()
3830 xhci_free_stream_info(xhci, ep->stream_info); in xhci_discover_or_reset_device()
3831 ep->stream_info = NULL; in xhci_discover_or_reset_device()
3832 ep->ep_state &= ~EP_HAS_STREAMS; in xhci_discover_or_reset_device()
3835 if (ep->ring) { in xhci_discover_or_reset_device()
3839 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) in xhci_discover_or_reset_device()
3841 &virt_dev->eps[i].bw_info, in xhci_discover_or_reset_device()
3842 virt_dev->bw_table, in xhci_discover_or_reset_device()
3844 &virt_dev->eps[i], in xhci_discover_or_reset_device()
3845 virt_dev->tt_info); in xhci_discover_or_reset_device()
3846 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); in xhci_discover_or_reset_device()
3848 /* If necessary, update the number of active TTs on this root port */ in xhci_discover_or_reset_device()
3850 virt_dev->flags = 0; in xhci_discover_or_reset_device()
3876 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_free_dev()
3877 pm_runtime_put_noidle(hcd->self.controller); in xhci_free_dev()
3883 if (ret <= 0 && ret != -ENODEV) in xhci_free_dev()
3886 virt_dev = xhci->devs[udev->slot_id]; in xhci_free_dev()
3887 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_free_dev()
3892 virt_dev->eps[i].ep_state &= ~EP_STOP_CMD_PENDING; in xhci_free_dev()
3893 virt_dev->udev = NULL; in xhci_free_dev()
3894 xhci_disable_slot(xhci, udev->slot_id); in xhci_free_dev()
3896 spin_lock_irqsave(&xhci->lock, flags); in xhci_free_dev()
3897 xhci_free_virt_device(xhci, udev->slot_id); in xhci_free_dev()
3898 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_free_dev()
3911 return -ENOMEM; in xhci_disable_slot()
3915 spin_lock_irqsave(&xhci->lock, flags); in xhci_disable_slot()
3917 state = readl(&xhci->op_regs->status); in xhci_disable_slot()
3918 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || in xhci_disable_slot()
3919 (xhci->xhc_state & XHCI_STATE_HALTED)) { in xhci_disable_slot()
3920 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3922 return -ENODEV; in xhci_disable_slot()
3928 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3933 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_disable_slot()
3935 wait_for_completion(command->completion); in xhci_disable_slot()
3937 if (command->status != COMP_SUCCESS) in xhci_disable_slot()
3939 slot_id, command->status); in xhci_disable_slot()
3950 * Must be called with xhci->lock held.
3954 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { in xhci_reserve_host_control_ep_resources()
3958 xhci->num_active_eps, xhci->limit_active_eps); in xhci_reserve_host_control_ep_resources()
3959 return -ENOMEM; in xhci_reserve_host_control_ep_resources()
3961 xhci->num_active_eps += 1; in xhci_reserve_host_control_ep_resources()
3964 xhci->num_active_eps); in xhci_reserve_host_control_ep_resources()
3971 * timed out, or allocating memory failed. Returns 1 on success.
3986 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
3989 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
3995 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
3997 wait_for_completion(command->completion); in xhci_alloc_dev()
3998 slot_id = command->slot_id; in xhci_alloc_dev()
4000 if (!slot_id || command->status != COMP_SUCCESS) { in xhci_alloc_dev()
4002 xhci_trb_comp_code_string(command->status)); in xhci_alloc_dev()
4005 readl(&xhci->cap_regs->hcs_params1))); in xhci_alloc_dev()
4012 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { in xhci_alloc_dev()
4013 spin_lock_irqsave(&xhci->lock, flags); in xhci_alloc_dev()
4016 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4019 xhci->num_active_eps); in xhci_alloc_dev()
4022 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_alloc_dev()
4032 vdev = xhci->devs[slot_id]; in xhci_alloc_dev()
4033 slot_ctx = xhci_get_slot_ctx(xhci, vdev->out_ctx); in xhci_alloc_dev()
4036 udev->slot_id = slot_id; in xhci_alloc_dev()
4044 if (xhci->quirks & XHCI_RESET_ON_RESUME) in xhci_alloc_dev()
4045 pm_runtime_get_noresume(hcd->self.controller); in xhci_alloc_dev()
4052 xhci_disable_slot(xhci, udev->slot_id); in xhci_alloc_dev()
4053 xhci_free_virt_device(xhci, udev->slot_id); in xhci_alloc_dev()
4059 * xhci_setup_device - issues an Address Device command to assign a unique
4081 mutex_lock(&xhci->mutex); in xhci_setup_device()
4083 if (xhci->xhc_state) { /* dying, removing or halted */ in xhci_setup_device()
4084 ret = -ESHUTDOWN; in xhci_setup_device()
4088 if (!udev->slot_id) { in xhci_setup_device()
4090 "Bad Slot ID %d", udev->slot_id); in xhci_setup_device()
4091 ret = -EINVAL; in xhci_setup_device()
4095 virt_dev = xhci->devs[udev->slot_id]; in xhci_setup_device()
4100 * a zero-dereference was observed once due to virt_dev = 0. in xhci_setup_device()
4104 udev->slot_id); in xhci_setup_device()
4105 ret = -EINVAL; in xhci_setup_device()
4108 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4112 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == in xhci_setup_device()
4121 ret = -ENOMEM; in xhci_setup_device()
4125 command->in_ctx = virt_dev->in_ctx; in xhci_setup_device()
4126 command->timeout_ms = timeout_ms; in xhci_setup_device()
4128 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); in xhci_setup_device()
4129 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx); in xhci_setup_device()
4133 ret = -EINVAL; in xhci_setup_device()
4137 * If this is the first Set Address since device plug-in or in xhci_setup_device()
4138 * virt_device realloaction after a resume with an xHCI power loss, in xhci_setup_device()
4141 if (!slot_ctx->dev_info) in xhci_setup_device()
4146 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); in xhci_setup_device()
4147 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4149 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4150 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4153 spin_lock_irqsave(&xhci->lock, flags); in xhci_setup_device()
4155 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma, in xhci_setup_device()
4156 udev->slot_id, setup); in xhci_setup_device()
4158 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4164 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_setup_device()
4167 wait_for_completion(command->completion); in xhci_setup_device()
4171 * command on a timeout. in xhci_setup_device()
4173 switch (command->status) { in xhci_setup_device()
4177 ret = -ETIME; in xhci_setup_device()
4182 act, udev->slot_id); in xhci_setup_device()
4183 ret = -EINVAL; in xhci_setup_device()
4186 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act); in xhci_setup_device()
4188 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4189 ret = xhci_disable_slot(xhci, udev->slot_id); in xhci_setup_device()
4190 xhci_free_virt_device(xhci, udev->slot_id); in xhci_setup_device()
4193 kfree(command->completion); in xhci_setup_device()
4195 return -EPROTO; in xhci_setup_device()
4197 dev_warn(&udev->dev, in xhci_setup_device()
4199 ret = -ENODEV; in xhci_setup_device()
4208 act, command->status); in xhci_setup_device()
4209 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1); in xhci_setup_device()
4210 ret = -EINVAL; in xhci_setup_device()
4215 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); in xhci_setup_device()
4220 udev->slot_id, in xhci_setup_device()
4221 &xhci->dcbaa->dev_context_ptrs[udev->slot_id], in xhci_setup_device()
4223 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); in xhci_setup_device()
4226 (unsigned long long)virt_dev->out_ctx->dma); in xhci_setup_device()
4227 trace_xhci_address_ctx(xhci, virt_dev->in_ctx, in xhci_setup_device()
4228 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4233 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, in xhci_setup_device()
4234 le32_to_cpu(slot_ctx->dev_info) >> 27); in xhci_setup_device()
4236 ctrl_ctx->add_flags = 0; in xhci_setup_device()
4237 ctrl_ctx->drop_flags = 0; in xhci_setup_device()
4238 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); in xhci_setup_device()
4239 udev->devaddr = (u8)(le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4243 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK); in xhci_setup_device()
4245 mutex_unlock(&xhci->mutex); in xhci_setup_device()
4247 kfree(command->completion); in xhci_setup_device()
4276 return rhub->ports[port1 - 1]->hw_portnum + 1; in xhci_find_raw_port_number()
4295 return -ENOMEM; in xhci_change_max_exit_latency()
4297 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4299 virt_dev = xhci->devs[udev->slot_id]; in xhci_change_max_exit_latency()
4303 * xHC was re-initialized. Exit latency will be set later after in xhci_change_max_exit_latency()
4304 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated in xhci_change_max_exit_latency()
4307 if (!virt_dev || max_exit_latency == virt_dev->current_mel) { in xhci_change_max_exit_latency()
4308 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4314 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); in xhci_change_max_exit_latency()
4316 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4320 return -ENOMEM; in xhci_change_max_exit_latency()
4323 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx); in xhci_change_max_exit_latency()
4324 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4326 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_change_max_exit_latency()
4327 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx); in xhci_change_max_exit_latency()
4328 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT)); in xhci_change_max_exit_latency()
4329 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency); in xhci_change_max_exit_latency()
4330 slot_ctx->dev_state = 0; in xhci_change_max_exit_latency()
4340 spin_lock_irqsave(&xhci->lock, flags); in xhci_change_max_exit_latency()
4341 virt_dev->current_mel = max_exit_latency; in xhci_change_max_exit_latency()
4342 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_change_max_exit_latency()
4364 u2del = HCS_U2_LATENCY(xhci->hcs_params3); in xhci_calculate_hird_besl()
4365 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_hird_besl()
4381 besl_host = (u2del - 51) / 75 + 1; in xhci_calculate_hird_besl()
4399 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_calculate_usb2_hw_lpm_params()
4402 l1 = udev->l1_params.timeout / 256; in xhci_calculate_usb2_hw_lpm_params()
4425 if (xhci->quirks & XHCI_HW_LPM_DISABLE) in xhci_set_usb2_hardware_lpm()
4426 return -EPERM; in xhci_set_usb2_hardware_lpm()
4428 if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support || in xhci_set_usb2_hardware_lpm()
4429 !udev->lpm_capable) in xhci_set_usb2_hardware_lpm()
4430 return -EPERM; in xhci_set_usb2_hardware_lpm()
4432 if (!udev->parent || udev->parent->parent || in xhci_set_usb2_hardware_lpm()
4433 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_set_usb2_hardware_lpm()
4434 return -EPERM; in xhci_set_usb2_hardware_lpm()
4436 if (udev->usb2_hw_lpm_capable != 1) in xhci_set_usb2_hardware_lpm()
4437 return -EPERM; in xhci_set_usb2_hardware_lpm()
4439 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4441 ports = xhci->usb2_rhub.ports; in xhci_set_usb2_hardware_lpm()
4442 port_num = udev->portnum - 1; in xhci_set_usb2_hardware_lpm()
4443 pm_addr = ports[port_num]->addr + PORTPMSC; in xhci_set_usb2_hardware_lpm()
4445 hlpm_addr = ports[port_num]->addr + PORTHLPMC; in xhci_set_usb2_hardware_lpm()
4452 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4457 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); in xhci_set_usb2_hardware_lpm()
4462 hird = udev->l1_params.besl; in xhci_set_usb2_hardware_lpm()
4465 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4471 spin_lock_irqsave(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4482 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); in xhci_set_usb2_hardware_lpm()
4494 if (udev->usb2_hw_lpm_besl_capable) { in xhci_set_usb2_hardware_lpm()
4495 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4497 readl_poll_timeout(ports[port_num]->addr, pm_val, in xhci_set_usb2_hardware_lpm()
4504 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_set_usb2_hardware_lpm()
4518 for (i = 0; i < xhci->num_ext_caps; i++) { in xhci_check_usb2_port_capability()
4519 if (xhci->ext_caps[i] & capability) { in xhci_check_usb2_port_capability()
4521 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1; in xhci_check_usb2_port_capability()
4522 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]); in xhci_check_usb2_port_capability()
4534 int portnum = udev->portnum - 1; in xhci_update_device()
4536 if (hcd->speed >= HCD_USB3 || !udev->lpm_capable) in xhci_update_device()
4539 /* we only support lpm for non-hub device connected to root hub yet */ in xhci_update_device()
4540 if (!udev->parent || udev->parent->parent || in xhci_update_device()
4541 udev->descriptor.bDeviceClass == USB_CLASS_HUB) in xhci_update_device()
4544 if (xhci->hw_lpm_support == 1 && in xhci_update_device()
4547 udev->usb2_hw_lpm_capable = 1; in xhci_update_device()
4548 udev->l1_params.timeout = XHCI_L1_TIMEOUT; in xhci_update_device()
4549 udev->l1_params.besl = XHCI_DEFAULT_BESL; in xhci_update_device()
4552 udev->usb2_hw_lpm_besl_capable = 1; in xhci_update_device()
4558 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4560 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4564 return (1ULL << (desc->bInterval - 1)) * 125 * 1000; in xhci_service_interval_to_ns()
4570 unsigned long long sel; in xhci_get_timeout_no_hub_lpm() local
4577 /* Convert SEL and PEL stored in nanoseconds to microseconds */ in xhci_get_timeout_no_hub_lpm()
4578 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4579 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4584 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000); in xhci_get_timeout_no_hub_lpm()
4585 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000); in xhci_get_timeout_no_hub_lpm()
4590 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n", in xhci_get_timeout_no_hub_lpm()
4595 if (sel <= max_sel_pel && pel <= max_sel_pel) in xhci_get_timeout_no_hub_lpm()
4598 if (sel > max_sel_pel) in xhci_get_timeout_no_hub_lpm()
4599 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4600 "due to long SEL %llu ms\n", in xhci_get_timeout_no_hub_lpm()
4601 state_name, sel); in xhci_get_timeout_no_hub_lpm()
4603 dev_dbg(&udev->dev, "Device-initiated %s disabled " in xhci_get_timeout_no_hub_lpm()
4610 * - For control endpoints, U1 system exit latency (SEL) * 3
4611 * - For bulk endpoints, U1 SEL * 5
4612 * - For interrupt endpoints:
4613 * - Notification EPs, U1 SEL * 3
4614 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4615 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4628 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4631 timeout_ns = udev->u1_params.sel * 5; in xhci_calculate_intel_u1_timeout()
4636 timeout_ns = udev->u1_params.sel * 3; in xhci_calculate_intel_u1_timeout()
4644 if (timeout_ns < udev->u1_params.sel * 2) in xhci_calculate_intel_u1_timeout()
4645 timeout_ns = udev->u1_params.sel * 2; in xhci_calculate_intel_u1_timeout()
4654 /* Returns the hub-encoded U1 timeout value. */
4663 if (xhci_service_interval_to_ns(desc) <= udev->u1_params.mel) { in xhci_calculate_u1_timeout()
4664 dev_dbg(&udev->dev, "Disable U1, ESIT shorter than exit latency\n"); in xhci_calculate_u1_timeout()
4669 if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) in xhci_calculate_u1_timeout()
4672 timeout_ns = udev->u1_params.sel; in xhci_calculate_u1_timeout()
4683 * USB 3.0 hub, we have to disable hub-initiated U1. in xhci_calculate_u1_timeout()
4687 dev_dbg(&udev->dev, "Hub-initiated U1 disabled " in xhci_calculate_u1_timeout()
4693 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4694 * - largest bInterval of any active periodic endpoint (to avoid going
4695 * into lower power link states between intervals).
4696 * - the U2 Exit Latency of the device
4711 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL; in xhci_calculate_intel_u2_timeout()
4718 /* Returns the hub-encoded U2 timeout value. */
4727 if (xhci_service_interval_to_ns(desc) <= udev->u2_params.mel) { in xhci_calculate_u2_timeout()
4728 dev_dbg(&udev->dev, "Disable U2, ESIT shorter than exit latency\n"); in xhci_calculate_u2_timeout()
4733 if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_ZHAOXIN_HOST)) in xhci_calculate_u2_timeout()
4736 timeout_ns = udev->u2_params.sel; in xhci_calculate_u2_timeout()
4741 * USB 3.0 hub, we have to disable hub-initiated U2. in xhci_calculate_u2_timeout()
4745 dev_dbg(&udev->dev, "Hub-initiated U2 disabled " in xhci_calculate_u2_timeout()
4775 /* If we found we can't enable hub-initiated LPM, and in xhci_update_timeout_for_endpoint()
4777 * device-initiated LPM as well, then we will disable LPM in xhci_update_timeout_for_endpoint()
4782 return -E2BIG; in xhci_update_timeout_for_endpoint()
4797 for (j = 0; j < alt->desc.bNumEndpoints; j++) { in xhci_update_timeout_for_interface()
4799 &alt->endpoint[j].desc, state, timeout)) in xhci_update_timeout_for_interface()
4800 return -E2BIG; in xhci_update_timeout_for_interface()
4809 struct usb_device *parent = udev->parent; in xhci_check_tier_policy()
4813 parent = parent->parent; in xhci_check_tier_policy()
4817 if (xhci->quirks & XHCI_INTEL_HOST && tier > 3) in xhci_check_tier_policy()
4819 if (xhci->quirks & XHCI_ZHAOXIN_HOST && tier > 2) in xhci_check_tier_policy()
4824 dev_dbg(&udev->dev, "Tier policy prevents U1/U2 LPM states for devices at tier %d\n", in xhci_check_tier_policy()
4826 return -E2BIG; in xhci_check_tier_policy()
4830 * If the tier check or timeout setting functions return with a non-zero exit
4848 dev_warn(&udev->dev, "Can't enable unknown link state %i\n", in xhci_calculate_lpm_timeout()
4856 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc, in xhci_calculate_lpm_timeout()
4860 config = udev->actconfig; in xhci_calculate_lpm_timeout()
4864 for (i = 0; i < config->desc.bNumInterfaces; i++) { in xhci_calculate_lpm_timeout()
4866 struct usb_interface *intf = config->interface[i]; in xhci_calculate_lpm_timeout()
4871 /* Check if any currently bound drivers want hub-initiated LPM in xhci_calculate_lpm_timeout()
4874 if (intf->dev.driver) { in xhci_calculate_lpm_timeout()
4875 driver = to_usb_driver(intf->dev.driver); in xhci_calculate_lpm_timeout()
4876 if (driver && driver->disable_hub_initiated_lpm) { in xhci_calculate_lpm_timeout()
4877 dev_dbg(&udev->dev, "Hub-initiated %s disabled at request of driver %s\n", in xhci_calculate_lpm_timeout()
4878 state_name, driver->name); in xhci_calculate_lpm_timeout()
4887 if (!intf->cur_altsetting) in xhci_calculate_lpm_timeout()
4891 intf->cur_altsetting, in xhci_calculate_lpm_timeout()
4923 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) || in calculate_max_exit_latency()
4925 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000); in calculate_max_exit_latency()
4926 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) || in calculate_max_exit_latency()
4928 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000); in calculate_max_exit_latency()
4934 dev_warn(&udev->dev, "Link PM max exit latency of %lluus " in calculate_max_exit_latency()
4936 return -E2BIG; in calculate_max_exit_latency()
4941 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4952 /* The LPM timeout values are pretty host-controller specific, so don't in xhci_enable_usb3_lpm_timeout()
4953 * enable hub-initiated timeouts unless the vendor has provided in xhci_enable_usb3_lpm_timeout()
4956 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_enable_usb3_lpm_timeout()
4957 !xhci->devs[udev->slot_id]) in xhci_enable_usb3_lpm_timeout()
4964 if (udev->parent && !udev->parent->parent) { in xhci_enable_usb3_lpm_timeout()
4965 port = xhci->usb3_rhub.ports[udev->portnum - 1]; in xhci_enable_usb3_lpm_timeout()
4966 if (port->lpm_incapable) in xhci_enable_usb3_lpm_timeout()
4991 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) || in xhci_disable_usb3_lpm_timeout()
4992 !xhci->devs[udev->slot_id]) in xhci_disable_usb3_lpm_timeout()
5024 /*-------------------------------------------------------------------------*/
5041 /* Ignore root hubs */ in xhci_update_hub_device()
5042 if (!hdev->parent) in xhci_update_hub_device()
5045 vdev = xhci->devs[hdev->slot_id]; in xhci_update_hub_device()
5048 return -EINVAL; in xhci_update_hub_device()
5053 return -ENOMEM; in xhci_update_hub_device()
5055 ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx); in xhci_update_hub_device()
5060 return -ENOMEM; in xhci_update_hub_device()
5063 spin_lock_irqsave(&xhci->lock, flags); in xhci_update_hub_device()
5064 if (hdev->speed == USB_SPEED_HIGH && in xhci_update_hub_device()
5068 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5069 return -ENOMEM; in xhci_update_hub_device()
5072 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); in xhci_update_hub_device()
5073 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); in xhci_update_hub_device()
5074 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); in xhci_update_hub_device()
5075 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); in xhci_update_hub_device()
5081 if (tt->multi) in xhci_update_hub_device()
5082 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); in xhci_update_hub_device()
5083 else if (hdev->speed == USB_SPEED_FULL) in xhci_update_hub_device()
5084 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); in xhci_update_hub_device()
5086 if (xhci->hci_version > 0x95) { in xhci_update_hub_device()
5089 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5090 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); in xhci_update_hub_device()
5091 /* Set TT think time - convert from ns to FS bit times. in xhci_update_hub_device()
5096 * High-spped hub. in xhci_update_hub_device()
5098 think_time = tt->think_time; in xhci_update_hub_device()
5100 think_time = (think_time / 666) - 1; in xhci_update_hub_device()
5101 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) in xhci_update_hub_device()
5102 slot_ctx->tt_info |= in xhci_update_hub_device()
5107 (unsigned int) xhci->hci_version); in xhci_update_hub_device()
5109 slot_ctx->dev_state = 0; in xhci_update_hub_device()
5110 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_update_hub_device()
5113 (xhci->hci_version > 0x95) ? in xhci_update_hub_device()
5119 if (xhci->hci_version > 0x95) in xhci_update_hub_device()
5135 return readl(&xhci->run_regs->microframe_index) >> 3; in xhci_get_frame()
5140 xhci->usb2_rhub.hcd = hcd; in xhci_hcd_init_usb2_data()
5141 hcd->speed = HCD_USB2; in xhci_hcd_init_usb2_data()
5142 hcd->self.root_hub->speed = USB_SPEED_HIGH; in xhci_hcd_init_usb2_data()
5148 hcd->has_tt = 1; in xhci_hcd_init_usb2_data()
5158 * is a two digit BCD containig minor and sub-minor numbers. in xhci_hcd_init_usb3_data()
5164 if (xhci->usb3_rhub.min_rev == 0x1) in xhci_hcd_init_usb3_data()
5167 minor_rev = xhci->usb3_rhub.min_rev / 0x10; in xhci_hcd_init_usb3_data()
5171 hcd->speed = HCD_USB32; in xhci_hcd_init_usb3_data()
5172 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_hcd_init_usb3_data()
5173 hcd->self.root_hub->rx_lanes = 2; in xhci_hcd_init_usb3_data()
5174 hcd->self.root_hub->tx_lanes = 2; in xhci_hcd_init_usb3_data()
5175 hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x2; in xhci_hcd_init_usb3_data()
5178 hcd->speed = HCD_USB31; in xhci_hcd_init_usb3_data()
5179 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS; in xhci_hcd_init_usb3_data()
5180 hcd->self.root_hub->ssp_rate = USB_SSP_GEN_2x1; in xhci_hcd_init_usb3_data()
5186 xhci->usb3_rhub.hcd = hcd; in xhci_hcd_init_usb3_data()
5196 struct device *dev = hcd->self.sysdev; in xhci_gen_setup()
5199 /* Accept arbitrarily long scatter-gather lists */ in xhci_gen_setup()
5200 hcd->self.sg_tablesize = ~0; in xhci_gen_setup()
5203 hcd->self.no_sg_constraint = 1; in xhci_gen_setup()
5205 /* XHCI controllers don't stop the ep queue on short packets :| */ in xhci_gen_setup()
5206 hcd->self.no_stop_on_short = 1; in xhci_gen_setup()
5215 mutex_init(&xhci->mutex); in xhci_gen_setup()
5216 xhci->main_hcd = hcd; in xhci_gen_setup()
5217 xhci->cap_regs = hcd->regs; in xhci_gen_setup()
5218 xhci->op_regs = hcd->regs + in xhci_gen_setup()
5219 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5220 xhci->run_regs = hcd->regs + in xhci_gen_setup()
5221 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK); in xhci_gen_setup()
5222 /* Cache read-only capability registers */ in xhci_gen_setup()
5223 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1); in xhci_gen_setup()
5224 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2); in xhci_gen_setup()
5225 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3); in xhci_gen_setup()
5226 xhci->hci_version = HC_VERSION(readl(&xhci->cap_regs->hc_capbase)); in xhci_gen_setup()
5227 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params); in xhci_gen_setup()
5228 if (xhci->hci_version > 0x100) in xhci_gen_setup()
5229 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2); in xhci_gen_setup()
5231 /* xhci-plat or xhci-pci might have set max_interrupters already */ in xhci_gen_setup()
5232 if ((!xhci->max_interrupters) || in xhci_gen_setup()
5233 xhci->max_interrupters > HCS_MAX_INTRS(xhci->hcs_params1)) in xhci_gen_setup()
5234 xhci->max_interrupters = HCS_MAX_INTRS(xhci->hcs_params1); in xhci_gen_setup()
5236 xhci->quirks |= quirks; in xhci_gen_setup()
5242 * success event after a short transfer. This quirk will ignore such in xhci_gen_setup()
5245 if (xhci->hci_version > 0x96) in xhci_gen_setup()
5246 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_gen_setup()
5263 * On some xHCI controllers (e.g. R-Car SoCs), the AC64 bit (bit 0) in xhci_gen_setup()
5264 * of HCCPARAMS1 is set to 1. However, the xHCs don't support 64-bit in xhci_gen_setup()
5266 * bit of xhci->hcc_params to call dma_set_coherent_mask(dev, in xhci_gen_setup()
5269 if (xhci->quirks & XHCI_NO_64BIT_SUPPORT) in xhci_gen_setup()
5270 xhci->hcc_params &= ~BIT(0); in xhci_gen_setup()
5272 /* Set dma_mask and coherent_dma_mask to 64-bits, in xhci_gen_setup()
5273 * if xHC supports 64-bit addressing */ in xhci_gen_setup()
5274 if (HCC_64BIT_ADDR(xhci->hcc_params) && in xhci_gen_setup()
5276 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); in xhci_gen_setup()
5280 * This is to avoid error in cases where a 32-bit USB in xhci_gen_setup()
5281 * controller is used on a 64-bit capable system. in xhci_gen_setup()
5286 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n"); in xhci_gen_setup()
5303 xhci->hcc_params, xhci->hci_version, xhci->quirks); in xhci_gen_setup()
5320 spin_lock_irqsave(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5321 udev = (struct usb_device *)ep->hcpriv; in xhci_clear_tt_buffer_complete()
5322 slot_id = udev->slot_id; in xhci_clear_tt_buffer_complete()
5323 ep_index = xhci_get_endpoint_index(&ep->desc); in xhci_clear_tt_buffer_complete()
5325 xhci->devs[slot_id]->eps[ep_index].ep_state &= ~EP_CLEARING_TT; in xhci_clear_tt_buffer_complete()
5327 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_clear_tt_buffer_complete()
5331 .description = "xhci-hcd",
5406 drv->hcd_priv_size += over->extra_priv_size; in xhci_init_driver()
5407 if (over->reset) in xhci_init_driver()
5408 drv->reset = over->reset; in xhci_init_driver()
5409 if (over->start) in xhci_init_driver()
5410 drv->start = over->start; in xhci_init_driver()
5411 if (over->add_endpoint) in xhci_init_driver()
5412 drv->add_endpoint = over->add_endpoint; in xhci_init_driver()
5413 if (over->drop_endpoint) in xhci_init_driver()
5414 drv->drop_endpoint = over->drop_endpoint; in xhci_init_driver()
5415 if (over->check_bandwidth) in xhci_init_driver()
5416 drv->check_bandwidth = over->check_bandwidth; in xhci_init_driver()
5417 if (over->reset_bandwidth) in xhci_init_driver()
5418 drv->reset_bandwidth = over->reset_bandwidth; in xhci_init_driver()
5419 if (over->update_hub_device) in xhci_init_driver()
5420 drv->update_hub_device = over->update_hub_device; in xhci_init_driver()
5421 if (over->hub_control) in xhci_init_driver()
5422 drv->hub_control = over->hub_control; in xhci_init_driver()
5452 return -ENODEV; in xhci_hcd_init()