1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* HC not running - set to 1 when run/stop bit is cleared. */
16 /* HCCPARAMS offset from PCI base address */
21 /* Command and Status registers offset from the Operational Registers address */
28 /* bits 7:0 - how long is the Capabilities register */
35 /* Extended capability IDs - ID 0 reserved */
41 /* IDs 6-9 reserved */
45 /* USB Legacy Support Capability - section 7.1.1 */
49 /* USB Legacy Support Capability - section 7.1.1 */
50 /* Add this offset, plus the value of xECP in HCCPARAMS to the base address */
53 /* USB Legacy Support Control and Status Register  - section 7.1.2 */
54 /* Add this offset, plus the value of xECP in HCCPARAMS to the base address */
60 /* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */
63 /* USB 2.0 xHCI 1.0 hardware LMP capability - section 7.2.2.1.3.2 */
68 /* start/stop HC execution - do not write unless HC is halted*/
70 /* Event Interrupt Enable - get irq when EINT bit is set in USBSTS register */
72 /* Host System Error Interrupt Enable - get irq when HSEIE bit set in USBSTS */
74 /* Enable Wrap Event - '1' means xHC generates an event when MFINDEX wraps. */
88  * @port_info:		Port offset, count, and protocol-defined information.
96 #define	XHCI_EXT_PORT_MAJOR(x)	(((x) >> 24) & 0xff)  argument
97 #define	XHCI_EXT_PORT_MINOR(x)	(((x) >> 16) & 0xff)  argument
98 #define	XHCI_EXT_PORT_PSIC(x)	(((x) >> 28) & 0x0f)  argument
99 #define	XHCI_EXT_PORT_OFF(x)	((x) & 0xff)  argument
100 #define	XHCI_EXT_PORT_COUNT(x)	(((x) >> 8) & 0xff)  argument
102 #define	XHCI_EXT_PORT_PSIV(x)	(((x) >> 0) & 0x0f)  argument
103 #define	XHCI_EXT_PORT_PSIE(x)	(((x) >> 4) & 0x03)  argument
104 #define	XHCI_EXT_PORT_PLT(x)	(((x) >> 6) & 0x03)  argument
105 #define	XHCI_EXT_PORT_PFD(x)	(((x) >> 8) & 0x01)  argument
106 #define	XHCI_EXT_PORT_LP(x)	(((x) >> 14) & 0x03)  argument
107 #define	XHCI_EXT_PORT_PSIM(x)	(((x) >> 16) & 0xffff)  argument
112  * Find the offset of the extended capabilities with capability ID id.
120  * Returns the offset of the next matching extended capability structure.
129 	u32 offset;  in xhci_find_next_ext_cap()  local
131 	offset = start;  in xhci_find_next_ext_cap()
136 		offset = XHCI_HCC_EXT_CAPS(val) << 2;  in xhci_find_next_ext_cap()
137 		if (!offset)  in xhci_find_next_ext_cap()
141 		val = readl(base + offset);  in xhci_find_next_ext_cap()
144 		if (offset != start && (id == 0 || XHCI_EXT_CAPS_ID(val) == id))  in xhci_find_next_ext_cap()
145 			return offset;  in xhci_find_next_ext_cap()
148 		offset += next << 2;  in xhci_find_next_ext_cap()