Lines Matching full:ehci
9 /* definitions used for the EHCI driver */
92 * ehci-timer.c) in parallel with this list.
270 static inline struct usb_hcd *ehci_to_hcd(struct ehci_hcd *ehci) in ehci_to_hcd() argument
272 return container_of((void *) ehci, struct usb_hcd, hcd_priv); in ehci_to_hcd()
281 #define QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma) argument
284 * EHCI Specification 0.95 Section 3.5
292 /* first part defined by EHCI spec */
293 __hc32 hw_next; /* see EHCI 3.5.1 */
294 __hc32 hw_alt_next; /* see EHCI 3.5.2 */
295 __hc32 hw_token; /* see EHCI 3.5.3 */
310 #define ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE) argument
311 #define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT) argument
312 #define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS) argument
314 __hc32 hw_buf[5]; /* see EHCI 3.5.4 */
325 #define QTD_MASK(ehci) cpu_to_hc32(ehci, ~0x1f) argument
332 #define Q_NEXT_TYPE(ehci, dma) ((dma) & cpu_to_hc32(ehci, 3 << 1)) argument
338 * can be used on one system with SoC EHCI controller using big-endian
339 * descriptors as well as a normal little-endian PCI EHCI controller.
348 #define QH_NEXT(ehci, dma) \ argument
349 (cpu_to_hc32(ehci, (((u32) dma) & ~0x01f) | Q_TYPE_QH))
352 #define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */ argument
374 * EHCI Specification 0.95 Section 3.6
381 /* first part defined by EHCI spec */
383 __hc32 hw_next; /* see EHCI 3.6.1 */
384 __hc32 hw_info1; /* see EHCI 3.6.2 */
392 __hc32 hw_info2; /* see EHCI 3.6.2 */
398 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */
472 * acts like a qh would, if EHCI had them for ISO.
507 * EHCI Specification 0.95 Section 3.3
513 /* first part defined by EHCI spec */
514 __hc32 hw_next; /* see EHCI 3.3.1 */
515 __hc32 hw_transaction[8]; /* see EHCI 3.3.2 */
523 #define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE) argument
525 __hc32 hw_bufp[7]; /* see EHCI 3.3.3 */
545 * EHCI Specification 0.95 Section 3.4
551 /* first part defined by EHCI spec */
553 /* uses bit field macros above - see EHCI 0.95 Table 3-8 */
554 __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */
555 __hc32 hw_uframe; /* EHCI table 3-10 */
556 __hc32 hw_results; /* EHCI table 3-11 */
568 #define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE) argument
570 __hc32 hw_buf[2]; /* EHCI table 3-12 */
571 __hc32 hw_backpointer; /* EHCI table 3-13 */
588 * EHCI Specification 0.96 Section 3.7
638 #define ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) \ argument
639 ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup)
641 #define ehci_prepare_ports_for_controller_resume(ehci) \ argument
642 ehci_adjust_port_wakeup_flags(ehci, false, false)
649 * Some EHCI controllers have a Transaction Translator built into the
659 ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) in ehci_port_speed() argument
661 if (ehci_is_TDI(ehci)) { in ehci_port_speed()
662 switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) { in ehci_port_speed()
679 #define ehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED argument
751 static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, in ehci_readl() argument
755 return ehci_big_endian_mmio(ehci) ? in ehci_readl()
775 static inline void ehci_writel(const struct ehci_hcd *ehci, in ehci_writel() argument
779 ehci_big_endian_mmio(ehci) ? in ehci_writel()
783 if (ehci->imx28_write_fix) in ehci_writel()
796 static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) in set_ohci_hcfs() argument
800 hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS); in set_ohci_hcfs()
806 writel_be(hc_control, ehci->ohci_hcctrl_reg); in set_ohci_hcfs()
807 (void) readl_be(ehci->ohci_hcctrl_reg); in set_ohci_hcfs()
810 static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) in set_ohci_hcfs() argument
817 * The AMCC 440EPx not only implements its EHCI registers in big-endian
820 * EHCI controllers accessed through PCI work normally (little-endian
826 /* cpu to ehci */
827 static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x) in cpu_to_hc32() argument
829 return ehci_big_endian_desc(ehci) in cpu_to_hc32()
834 /* ehci to cpu */
835 static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x) in hc32_to_cpu() argument
837 return ehci_big_endian_desc(ehci) in hc32_to_cpu()
842 static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x) in hc32_to_cpup() argument
844 return ehci_big_endian_desc(ehci) in hc32_to_cpup()
851 /* cpu to ehci */
852 static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x) in cpu_to_hc32() argument
857 /* ehci to cpu */
858 static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x) in hc32_to_cpu() argument
863 static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x) in hc32_to_cpup() argument
872 #define ehci_dbg(ehci, fmt, args...) \ argument
873 dev_dbg(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
874 #define ehci_err(ehci, fmt, args...) \ argument
875 dev_err(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
876 #define ehci_info(ehci, fmt, args...) \ argument
877 dev_info(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
878 #define ehci_warn(ehci, fmt, args...) \ argument
879 dev_warn(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
883 /* Declarations of things exported for use by ehci platform drivers */
895 extern int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
897 extern int ehci_reset(struct ehci_hcd *ehci);
901 extern void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,