usb/dwc2/hw.h

1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3  * hw.h - DesignWare HS OTG Controller hardware definitions
5  * Copyright 2004-2013 Synopsys, Inc.
20 #define GOTGCTL_ASESVLD			BIT(18)
39 #define GOTGINT_A_DEV_TOUT_CHG		BIT(18)
71 #define GUSBCFG_ULPI_INT_PROT_DIS	BIT(25)
78 #define GUSBCFG_ULPI_AUTO_RES		BIT(18)
120 #define GINTSTS_HCHINT			BIT(25)
128 #define GINTSTS_IEPINT			BIT(18)
150 #define GRXSTS_FN_MASK			(0x7f << 25)
151 #define GRXSTS_FN_SHIFT			25
195 #define GI2CCTL_I2CSUSPCTL		BIT(25)
226 #define GHWCFG2_PERIO_EP_SUPPORTED		BIT(18)
282 #define GHWCFG4_DED_FIFO_EN			BIT(25)
283 #define GHWCFG4_DED_FIFO_SHIFT		25
311 #define GLPMCFG_LPM_RETRYCNT_STS_MASK	(0x7 << 25)
312 #define GLPMCFG_LPM_RETRYCNT_STS_SHIFT	25
342 #define GPWRDN_STS_CHGINT_MSK		BIT(18)
372 #define ADPCTL_ADP_SNS_INT_MSK		BIT(25)
379 #define ADPCTL_ENASNS			BIT(18)
406 #define DPTXFSIZN(_a)			HSOTG_REG(0x104 + (((_a) - 1) * 4))
420 #define DCFG_EPMISCNT_MASK		(0x1f << 18)
421 #define DCFG_EPMISCNT_SHIFT		18
423 #define DCFG_EPMISCNT(_x)		((_x) << 18)
514  * bits[29..28] - reserved (no SetD0PID, SetD1PID)
515  * bits[25..22] - should always be zero, this isn't a periodic endpoint
516  * bits[10..0]  - MPS setting different for EP0
539 #define DXEPCTL_EPTYPE_MASK		(0x3 << 18)
540 #define DXEPCTL_EPTYPE_CONTROL		(0x0 << 18)
541 #define DXEPCTL_EPTYPE_ISO		(0x1 << 18)
542 #define DXEPCTL_EPTYPE_BULK		(0x2 << 18)
543 #define DXEPCTL_EPTYPE_INTERRUPT	(0x3 << 18)
698 #define TXSTS_QTOP_TOKEN_MASK		(0x3 << 25)
699 #define TXSTS_QTOP_TOKEN_SHIFT		25
739 #define HCCHAR_EPTYPE_MASK		(0x3 << 18)
740 #define HCCHAR_EPTYPE_SHIFT		18
805  * struct dwc2_dma_desc - DMA descriptor structure,
826 #define HOST_DMA_IOC			BIT(25)
852 #define DEV_DMA_IOC			BIT(25)