Lines Matching full:specifies
211 * @otg_caps: Specifies the OTG capabilities. OTG caps from the platform parameters,
219 * @host_dma: Specifies whether to use slave or DMA mode for accessing
224 * @dma_desc_enable: When DMA mode is enabled, specifies whether to use
230 * @dma_desc_fs_enable: When DMA mode is enabled, specifies whether to use
237 * @speed: Specifies the maximum speed of operation in host and
246 * @en_multiple_tx_fifo: Specifies whether dedicated per-endpoint transmit FIFOs
276 * @phy_type: Specifies the type of PHY interface to use. By default,
282 * @phy_utmi_width: Specifies the UTMI+ Data Width (in bits). This parameter
291 * @phy_ulpi_ddr: Specifies whether the ULPI operates at double or single
298 * @phy_ulpi_ext_vbus: For a ULPI phy, specifies whether to use the internal or
302 * @i2c_enable: Specifies whether to use the I2Cinterface for a full
316 * @host_support_fs_ls_low_power: Specifies whether low power mode is supported
321 * @host_ls_low_power_phy_clk: Specifies the PHY clock rate in low power mode
349 * @external_id_pin_ctl: Specifies whether ID pin is handled externally.
354 * @power_down: Specifies whether the controller support power_down.
361 * @no_clock_gating: Specifies whether to avoid clock gating feature.
565 * @dma_desc_enable: When DMA mode is enabled, specifies whether to use
573 * @en_multiple_tx_fifo: Specifies whether dedicated per-endpoint transmit FIFOs
603 * @i2c_enable: Specifies whether to use the I2Cinterface for a full
886 * @needs_byte_swap: Specifies whether the opposite endianness.