Lines Matching +full:port +full:- +full:level
1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - Copyright (C) 2014 GridPoint
45 #define SC16IS7XX_TXLVL_REG (0x08) /* TX FIFO level */
46 #define SC16IS7XX_RXLVL_REG (0x09) /* RX FIFO level */
48 * - only on 75x/76x
51 * - only on 75x/76x
54 * - only on 75x/76x
57 * - only on 75x/76x
63 #define SC16IS7XX_TLR_REG (0x07) /* Trigger level */
85 /* IER register bits - write only if (EFR[4] == 1) */
95 #define SC16IS7XX_FCR_RXLVLL_BIT (1 << 6) /* RX Trigger level LSB */
96 #define SC16IS7XX_FCR_RXLVLH_BIT (1 << 7) /* RX Trigger level MSB */
98 /* FCR register bits - write only if (EFR[4] == 1) */
99 #define SC16IS7XX_FCR_TXLVLL_BIT (1 << 4) /* TX Trigger level LSB */
100 #define SC16IS7XX_FCR_TXLVLH_BIT (1 << 5) /* TX Trigger level MSB */
108 #define SC16IS7XX_IIR_RTOI_SRC 0x0c /* RX time-out interrupt */
110 * - only on 75x/76x
113 * - only on 75x/76x
125 * 00 -> 5 bit words
126 * 01 -> 6 bit words
127 * 10 -> 7 bit words
128 * 11 -> 8 bit words
133 * 0 -> 1 stop bit
134 * 1 -> 1-1.5 stop bits if
140 #define SC16IS7XX_LCR_FORCEPARITY_BIT (1 << 5) /* 9-bit multidrop parity */
154 * - only on 75x/76x
160 * - write enabled
164 * - write enabled
168 * - write enabled
187 * - only on 75x/76x
191 * - only on 75x/76x
195 * - only on 75x/76x
199 * - only on 75x/76x
202 * - only on 75x/76x
205 * - only on 75x/76x
214 * no built-in hardware check to make sure this condition is met. Also, the TCR
228 * When the trigger level setting in TLR is zero, the SC16IS74x/75x/76x uses the
229 * trigger level setting defined in FCR. If TLR has non-zero trigger level value
230 * the trigger level defined in FCR is discarded. This applies to both transmit
231 * FIFO and receive FIFO trigger level setting.
233 * When TLR is used for RX trigger level control, FCR[7:6] should be left at the
246 #define SC16IS7XX_EFCR_9BIT_MODE_BIT (1 << 0) /* Enable 9-bit or Multidrop
254 * - Only 75x/76x
256 * - Only 76x
271 * 00 -> no transmitter flow
273 * 01 -> transmitter generates
275 * 10 -> transmitter generates
277 * 11 -> transmitter generates
285 * 00 -> no received flow
287 * 01 -> receiver compares
289 * 10 -> receiver compares
291 * 11 -> receiver compares
326 struct uart_port port; member
363 static u8 sc16is7xx_port_read(struct uart_port *port, u8 reg) in sc16is7xx_port_read() argument
365 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_read()
368 regmap_read(one->regmap, reg, &val); in sc16is7xx_port_read()
373 static void sc16is7xx_port_write(struct uart_port *port, u8 reg, u8 val) in sc16is7xx_port_write() argument
375 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_write()
377 regmap_write(one->regmap, reg, val); in sc16is7xx_port_write()
380 static void sc16is7xx_fifo_read(struct uart_port *port, u8 *rxbuf, unsigned int rxlen) in sc16is7xx_fifo_read() argument
382 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_read()
384 regmap_noinc_read(one->regmap, SC16IS7XX_RHR_REG, rxbuf, rxlen); in sc16is7xx_fifo_read()
387 static void sc16is7xx_fifo_write(struct uart_port *port, u8 *txbuf, u8 to_send) in sc16is7xx_fifo_write() argument
389 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_fifo_write()
392 * Don't send zero-length data, at least on SPI it confuses the chip in sc16is7xx_fifo_write()
398 regmap_noinc_write(one->regmap, SC16IS7XX_THR_REG, txbuf, to_send); in sc16is7xx_fifo_write()
401 static void sc16is7xx_port_update(struct uart_port *port, u8 reg, in sc16is7xx_port_update() argument
404 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_update()
406 regmap_update_bits(one->regmap, reg, mask, val); in sc16is7xx_port_update()
409 static void sc16is7xx_power(struct uart_port *port, int on) in sc16is7xx_power() argument
411 sc16is7xx_port_update(port, SC16IS7XX_IER_REG, in sc16is7xx_power()
430 static void sc16is7xx_efr_lock(struct uart_port *port) in sc16is7xx_efr_lock() argument
432 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_efr_lock()
434 mutex_lock(&one->efr_lock); in sc16is7xx_efr_lock()
437 one->old_lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); in sc16is7xx_efr_lock()
440 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_CONF_MODE_B); in sc16is7xx_efr_lock()
443 regcache_cache_bypass(one->regmap, true); in sc16is7xx_efr_lock()
446 static void sc16is7xx_efr_unlock(struct uart_port *port) in sc16is7xx_efr_unlock() argument
448 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_efr_unlock()
450 /* Re-enable cache updates when writing to normal registers */ in sc16is7xx_efr_unlock()
451 regcache_cache_bypass(one->regmap, false); in sc16is7xx_efr_unlock()
454 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, one->old_lcr); in sc16is7xx_efr_unlock()
456 mutex_unlock(&one->efr_lock); in sc16is7xx_efr_unlock()
459 static void sc16is7xx_ier_clear(struct uart_port *port, u8 bit) in sc16is7xx_ier_clear() argument
461 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_clear()
462 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_clear()
464 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_clear()
466 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_clear()
467 one->config.ier_mask |= bit; in sc16is7xx_ier_clear()
468 one->config.ier_val &= ~bit; in sc16is7xx_ier_clear()
469 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_clear()
472 static void sc16is7xx_ier_set(struct uart_port *port, u8 bit) in sc16is7xx_ier_set() argument
474 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_ier_set()
475 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_ier_set()
477 lockdep_assert_held_once(&port->lock); in sc16is7xx_ier_set()
479 one->config.flags |= SC16IS7XX_RECONF_IER; in sc16is7xx_ier_set()
480 one->config.ier_mask |= bit; in sc16is7xx_ier_set()
481 one->config.ier_val |= bit; in sc16is7xx_ier_set()
482 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_ier_set()
485 static void sc16is7xx_stop_tx(struct uart_port *port) in sc16is7xx_stop_tx() argument
487 sc16is7xx_ier_clear(port, SC16IS7XX_IER_THRI_BIT); in sc16is7xx_stop_tx()
490 static void sc16is7xx_stop_rx(struct uart_port *port) in sc16is7xx_stop_rx() argument
492 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT); in sc16is7xx_stop_rx()
557 static int sc16is7xx_set_baud(struct uart_port *port, int baud) in sc16is7xx_set_baud() argument
559 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_baud()
562 unsigned long clk = port->uartclk, div = clk / 16 / baud; in sc16is7xx_set_baud()
570 sc16is7xx_efr_lock(port); in sc16is7xx_set_baud()
571 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, in sc16is7xx_set_baud()
574 sc16is7xx_efr_unlock(port); in sc16is7xx_set_baud()
576 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, in sc16is7xx_set_baud()
581 lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); in sc16is7xx_set_baud()
582 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_set_baud()
586 regcache_cache_bypass(one->regmap, true); in sc16is7xx_set_baud()
587 sc16is7xx_port_write(port, SC16IS7XX_DLH_REG, div / 256); in sc16is7xx_set_baud()
588 sc16is7xx_port_write(port, SC16IS7XX_DLL_REG, div % 256); in sc16is7xx_set_baud()
589 regcache_cache_bypass(one->regmap, false); in sc16is7xx_set_baud()
592 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_baud()
597 static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen, in sc16is7xx_handle_rx() argument
600 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_rx()
605 if (unlikely(rxlen >= sizeof(s->buf))) { in sc16is7xx_handle_rx()
606 dev_warn_ratelimited(port->dev, in sc16is7xx_handle_rx()
608 port->line, rxlen); in sc16is7xx_handle_rx()
609 port->icount.buf_overrun++; in sc16is7xx_handle_rx()
610 /* Ensure sanity of RX level */ in sc16is7xx_handle_rx()
611 rxlen = sizeof(s->buf); in sc16is7xx_handle_rx()
617 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG); in sc16is7xx_handle_rx()
624 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG); in sc16is7xx_handle_rx()
627 sc16is7xx_fifo_read(port, s->buf, rxlen); in sc16is7xx_handle_rx()
633 port->icount.rx++; in sc16is7xx_handle_rx()
638 port->icount.brk++; in sc16is7xx_handle_rx()
639 if (uart_handle_break(port)) in sc16is7xx_handle_rx()
642 port->icount.parity++; in sc16is7xx_handle_rx()
644 port->icount.frame++; in sc16is7xx_handle_rx()
646 port->icount.overrun++; in sc16is7xx_handle_rx()
648 lsr &= port->read_status_mask; in sc16is7xx_handle_rx()
660 ch = s->buf[i]; in sc16is7xx_handle_rx()
661 if (uart_handle_sysrq_char(port, ch)) in sc16is7xx_handle_rx()
664 if (lsr & port->ignore_status_mask) in sc16is7xx_handle_rx()
667 uart_insert_char(port, lsr, SC16IS7XX_LSR_OE_BIT, ch, in sc16is7xx_handle_rx()
670 rxlen -= bytes_read; in sc16is7xx_handle_rx()
673 tty_flip_buffer_push(&port->state->port); in sc16is7xx_handle_rx()
676 static void sc16is7xx_handle_tx(struct uart_port *port) in sc16is7xx_handle_tx() argument
678 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_handle_tx()
679 struct circ_buf *xmit = &port->state->xmit; in sc16is7xx_handle_tx()
683 if (unlikely(port->x_char)) { in sc16is7xx_handle_tx()
684 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char); in sc16is7xx_handle_tx()
685 port->icount.tx++; in sc16is7xx_handle_tx()
686 port->x_char = 0; in sc16is7xx_handle_tx()
690 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { in sc16is7xx_handle_tx()
691 uart_port_lock_irqsave(port, &flags); in sc16is7xx_handle_tx()
692 sc16is7xx_stop_tx(port); in sc16is7xx_handle_tx()
693 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_handle_tx()
701 txlen = sc16is7xx_port_read(port, SC16IS7XX_TXLVL_REG); in sc16is7xx_handle_tx()
703 dev_err_ratelimited(port->dev, in sc16is7xx_handle_tx()
712 s->buf[i] = xmit->buf[xmit->tail]; in sc16is7xx_handle_tx()
713 uart_xmit_advance(port, 1); in sc16is7xx_handle_tx()
716 sc16is7xx_fifo_write(port, s->buf, to_send); in sc16is7xx_handle_tx()
719 uart_port_lock_irqsave(port, &flags); in sc16is7xx_handle_tx()
721 uart_write_wakeup(port); in sc16is7xx_handle_tx()
724 sc16is7xx_stop_tx(port); in sc16is7xx_handle_tx()
726 sc16is7xx_ier_set(port, SC16IS7XX_IER_THRI_BIT); in sc16is7xx_handle_tx()
727 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_handle_tx()
730 static unsigned int sc16is7xx_get_hwmctrl(struct uart_port *port) in sc16is7xx_get_hwmctrl() argument
732 u8 msr = sc16is7xx_port_read(port, SC16IS7XX_MSR_REG); in sc16is7xx_get_hwmctrl()
744 struct uart_port *port = &one->port; in sc16is7xx_update_mlines() local
748 lockdep_assert_held_once(&one->efr_lock); in sc16is7xx_update_mlines()
750 status = sc16is7xx_get_hwmctrl(port); in sc16is7xx_update_mlines()
751 changed = status ^ one->old_mctrl; in sc16is7xx_update_mlines()
756 one->old_mctrl = status; in sc16is7xx_update_mlines()
758 uart_port_lock_irqsave(port, &flags); in sc16is7xx_update_mlines()
760 port->icount.rng++; in sc16is7xx_update_mlines()
762 port->icount.dsr++; in sc16is7xx_update_mlines()
764 uart_handle_dcd_change(port, status & TIOCM_CAR); in sc16is7xx_update_mlines()
766 uart_handle_cts_change(port, status & TIOCM_CTS); in sc16is7xx_update_mlines()
768 wake_up_interruptible(&port->state->port.delta_msr_wait); in sc16is7xx_update_mlines()
769 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_update_mlines()
776 struct uart_port *port = &s->p[portno].port; in sc16is7xx_port_irq() local
777 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_port_irq()
779 mutex_lock(&one->efr_lock); in sc16is7xx_port_irq()
781 iir = sc16is7xx_port_read(port, SC16IS7XX_IIR_REG); in sc16is7xx_port_irq()
794 rxlen = sc16is7xx_port_read(port, SC16IS7XX_RXLVL_REG); in sc16is7xx_port_irq()
798 * time-out interrupt but no data in the FIFO. This is in sc16is7xx_port_irq()
808 sc16is7xx_handle_rx(port, rxlen, iir); in sc16is7xx_port_irq()
816 sc16is7xx_handle_tx(port); in sc16is7xx_port_irq()
819 dev_err_ratelimited(port->dev, in sc16is7xx_port_irq()
821 port->line, iir); in sc16is7xx_port_irq()
826 mutex_unlock(&one->efr_lock); in sc16is7xx_port_irq()
842 for (i = 0; i < s->devtype->nr_uart; ++i) in sc16is7xx_irq()
851 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port); in sc16is7xx_tx_proc() local
852 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_tx_proc()
854 if ((port->rs485.flags & SER_RS485_ENABLED) && in sc16is7xx_tx_proc()
855 (port->rs485.delay_rts_before_send > 0)) in sc16is7xx_tx_proc()
856 msleep(port->rs485.delay_rts_before_send); in sc16is7xx_tx_proc()
858 mutex_lock(&one->efr_lock); in sc16is7xx_tx_proc()
859 sc16is7xx_handle_tx(port); in sc16is7xx_tx_proc()
860 mutex_unlock(&one->efr_lock); in sc16is7xx_tx_proc()
863 static void sc16is7xx_reconf_rs485(struct uart_port *port) in sc16is7xx_reconf_rs485() argument
868 struct serial_rs485 *rs485 = &port->rs485; in sc16is7xx_reconf_rs485()
871 uart_port_lock_irqsave(port, &irqflags); in sc16is7xx_reconf_rs485()
872 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_reconf_rs485()
875 if (rs485->flags & SER_RS485_RTS_AFTER_SEND) in sc16is7xx_reconf_rs485()
878 uart_port_unlock_irqrestore(port, irqflags); in sc16is7xx_reconf_rs485()
880 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, mask, efcr); in sc16is7xx_reconf_rs485()
889 uart_port_lock_irqsave(&one->port, &irqflags); in sc16is7xx_reg_proc()
890 config = one->config; in sc16is7xx_reg_proc()
891 memset(&one->config, 0, sizeof(one->config)); in sc16is7xx_reg_proc()
892 uart_port_unlock_irqrestore(&one->port, irqflags); in sc16is7xx_reg_proc()
898 if (one->port.mctrl & TIOCM_RTS) in sc16is7xx_reg_proc()
901 if (one->port.mctrl & TIOCM_DTR) in sc16is7xx_reg_proc()
904 if (one->port.mctrl & TIOCM_LOOP) in sc16is7xx_reg_proc()
906 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG, in sc16is7xx_reg_proc()
914 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG, in sc16is7xx_reg_proc()
918 sc16is7xx_reconf_rs485(&one->port); in sc16is7xx_reg_proc()
924 struct sc16is7xx_port *s = dev_get_drvdata(one->port.dev); in sc16is7xx_ms_proc()
926 if (one->port.state) { in sc16is7xx_ms_proc()
927 mutex_lock(&one->efr_lock); in sc16is7xx_ms_proc()
929 mutex_unlock(&one->efr_lock); in sc16is7xx_ms_proc()
931 kthread_queue_delayed_work(&s->kworker, &one->ms_work, HZ); in sc16is7xx_ms_proc()
935 static void sc16is7xx_enable_ms(struct uart_port *port) in sc16is7xx_enable_ms() argument
937 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_enable_ms()
938 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_enable_ms()
940 lockdep_assert_held_once(&port->lock); in sc16is7xx_enable_ms()
942 kthread_queue_delayed_work(&s->kworker, &one->ms_work, 0); in sc16is7xx_enable_ms()
945 static void sc16is7xx_start_tx(struct uart_port *port) in sc16is7xx_start_tx() argument
947 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_start_tx()
948 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_start_tx()
950 kthread_queue_work(&s->kworker, &one->tx_work); in sc16is7xx_start_tx()
953 static void sc16is7xx_throttle(struct uart_port *port) in sc16is7xx_throttle() argument
960 * AutoRTS feature will de-activate RTS output. in sc16is7xx_throttle()
962 uart_port_lock_irqsave(port, &flags); in sc16is7xx_throttle()
963 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT); in sc16is7xx_throttle()
964 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_throttle()
967 static void sc16is7xx_unthrottle(struct uart_port *port) in sc16is7xx_unthrottle() argument
971 uart_port_lock_irqsave(port, &flags); in sc16is7xx_unthrottle()
972 sc16is7xx_ier_set(port, SC16IS7XX_IER_RDI_BIT); in sc16is7xx_unthrottle()
973 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_unthrottle()
976 static unsigned int sc16is7xx_tx_empty(struct uart_port *port) in sc16is7xx_tx_empty() argument
980 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG); in sc16is7xx_tx_empty()
985 static unsigned int sc16is7xx_get_mctrl(struct uart_port *port) in sc16is7xx_get_mctrl() argument
987 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_get_mctrl()
989 /* Called with port lock taken so we can only return cached value */ in sc16is7xx_get_mctrl()
990 return one->old_mctrl; in sc16is7xx_get_mctrl()
993 static void sc16is7xx_set_mctrl(struct uart_port *port, unsigned int mctrl) in sc16is7xx_set_mctrl() argument
995 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_set_mctrl()
996 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_mctrl()
998 one->config.flags |= SC16IS7XX_RECONF_MD; in sc16is7xx_set_mctrl()
999 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_set_mctrl()
1002 static void sc16is7xx_break_ctl(struct uart_port *port, int break_state) in sc16is7xx_break_ctl() argument
1004 sc16is7xx_port_update(port, SC16IS7XX_LCR_REG, in sc16is7xx_break_ctl()
1009 static void sc16is7xx_set_termios(struct uart_port *port, in sc16is7xx_set_termios() argument
1013 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_set_termios()
1018 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_set_termios()
1021 termios->c_cflag &= ~CMSPAR; in sc16is7xx_set_termios()
1024 switch (termios->c_cflag & CSIZE) { in sc16is7xx_set_termios()
1039 termios->c_cflag &= ~CSIZE; in sc16is7xx_set_termios()
1040 termios->c_cflag |= CS8; in sc16is7xx_set_termios()
1045 if (termios->c_cflag & PARENB) { in sc16is7xx_set_termios()
1047 if (!(termios->c_cflag & PARODD)) in sc16is7xx_set_termios()
1052 if (termios->c_cflag & CSTOPB) in sc16is7xx_set_termios()
1056 port->read_status_mask = SC16IS7XX_LSR_OE_BIT; in sc16is7xx_set_termios()
1057 if (termios->c_iflag & INPCK) in sc16is7xx_set_termios()
1058 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT | in sc16is7xx_set_termios()
1060 if (termios->c_iflag & (BRKINT | PARMRK)) in sc16is7xx_set_termios()
1061 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1064 port->ignore_status_mask = 0; in sc16is7xx_set_termios()
1065 if (termios->c_iflag & IGNBRK) in sc16is7xx_set_termios()
1066 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT; in sc16is7xx_set_termios()
1067 if (!(termios->c_cflag & CREAD)) in sc16is7xx_set_termios()
1068 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; in sc16is7xx_set_termios()
1071 port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS); in sc16is7xx_set_termios()
1072 if (termios->c_cflag & CRTSCTS) { in sc16is7xx_set_termios()
1075 port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; in sc16is7xx_set_termios()
1077 if (termios->c_iflag & IXON) in sc16is7xx_set_termios()
1079 if (termios->c_iflag & IXOFF) in sc16is7xx_set_termios()
1083 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); in sc16is7xx_set_termios()
1086 sc16is7xx_efr_lock(port); in sc16is7xx_set_termios()
1087 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]); in sc16is7xx_set_termios()
1088 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]); in sc16is7xx_set_termios()
1089 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, in sc16is7xx_set_termios()
1091 sc16is7xx_efr_unlock(port); in sc16is7xx_set_termios()
1094 baud = uart_get_baud_rate(port, termios, old, in sc16is7xx_set_termios()
1095 port->uartclk / 16 / 4 / 0xffff, in sc16is7xx_set_termios()
1096 port->uartclk / 16); in sc16is7xx_set_termios()
1099 baud = sc16is7xx_set_baud(port, baud); in sc16is7xx_set_termios()
1101 uart_port_lock_irqsave(port, &flags); in sc16is7xx_set_termios()
1104 uart_update_timeout(port, termios->c_cflag, baud); in sc16is7xx_set_termios()
1106 if (UART_ENABLE_MS(port, termios->c_cflag)) in sc16is7xx_set_termios()
1107 sc16is7xx_enable_ms(port); in sc16is7xx_set_termios()
1109 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_set_termios()
1112 static int sc16is7xx_config_rs485(struct uart_port *port, struct ktermios *termios, in sc16is7xx_config_rs485() argument
1115 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_config_rs485()
1116 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_config_rs485()
1118 if (rs485->flags & SER_RS485_ENABLED) { in sc16is7xx_config_rs485()
1124 if (rs485->delay_rts_after_send) in sc16is7xx_config_rs485()
1125 return -EINVAL; in sc16is7xx_config_rs485()
1128 one->config.flags |= SC16IS7XX_RECONF_RS485; in sc16is7xx_config_rs485()
1129 kthread_queue_work(&s->kworker, &one->reg_work); in sc16is7xx_config_rs485()
1134 static int sc16is7xx_startup(struct uart_port *port) in sc16is7xx_startup() argument
1136 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_startup()
1140 sc16is7xx_power(port, 1); in sc16is7xx_startup()
1144 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, val); in sc16is7xx_startup()
1146 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, in sc16is7xx_startup()
1150 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, in sc16is7xx_startup()
1153 regcache_cache_bypass(one->regmap, true); in sc16is7xx_startup()
1156 sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, in sc16is7xx_startup()
1161 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, in sc16is7xx_startup()
1166 /* Flow control halt level 48, resume level 24 */ in sc16is7xx_startup()
1167 sc16is7xx_port_write(port, SC16IS7XX_TCR_REG, in sc16is7xx_startup()
1171 regcache_cache_bypass(one->regmap, false); in sc16is7xx_startup()
1174 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8); in sc16is7xx_startup()
1178 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, in sc16is7xx_startup()
1180 one->irda_mode ? in sc16is7xx_startup()
1184 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, in sc16is7xx_startup()
1192 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val); in sc16is7xx_startup()
1195 uart_port_lock_irqsave(port, &flags); in sc16is7xx_startup()
1196 sc16is7xx_enable_ms(port); in sc16is7xx_startup()
1197 uart_port_unlock_irqrestore(port, flags); in sc16is7xx_startup()
1202 static void sc16is7xx_shutdown(struct uart_port *port) in sc16is7xx_shutdown() argument
1204 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_shutdown()
1205 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port); in sc16is7xx_shutdown()
1207 kthread_cancel_delayed_work_sync(&one->ms_work); in sc16is7xx_shutdown()
1210 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0); in sc16is7xx_shutdown()
1212 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, in sc16is7xx_shutdown()
1218 sc16is7xx_power(port, 0); in sc16is7xx_shutdown()
1220 kthread_flush_worker(&s->kworker); in sc16is7xx_shutdown()
1223 static const char *sc16is7xx_type(struct uart_port *port) in sc16is7xx_type() argument
1225 struct sc16is7xx_port *s = dev_get_drvdata(port->dev); in sc16is7xx_type()
1227 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL; in sc16is7xx_type()
1230 static int sc16is7xx_request_port(struct uart_port *port) in sc16is7xx_request_port() argument
1236 static void sc16is7xx_config_port(struct uart_port *port, int flags) in sc16is7xx_config_port() argument
1239 port->type = PORT_SC16IS7XX; in sc16is7xx_config_port()
1242 static int sc16is7xx_verify_port(struct uart_port *port, in sc16is7xx_verify_port() argument
1245 if ((s->type != PORT_UNKNOWN) && (s->type != PORT_SC16IS7XX)) in sc16is7xx_verify_port()
1246 return -EINVAL; in sc16is7xx_verify_port()
1247 if (s->irq != port->irq) in sc16is7xx_verify_port()
1248 return -EINVAL; in sc16is7xx_verify_port()
1253 static void sc16is7xx_pm(struct uart_port *port, unsigned int state, in sc16is7xx_pm() argument
1256 sc16is7xx_power(port, (state == UART_PM_STATE_ON) ? 1 : 0); in sc16is7xx_pm()
1259 static void sc16is7xx_null_void(struct uart_port *port) in sc16is7xx_null_void() argument
1291 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_get() local
1293 val = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG); in sc16is7xx_gpio_get()
1301 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_set() local
1303 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset), in sc16is7xx_gpio_set()
1311 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_input() local
1313 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), 0); in sc16is7xx_gpio_direction_input()
1322 struct uart_port *port = &s->p[0].port; in sc16is7xx_gpio_direction_output() local
1323 u8 state = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG); in sc16is7xx_gpio_direction_output()
1338 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), in sc16is7xx_gpio_direction_output()
1340 sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state); in sc16is7xx_gpio_direction_output()
1351 *valid_mask = s->gpio_valid_mask; in sc16is7xx_gpio_init_valid_mask()
1358 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_gpio_chip()
1360 if (!s->devtype->nr_gpio) in sc16is7xx_setup_gpio_chip()
1363 switch (s->mctrl_mask) { in sc16is7xx_setup_gpio_chip()
1365 s->gpio_valid_mask = GENMASK(7, 0); in sc16is7xx_setup_gpio_chip()
1368 s->gpio_valid_mask = GENMASK(3, 0); in sc16is7xx_setup_gpio_chip()
1371 s->gpio_valid_mask = GENMASK(7, 4); in sc16is7xx_setup_gpio_chip()
1377 if (s->gpio_valid_mask == 0) in sc16is7xx_setup_gpio_chip()
1380 s->gpio.owner = THIS_MODULE; in sc16is7xx_setup_gpio_chip()
1381 s->gpio.parent = dev; in sc16is7xx_setup_gpio_chip()
1382 s->gpio.label = dev_name(dev); in sc16is7xx_setup_gpio_chip()
1383 s->gpio.init_valid_mask = sc16is7xx_gpio_init_valid_mask; in sc16is7xx_setup_gpio_chip()
1384 s->gpio.direction_input = sc16is7xx_gpio_direction_input; in sc16is7xx_setup_gpio_chip()
1385 s->gpio.get = sc16is7xx_gpio_get; in sc16is7xx_setup_gpio_chip()
1386 s->gpio.direction_output = sc16is7xx_gpio_direction_output; in sc16is7xx_setup_gpio_chip()
1387 s->gpio.set = sc16is7xx_gpio_set; in sc16is7xx_setup_gpio_chip()
1388 s->gpio.base = -1; in sc16is7xx_setup_gpio_chip()
1389 s->gpio.ngpio = s->devtype->nr_gpio; in sc16is7xx_setup_gpio_chip()
1390 s->gpio.can_sleep = 1; in sc16is7xx_setup_gpio_chip()
1392 return gpiochip_add_data(&s->gpio, s); in sc16is7xx_setup_gpio_chip()
1402 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_irda_ports()
1404 count = device_property_count_u32(dev, "irda-mode-ports"); in sc16is7xx_setup_irda_ports()
1408 ret = device_property_read_u32_array(dev, "irda-mode-ports", in sc16is7xx_setup_irda_ports()
1414 if (irda_port[i] < s->devtype->nr_uart) in sc16is7xx_setup_irda_ports()
1415 s->p[irda_port[i]].irda_mode = true; in sc16is7xx_setup_irda_ports()
1429 struct device *dev = s->p[0].port.dev; in sc16is7xx_setup_mctrl_ports()
1431 count = device_property_count_u32(dev, "nxp,modem-control-line-ports"); in sc16is7xx_setup_mctrl_ports()
1435 ret = device_property_read_u32_array(dev, "nxp,modem-control-line-ports", in sc16is7xx_setup_mctrl_ports()
1440 s->mctrl_mask = 0; in sc16is7xx_setup_mctrl_ports()
1445 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_A_BIT; in sc16is7xx_setup_mctrl_ports()
1447 s->mctrl_mask |= SC16IS7XX_IOCONTROL_MODEM_B_BIT; in sc16is7xx_setup_mctrl_ports()
1450 if (s->mctrl_mask) in sc16is7xx_setup_mctrl_ports()
1455 SC16IS7XX_IOCONTROL_MODEM_B_BIT, s->mctrl_mask); in sc16is7xx_setup_mctrl_ports()
1463 .delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1476 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1491 return -EPROBE_DEFER; in sc16is7xx_probe()
1493 /* Alloc port structure */ in sc16is7xx_probe()
1494 s = devm_kzalloc(dev, struct_size(s, p, devtype->nr_uart), GFP_KERNEL); in sc16is7xx_probe()
1496 dev_err(dev, "Error allocating port structure\n"); in sc16is7xx_probe()
1497 return -ENOMEM; in sc16is7xx_probe()
1501 device_property_read_u32(dev, "clock-frequency", &uartclk); in sc16is7xx_probe()
1503 s->clk = devm_clk_get_optional(dev, NULL); in sc16is7xx_probe()
1504 if (IS_ERR(s->clk)) in sc16is7xx_probe()
1505 return PTR_ERR(s->clk); in sc16is7xx_probe()
1507 ret = clk_prepare_enable(s->clk); in sc16is7xx_probe()
1511 freq = clk_get_rate(s->clk); in sc16is7xx_probe()
1520 return -EINVAL; in sc16is7xx_probe()
1523 s->devtype = devtype; in sc16is7xx_probe()
1526 kthread_init_worker(&s->kworker); in sc16is7xx_probe()
1527 s->kworker_task = kthread_run(kthread_worker_fn, &s->kworker, in sc16is7xx_probe()
1529 if (IS_ERR(s->kworker_task)) { in sc16is7xx_probe()
1530 ret = PTR_ERR(s->kworker_task); in sc16is7xx_probe()
1533 sched_set_fifo(s->kworker_task); in sc16is7xx_probe()
1539 for (i = 0; i < devtype->nr_uart; ++i) { in sc16is7xx_probe()
1540 s->p[i].port.line = find_first_zero_bit(sc16is7xx_lines, in sc16is7xx_probe()
1542 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) { in sc16is7xx_probe()
1543 ret = -ERANGE; in sc16is7xx_probe()
1547 /* Initialize port data */ in sc16is7xx_probe()
1548 s->p[i].port.dev = dev; in sc16is7xx_probe()
1549 s->p[i].port.irq = irq; in sc16is7xx_probe()
1550 s->p[i].port.type = PORT_SC16IS7XX; in sc16is7xx_probe()
1551 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE; in sc16is7xx_probe()
1552 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY; in sc16is7xx_probe()
1553 s->p[i].port.iobase = i; in sc16is7xx_probe()
1559 s->p[i].port.membase = (void __iomem *)~0; in sc16is7xx_probe()
1560 s->p[i].port.iotype = UPIO_PORT; in sc16is7xx_probe()
1561 s->p[i].port.uartclk = freq; in sc16is7xx_probe()
1562 s->p[i].port.rs485_config = sc16is7xx_config_rs485; in sc16is7xx_probe()
1563 s->p[i].port.rs485_supported = sc16is7xx_rs485_supported; in sc16is7xx_probe()
1564 s->p[i].port.ops = &sc16is7xx_ops; in sc16is7xx_probe()
1565 s->p[i].old_mctrl = 0; in sc16is7xx_probe()
1566 s->p[i].regmap = regmaps[i]; in sc16is7xx_probe()
1568 mutex_init(&s->p[i].efr_lock); in sc16is7xx_probe()
1570 ret = uart_get_rs485_mode(&s->p[i].port); in sc16is7xx_probe()
1575 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0); in sc16is7xx_probe()
1577 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG, in sc16is7xx_probe()
1582 kthread_init_work(&s->p[i].tx_work, sc16is7xx_tx_proc); in sc16is7xx_probe()
1583 kthread_init_work(&s->p[i].reg_work, sc16is7xx_reg_proc); in sc16is7xx_probe()
1584 kthread_init_delayed_work(&s->p[i].ms_work, sc16is7xx_ms_proc); in sc16is7xx_probe()
1586 /* Register port */ in sc16is7xx_probe()
1587 ret = uart_add_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1591 set_bit(s->p[i].port.line, sc16is7xx_lines); in sc16is7xx_probe()
1594 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, in sc16is7xx_probe()
1600 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG, in sc16is7xx_probe()
1606 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00); in sc16is7xx_probe()
1609 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_probe()
1625 * Setup interrupt. We first try to acquire the IRQ line as level IRQ. in sc16is7xx_probe()
1628 * back to a non-shared falling-edge trigger. in sc16is7xx_probe()
1644 if (s->gpio_valid_mask) in sc16is7xx_probe()
1645 gpiochip_remove(&s->gpio); in sc16is7xx_probe()
1649 for (i = 0; i < devtype->nr_uart; i++) in sc16is7xx_probe()
1650 if (test_and_clear_bit(s->p[i].port.line, sc16is7xx_lines)) in sc16is7xx_probe()
1651 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_probe()
1653 kthread_stop(s->kworker_task); in sc16is7xx_probe()
1656 clk_disable_unprepare(s->clk); in sc16is7xx_probe()
1667 if (s->gpio_valid_mask) in sc16is7xx_remove()
1668 gpiochip_remove(&s->gpio); in sc16is7xx_remove()
1671 for (i = 0; i < s->devtype->nr_uart; i++) { in sc16is7xx_remove()
1672 kthread_cancel_delayed_work_sync(&s->p[i].ms_work); in sc16is7xx_remove()
1673 if (test_and_clear_bit(s->p[i].port.line, sc16is7xx_lines)) in sc16is7xx_remove()
1674 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port); in sc16is7xx_remove()
1675 sc16is7xx_power(&s->p[i].port, 0); in sc16is7xx_remove()
1678 kthread_flush_worker(&s->kworker); in sc16is7xx_remove()
1679 kthread_stop(s->kworker_task); in sc16is7xx_remove()
1681 clk_disable_unprepare(s->clk); in sc16is7xx_remove()
1735 spi->bits_per_word = 8; in sc16is7xx_spi_probe()
1737 if ((spi->mode & SPI_MODE_X_MASK) != SPI_MODE_0) in sc16is7xx_spi_probe()
1738 return dev_err_probe(&spi->dev, -EINVAL, "Unsupported SPI mode\n"); in sc16is7xx_spi_probe()
1740 spi->mode = spi->mode ? : SPI_MODE_0; in sc16is7xx_spi_probe()
1741 spi->max_speed_hz = spi->max_speed_hz ? : 4 * HZ_PER_MHZ; in sc16is7xx_spi_probe()
1748 return dev_err_probe(&spi->dev, -ENODEV, "Failed to match device\n"); in sc16is7xx_spi_probe()
1750 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_spi_probe()
1763 return sc16is7xx_probe(&spi->dev, devtype, regmaps, spi->irq); in sc16is7xx_spi_probe()
1768 sc16is7xx_remove(&spi->dev); in sc16is7xx_spi_remove()
1804 return dev_err_probe(&i2c->dev, -ENODEV, "Failed to match device\n"); in sc16is7xx_i2c_probe()
1806 for (i = 0; i < devtype->nr_uart; i++) { in sc16is7xx_i2c_probe()
1813 return sc16is7xx_probe(&i2c->dev, devtype, regmaps, i2c->irq); in sc16is7xx_i2c_probe()
1818 sc16is7xx_remove(&client->dev); in sc16is7xx_i2c_remove()
1858 pr_err("failed to init sc16is7xx i2c --> %d\n", ret); in sc16is7xx_init()
1866 pr_err("failed to init sc16is7xx spi --> %d\n", ret); in sc16is7xx_init()