Lines Matching full:membase

208 	void __iomem *membase;  member
241 /* protect the eg20t_port private structure and io access to membase */
315 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER)); in port_show_regs()
317 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR)); in port_show_regs()
319 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR)); in port_show_regs()
321 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR)); in port_show_regs()
323 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR)); in port_show_regs()
325 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR)); in port_show_regs()
328 ioread8(priv->membase + PCH_UART_BRCSR)); in port_show_regs()
330 lcr = ioread8(priv->membase + UART_LCR); in port_show_regs()
331 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); in port_show_regs()
333 "DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL)); in port_show_regs()
335 "DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM)); in port_show_regs()
336 iowrite8(lcr, priv->membase + UART_LCR); in port_show_regs()
417 u8 ier = ioread8(priv->membase + UART_IER); in pch_uart_hal_enable_interrupt()
419 iowrite8(ier, priv->membase + UART_IER); in pch_uart_hal_enable_interrupt()
425 u8 ier = ioread8(priv->membase + UART_IER); in pch_uart_hal_disable_interrupt()
427 iowrite8(ier, priv->membase + UART_IER); in pch_uart_hal_disable_interrupt()
467 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR); in pch_uart_hal_set_line()
468 iowrite8(dll, priv->membase + PCH_UART_DLL); in pch_uart_hal_set_line()
469 iowrite8(dlm, priv->membase + PCH_UART_DLM); in pch_uart_hal_set_line()
470 iowrite8(lcr, priv->membase + UART_LCR); in pch_uart_hal_set_line()
484 iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
486 priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
487 iowrite8(priv->fcr, priv->membase + UART_FCR); in pch_uart_hal_fifo_reset()
536 iowrite8(PCH_UART_FCR_FIFOE, priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
538 priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
539 iowrite8(fcr, priv->membase + UART_FCR); in pch_uart_hal_set_fifo()
547 unsigned int msr = ioread8(priv->membase + UART_MSR); in pch_uart_hal_get_modem()
559 lsr = ioread8(priv->membase + UART_LSR); in pch_uart_hal_read()
560 for (i = 0, lsr = ioread8(priv->membase + UART_LSR); in pch_uart_hal_read()
562 lsr = ioread8(priv->membase + UART_LSR)) { in pch_uart_hal_read()
563 rbr = ioread8(priv->membase + PCH_UART_RBR); in pch_uart_hal_read()
580 return ioread8(priv->membase + UART_IIR) &\ in pch_uart_hal_get_iid()
586 return ioread8(priv->membase + UART_LSR); in pch_uart_hal_get_line_status()
593 lcr = ioread8(priv->membase + UART_LCR); in pch_uart_hal_set_break()
599 iowrite8(lcr, priv->membase + UART_LCR); in pch_uart_hal_set_break()
838 iowrite8(port->x_char, priv->membase + PCH_UART_THR); in handle_tx()
846 iowrite8(xmit->buf[xmit->tail], priv->membase + PCH_UART_THR); in handle_tx()
895 iowrite8(port->x_char, priv->membase + PCH_UART_THR); in dma_handle_tx()
1144 iowrite8(mcr, priv->membase + UART_MCR); in pch_uart_set_mctrl()
1377 pci_iounmap(priv->pdev, priv->membase); in pch_uart_release_port()
1385 void __iomem *membase; in pch_uart_request_port() local
1392 membase = pci_iomap(priv->pdev, 1, 0); in pch_uart_request_port()
1393 if (!membase) { in pch_uart_request_port()
1397 priv->membase = port->membase = membase; in pch_uart_request_port()
1453 status = ioread8(up->membase + UART_LSR); in wait_for_xmitr()
1466 unsigned int msr = ioread8(up->membase + UART_MSR); in wait_for_xmitr()
1485 u8 lsr = ioread8(priv->membase + UART_LSR); in pch_uart_get_poll_char()
1490 return ioread8(priv->membase + PCH_UART_RBR); in pch_uart_get_poll_char()
1504 ier = ioread8(priv->membase + UART_IER); in pch_uart_put_poll_char()
1511 iowrite8(c, priv->membase + PCH_UART_THR); in pch_uart_put_poll_char()
1518 iowrite8(ier, priv->membase + UART_IER); in pch_uart_put_poll_char()
1554 iowrite8(ch, priv->membase + PCH_UART_THR); in pch_console_putchar()
1593 ier = ioread8(priv->membase + UART_IER); in pch_console_write()
1604 iowrite8(ier, priv->membase + UART_IER); in pch_console_write()
1630 if (!port || (!port->iobase && !port->membase)) in pch_console_setup()
1723 priv->port.membase = NULL; in pch_uart_init_port()