Lines Matching +full:rx +full:- +full:crci
1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
193 writel_relaxed(val, port->membase + off); in msm_write()
199 return readl_relaxed(port->membase + off); in msm_read()
211 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
223 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
234 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
237 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
239 else if (port->uartclk == 4800000) in msm_serial_set_mnd_regs()
248 struct device *dev = port->dev; in msm_stop_dma()
252 mapped = dma->count; in msm_stop_dma()
253 dma->count = 0; in msm_stop_dma()
255 dmaengine_terminate_all(dma->chan); in msm_stop_dma()
265 val &= ~dma->enable_bit; in msm_stop_dma()
269 dma_unmap_single(dev, dma->phys, mapped, dma->dir); in msm_stop_dma()
276 dma = &msm_port->tx_dma; in msm_release_dma()
277 if (dma->chan) { in msm_release_dma()
278 msm_stop_dma(&msm_port->uart, dma); in msm_release_dma()
279 dma_release_channel(dma->chan); in msm_release_dma()
284 dma = &msm_port->rx_dma; in msm_release_dma()
285 if (dma->chan) { in msm_release_dma()
286 msm_stop_dma(&msm_port->uart, dma); in msm_release_dma()
287 dma_release_channel(dma->chan); in msm_release_dma()
288 kfree(dma->virt); in msm_release_dma()
296 struct device *dev = msm_port->uart.dev; in msm_request_tx_dma()
300 u32 crci = 0; in msm_request_tx_dma() local
303 dma = &msm_port->tx_dma; in msm_request_tx_dma()
306 dma->chan = dma_request_chan(dev, "tx"); in msm_request_tx_dma()
307 if (IS_ERR(dma->chan)) in msm_request_tx_dma()
310 of_property_read_u32(dev->of_node, "qcom,tx-crci", &crci); in msm_request_tx_dma()
317 if (crci) { in msm_request_tx_dma()
320 periph_conf.crci = crci; in msm_request_tx_dma()
323 ret = dmaengine_slave_config(dma->chan, &conf); in msm_request_tx_dma()
327 dma->dir = DMA_TO_DEVICE; in msm_request_tx_dma()
329 if (msm_port->is_uartdm < UARTDM_1P4) in msm_request_tx_dma()
330 dma->enable_bit = UARTDM_DMEN_TX_DM_ENABLE; in msm_request_tx_dma()
332 dma->enable_bit = UARTDM_DMEN_TX_BAM_ENABLE; in msm_request_tx_dma()
337 dma_release_channel(dma->chan); in msm_request_tx_dma()
344 struct device *dev = msm_port->uart.dev; in msm_request_rx_dma()
348 u32 crci = 0; in msm_request_rx_dma() local
351 dma = &msm_port->rx_dma; in msm_request_rx_dma()
354 dma->chan = dma_request_chan(dev, "rx"); in msm_request_rx_dma()
355 if (IS_ERR(dma->chan)) in msm_request_rx_dma()
358 of_property_read_u32(dev->of_node, "qcom,rx-crci", &crci); in msm_request_rx_dma()
360 dma->virt = kzalloc(UARTDM_RX_SIZE, GFP_KERNEL); in msm_request_rx_dma()
361 if (!dma->virt) in msm_request_rx_dma()
369 if (crci) { in msm_request_rx_dma()
372 periph_conf.crci = crci; in msm_request_rx_dma()
375 ret = dmaengine_slave_config(dma->chan, &conf); in msm_request_rx_dma()
379 dma->dir = DMA_FROM_DEVICE; in msm_request_rx_dma()
381 if (msm_port->is_uartdm < UARTDM_1P4) in msm_request_rx_dma()
382 dma->enable_bit = UARTDM_DMEN_RX_DM_ENABLE; in msm_request_rx_dma()
384 dma->enable_bit = UARTDM_DMEN_RX_BAM_ENABLE; in msm_request_rx_dma()
388 kfree(dma->virt); in msm_request_rx_dma()
390 dma_release_channel(dma->chan); in msm_request_rx_dma()
403 if (!timeout--) in msm_wait_for_xmitr()
413 msm_port->imr &= ~MSM_UART_IMR_TXLEV; in msm_stop_tx()
414 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_stop_tx()
420 struct msm_dma *dma = &msm_port->tx_dma; in msm_start_tx()
423 if (dma->count) in msm_start_tx()
426 msm_port->imr |= MSM_UART_IMR_TXLEV; in msm_start_tx()
427 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_start_tx()
440 struct uart_port *port = &msm_port->uart; in msm_complete_tx_dma()
441 struct circ_buf *xmit = &port->state->xmit; in msm_complete_tx_dma()
442 struct msm_dma *dma = &msm_port->tx_dma; in msm_complete_tx_dma()
451 if (!dma->count) in msm_complete_tx_dma()
454 dmaengine_tx_status(dma->chan, dma->cookie, &state); in msm_complete_tx_dma()
456 dma_unmap_single(port->dev, dma->phys, dma->count, dma->dir); in msm_complete_tx_dma()
459 val &= ~dma->enable_bit; in msm_complete_tx_dma()
462 if (msm_port->is_uartdm > UARTDM_1P3) { in msm_complete_tx_dma()
467 count = dma->count - state.residue; in msm_complete_tx_dma()
469 dma->count = 0; in msm_complete_tx_dma()
472 msm_port->imr |= MSM_UART_IMR_TXLEV; in msm_complete_tx_dma()
473 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_complete_tx_dma()
485 struct circ_buf *xmit = &msm_port->uart.state->xmit; in msm_handle_tx_dma()
486 struct uart_port *port = &msm_port->uart; in msm_handle_tx_dma()
487 struct msm_dma *dma = &msm_port->tx_dma; in msm_handle_tx_dma()
492 cpu_addr = &xmit->buf[xmit->tail]; in msm_handle_tx_dma()
494 dma->phys = dma_map_single(port->dev, cpu_addr, count, dma->dir); in msm_handle_tx_dma()
495 ret = dma_mapping_error(port->dev, dma->phys); in msm_handle_tx_dma()
499 dma->desc = dmaengine_prep_slave_single(dma->chan, dma->phys, in msm_handle_tx_dma()
503 if (!dma->desc) { in msm_handle_tx_dma()
504 ret = -EIO; in msm_handle_tx_dma()
508 dma->desc->callback = msm_complete_tx_dma; in msm_handle_tx_dma()
509 dma->desc->callback_param = msm_port; in msm_handle_tx_dma()
511 dma->cookie = dmaengine_submit(dma->desc); in msm_handle_tx_dma()
512 ret = dma_submit_error(dma->cookie); in msm_handle_tx_dma()
520 msm_port->imr &= ~MSM_UART_IMR_TXLEV; in msm_handle_tx_dma()
521 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_handle_tx_dma()
523 dma->count = count; in msm_handle_tx_dma()
526 val |= dma->enable_bit; in msm_handle_tx_dma()
528 if (msm_port->is_uartdm < UARTDM_1P4) in msm_handle_tx_dma()
533 if (msm_port->is_uartdm > UARTDM_1P3) in msm_handle_tx_dma()
536 dma_async_issue_pending(dma->chan); in msm_handle_tx_dma()
539 dma_unmap_single(port->dev, dma->phys, count, dma->dir); in msm_handle_tx_dma()
546 struct uart_port *port = &msm_port->uart; in msm_complete_rx_dma()
547 struct tty_port *tport = &port->state->port; in msm_complete_rx_dma()
548 struct msm_dma *dma = &msm_port->rx_dma; in msm_complete_rx_dma()
556 if (!dma->count) in msm_complete_rx_dma()
560 val &= ~dma->enable_bit; in msm_complete_rx_dma()
564 port->icount.overrun++; in msm_complete_rx_dma()
571 port->icount.rx += count; in msm_complete_rx_dma()
573 dma->count = 0; in msm_complete_rx_dma()
575 dma_unmap_single(port->dev, dma->phys, UARTDM_RX_SIZE, dma->dir); in msm_complete_rx_dma()
580 if (msm_port->break_detected && dma->virt[i] == 0) { in msm_complete_rx_dma()
581 port->icount.brk++; in msm_complete_rx_dma()
583 msm_port->break_detected = false; in msm_complete_rx_dma()
588 if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK)) in msm_complete_rx_dma()
592 sysrq = uart_handle_sysrq_char(port, dma->virt[i]); in msm_complete_rx_dma()
595 tty_insert_flip_char(tport, dma->virt[i], flag); in msm_complete_rx_dma()
608 struct msm_dma *dma = &msm_port->rx_dma; in msm_start_rx_dma()
609 struct uart_port *uart = &msm_port->uart; in msm_start_rx_dma()
616 if (!dma->chan) in msm_start_rx_dma()
619 dma->phys = dma_map_single(uart->dev, dma->virt, in msm_start_rx_dma()
620 UARTDM_RX_SIZE, dma->dir); in msm_start_rx_dma()
621 ret = dma_mapping_error(uart->dev, dma->phys); in msm_start_rx_dma()
625 dma->desc = dmaengine_prep_slave_single(dma->chan, dma->phys, in msm_start_rx_dma()
628 if (!dma->desc) in msm_start_rx_dma()
631 dma->desc->callback = msm_complete_rx_dma; in msm_start_rx_dma()
632 dma->desc->callback_param = msm_port; in msm_start_rx_dma()
634 dma->cookie = dmaengine_submit(dma->desc); in msm_start_rx_dma()
635 ret = dma_submit_error(dma->cookie); in msm_start_rx_dma()
639 * Using DMA for FIFO off-load, no need for "Rx FIFO over in msm_start_rx_dma()
642 msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE); in msm_start_rx_dma()
648 if (msm_port->is_uartdm < UARTDM_1P4) in msm_start_rx_dma()
649 msm_port->imr |= MSM_UART_IMR_RXSTALE; in msm_start_rx_dma()
651 msm_write(uart, msm_port->imr, MSM_UART_IMR); in msm_start_rx_dma()
653 dma->count = UARTDM_RX_SIZE; in msm_start_rx_dma()
655 dma_async_issue_pending(dma->chan); in msm_start_rx_dma()
661 val |= dma->enable_bit; in msm_start_rx_dma()
663 if (msm_port->is_uartdm < UARTDM_1P4) in msm_start_rx_dma()
668 if (msm_port->is_uartdm > UARTDM_1P3) in msm_start_rx_dma()
673 dma_unmap_single(uart->dev, dma->phys, UARTDM_RX_SIZE, dma->dir); in msm_start_rx_dma()
677 * Switch from DMA to SW/FIFO mode. After clearing Rx BAM (UARTDM_DMEN), in msm_start_rx_dma()
687 /* Re-enable RX interrupts */ in msm_start_rx_dma()
688 msm_port->imr |= MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE; in msm_start_rx_dma()
689 msm_write(uart, msm_port->imr, MSM_UART_IMR); in msm_start_rx_dma()
695 struct msm_dma *dma = &msm_port->rx_dma; in msm_stop_rx()
697 msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE); in msm_stop_rx()
698 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_stop_rx()
700 if (dma->chan) in msm_stop_rx()
708 msm_port->imr |= MSM_UART_IMR_DELTA_CTS; in msm_enable_ms()
709 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_enable_ms()
713 __must_hold(&port->lock) in msm_handle_rx_dm()
715 struct tty_port *tport = &port->state->port; in msm_handle_rx_dm()
721 port->icount.overrun++; in msm_handle_rx_dm()
727 count = msm_read(port, UARTDM_RX_TOTAL_SNAP) - in msm_handle_rx_dm()
728 msm_port->old_snap_state; in msm_handle_rx_dm()
729 msm_port->old_snap_state = 0; in msm_handle_rx_dm()
732 msm_port->old_snap_state += count; in msm_handle_rx_dm()
737 port->icount.rx += count; in msm_handle_rx_dm()
745 msm_port->old_snap_state -= count; in msm_handle_rx_dm()
749 ioread32_rep(port->membase + UARTDM_RF, buf, 1); in msm_handle_rx_dm()
755 if (msm_port->break_detected && buf[i] == 0) { in msm_handle_rx_dm()
756 port->icount.brk++; in msm_handle_rx_dm()
758 msm_port->break_detected = false; in msm_handle_rx_dm()
763 if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK)) in msm_handle_rx_dm()
772 count -= r_count; in msm_handle_rx_dm()
787 __must_hold(&port->lock) in msm_handle_rx()
789 struct tty_port *tport = &port->state->port; in msm_handle_rx()
794 * is not tied to the RX buffer, so we handle the case out of band. in msm_handle_rx()
797 port->icount.overrun++; in msm_handle_rx()
802 /* and now the main RX loop */ in msm_handle_rx()
811 port->icount.brk++; in msm_handle_rx()
815 port->icount.frame++; in msm_handle_rx()
817 port->icount.rx++; in msm_handle_rx()
821 sr &= port->read_status_mask; in msm_handle_rx()
840 struct circ_buf *xmit = &port->state->xmit; in msm_handle_tx_pio()
846 if (msm_port->is_uartdm) in msm_handle_tx_pio()
847 tf = port->membase + UARTDM_TF; in msm_handle_tx_pio()
849 tf = port->membase + MSM_UART_TF; in msm_handle_tx_pio()
851 if (tx_count && msm_port->is_uartdm) in msm_handle_tx_pio()
861 if (msm_port->is_uartdm) in msm_handle_tx_pio()
862 num_chars = min(tx_count - tf_pointer, in msm_handle_tx_pio()
868 buf[i] = xmit->buf[xmit->tail + i]; in msm_handle_tx_pio()
886 struct circ_buf *xmit = &msm_port->uart.state->xmit; in msm_handle_tx()
887 struct msm_dma *dma = &msm_port->tx_dma; in msm_handle_tx()
893 if (port->x_char) { in msm_handle_tx()
894 if (msm_port->is_uartdm) in msm_handle_tx()
895 tf = port->membase + UARTDM_TF; in msm_handle_tx()
897 tf = port->membase + MSM_UART_TF; in msm_handle_tx()
899 buf[0] = port->x_char; in msm_handle_tx()
901 if (msm_port->is_uartdm) in msm_handle_tx()
905 port->icount.tx++; in msm_handle_tx()
906 port->x_char = 0; in msm_handle_tx()
915 pio_count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in msm_handle_tx()
916 dma_count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); in msm_handle_tx()
919 if (msm_port->is_uartdm > UARTDM_1P3) { in msm_handle_tx()
927 if (pio_count > port->fifosize) in msm_handle_tx()
928 pio_count = port->fifosize; in msm_handle_tx()
930 if (!dma->chan || dma_count < dma_min) in msm_handle_tx()
942 port->icount.cts++; in msm_handle_delta_cts()
943 wake_up_interruptible(&port->state->port.delta_msr_wait); in msm_handle_delta_cts()
950 struct msm_dma *dma = &msm_port->rx_dma; in msm_uart_irq()
960 msm_port->break_detected = true; in msm_uart_irq()
965 if (dma->count) { in msm_uart_irq()
972 * trigger DMA RX completion in msm_uart_irq()
974 dmaengine_terminate_all(dma->chan); in msm_uart_irq()
975 } else if (msm_port->is_uartdm) { in msm_uart_irq()
986 msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */ in msm_uart_irq()
1019 if (msm_port->is_uartdm) in msm_reset()
1081 target = clk_round_rate(msm_port->clk, 16 * baud); in msm_find_best_baud()
1087 if (entry->divisor <= divisor) { in msm_find_best_baud()
1088 result = target / entry->divisor / 16; in msm_find_best_baud()
1089 diff = abs(result - baud); in msm_find_best_baud()
1100 } else if (entry->divisor > divisor) { in msm_find_best_baud()
1102 target = clk_round_rate(msm_port->clk, old + 1); in msm_find_best_baud()
1124 __must_hold(&port->lock) in msm_set_baud_rate()
1135 dev_pm_opp_set_rate(port->dev, rate); in msm_set_baud_rate()
1136 baud = rate / 16 / entry->divisor; in msm_set_baud_rate()
1140 port->uartclk = rate; in msm_set_baud_rate()
1142 msm_write(port, entry->code, MSM_UART_CSR); in msm_set_baud_rate()
1144 /* RX stale watermark */ in msm_set_baud_rate()
1145 rxstale = entry->rxstale; in msm_set_baud_rate()
1147 if (msm_port->is_uartdm) { in msm_set_baud_rate()
1158 /* set RX watermark */ in msm_set_baud_rate()
1159 watermark = (port->fifosize * 3) / 4; in msm_set_baud_rate()
1168 /* Enable RX and TX */ in msm_set_baud_rate()
1171 /* turn on RX and CTS interrupts */ in msm_set_baud_rate()
1172 msm_port->imr = MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE | in msm_set_baud_rate()
1175 msm_write(port, msm_port->imr, MSM_UART_IMR); in msm_set_baud_rate()
1177 if (msm_port->is_uartdm) { in msm_set_baud_rate()
1190 dev_pm_opp_set_rate(port->dev, port->uartclk); in msm_init_clock()
1191 clk_prepare_enable(msm_port->clk); in msm_init_clock()
1192 clk_prepare_enable(msm_port->pclk); in msm_init_clock()
1202 snprintf(msm_port->name, sizeof(msm_port->name), in msm_startup()
1203 "msm_serial%d", port->line); in msm_startup()
1207 if (likely(port->fifosize > 12)) in msm_startup()
1208 rfr_level = port->fifosize - 12; in msm_startup()
1210 rfr_level = port->fifosize; in msm_startup()
1215 if (msm_port->is_uartdm) in msm_startup()
1226 if (msm_port->is_uartdm) { in msm_startup()
1227 msm_request_tx_dma(msm_port, msm_port->uart.mapbase); in msm_startup()
1228 msm_request_rx_dma(msm_port, msm_port->uart.mapbase); in msm_startup()
1231 ret = request_irq(port->irq, msm_uart_irq, IRQF_TRIGGER_HIGH, in msm_startup()
1232 msm_port->name, port); in msm_startup()
1239 if (msm_port->is_uartdm) in msm_startup()
1242 clk_disable_unprepare(msm_port->pclk); in msm_startup()
1243 clk_disable_unprepare(msm_port->clk); in msm_startup()
1244 dev_pm_opp_set_rate(port->dev, 0); in msm_startup()
1253 msm_port->imr = 0; in msm_shutdown()
1256 if (msm_port->is_uartdm) in msm_shutdown()
1259 clk_disable_unprepare(msm_port->clk); in msm_shutdown()
1260 dev_pm_opp_set_rate(port->dev, 0); in msm_shutdown()
1262 free_irq(port->irq, port); in msm_shutdown()
1269 struct msm_dma *dma = &msm_port->rx_dma; in msm_set_termios()
1275 if (dma->chan) /* Terminate if any */ in msm_set_termios()
1287 if (termios->c_cflag & PARENB) { in msm_set_termios()
1288 if (termios->c_cflag & PARODD) in msm_set_termios()
1290 else if (termios->c_cflag & CMSPAR) in msm_set_termios()
1298 switch (termios->c_cflag & CSIZE) { in msm_set_termios()
1316 if (termios->c_cflag & CSTOPB) in msm_set_termios()
1327 if (termios->c_cflag & CRTSCTS) { in msm_set_termios()
1334 port->read_status_mask = 0; in msm_set_termios()
1335 if (termios->c_iflag & INPCK) in msm_set_termios()
1336 port->read_status_mask |= MSM_UART_SR_PAR_FRAME_ERR; in msm_set_termios()
1337 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in msm_set_termios()
1338 port->read_status_mask |= MSM_UART_SR_RX_BREAK; in msm_set_termios()
1340 uart_update_timeout(port, termios->c_cflag, baud); in msm_set_termios()
1355 struct platform_device *pdev = to_platform_device(port->dev); in msm_release_port()
1364 release_mem_region(port->mapbase, size); in msm_release_port()
1365 iounmap(port->membase); in msm_release_port()
1366 port->membase = NULL; in msm_release_port()
1371 struct platform_device *pdev = to_platform_device(port->dev); in msm_request_port()
1378 return -ENXIO; in msm_request_port()
1382 if (!request_mem_region(port->mapbase, size, "msm_serial")) in msm_request_port()
1383 return -EBUSY; in msm_request_port()
1385 port->membase = ioremap(port->mapbase, size); in msm_request_port()
1386 if (!port->membase) { in msm_request_port()
1387 ret = -EBUSY; in msm_request_port()
1394 release_mem_region(port->mapbase, size); in msm_request_port()
1403 port->type = PORT_MSM; in msm_config_port()
1412 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_MSM)) in msm_verify_port()
1413 return -EINVAL; in msm_verify_port()
1414 if (unlikely(port->irq != ser->irq)) in msm_verify_port()
1415 return -EINVAL; in msm_verify_port()
1426 dev_pm_opp_set_rate(port->dev, port->uartclk); in msm_power()
1427 clk_prepare_enable(msm_port->clk); in msm_power()
1428 clk_prepare_enable(msm_port->pclk); in msm_power()
1431 clk_disable_unprepare(msm_port->clk); in msm_power()
1432 dev_pm_opp_set_rate(port->dev, 0); in msm_power()
1433 clk_disable_unprepare(msm_port->pclk); in msm_power()
1444 unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : MSM_UART_RF; in msm_poll_get_char_single()
1461 c = sp[sizeof(slop) - count]; in msm_poll_get_char_dm()
1462 count--; in msm_poll_get_char_dm()
1466 * If RX packing buffer has less than a word, force stale to in msm_poll_get_char_dm()
1467 * push contents into RX FIFO in msm_poll_get_char_dm()
1475 count--; in msm_poll_get_char_dm()
1486 count = sizeof(slop) - 1; in msm_poll_get_char_dm()
1502 if (msm_port->is_uartdm) in msm_poll_get_char()
1522 if (msm_port->is_uartdm) in msm_poll_put_char()
1530 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : MSM_UART_TF); in msm_poll_put_char()
1614 tf = port->membase + UARTDM_TF; in __msm_console_write()
1616 tf = port->membase + MSM_UART_TF; in __msm_console_write()
1626 if (port->sysrq) in __msm_console_write()
1643 num_chars = min(count - i, (unsigned int)sizeof(buf)); in __msm_console_write()
1681 BUG_ON(co->index < 0 || co->index >= MSM_UART_NR); in msm_console_write()
1683 port = msm_get_port_from_line(co->index); in msm_console_write()
1686 __msm_console_write(port, s, count, msm_port->is_uartdm); in msm_console_write()
1697 if (unlikely(co->index >= MSM_UART_NR || co->index < 0)) in msm_console_setup()
1698 return -ENXIO; in msm_console_setup()
1700 port = msm_get_port_from_line(co->index); in msm_console_setup()
1702 if (unlikely(!port->membase)) in msm_console_setup()
1703 return -ENXIO; in msm_console_setup()
1710 pr_info("msm_serial: console setup on port #%d\n", port->line); in msm_console_setup()
1718 struct earlycon_device *dev = con->data; in msm_serial_early_write()
1720 __msm_console_write(&dev->port, s, n, false); in msm_serial_early_write()
1726 if (!device->port.membase) in msm_serial_early_console_setup()
1727 return -ENODEV; in msm_serial_early_console_setup()
1729 device->con->write = msm_serial_early_write; in msm_serial_early_console_setup()
1732 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1738 struct earlycon_device *dev = con->data; in msm_serial_early_write_dm()
1740 __msm_console_write(&dev->port, s, n, true); in msm_serial_early_write_dm()
1747 if (!device->port.membase) in msm_serial_early_console_setup_dm()
1748 return -ENODEV; in msm_serial_early_console_setup_dm()
1750 device->con->write = msm_serial_early_write_dm; in msm_serial_early_console_setup_dm()
1753 OF_EARLYCON_DECLARE(msm_serial_dm, "qcom,msm-uartdm",
1764 .index = -1,
1785 { .compatible = "qcom,msm-uartdm-v1.1", .data = (void *)UARTDM_1P1 },
1786 { .compatible = "qcom,msm-uartdm-v1.2", .data = (void *)UARTDM_1P2 },
1787 { .compatible = "qcom,msm-uartdm-v1.3", .data = (void *)UARTDM_1P3 },
1788 { .compatible = "qcom,msm-uartdm-v1.4", .data = (void *)UARTDM_1P4 },
1800 if (pdev->dev.of_node) in msm_serial_probe()
1801 line = of_alias_get_id(pdev->dev.of_node, "serial"); in msm_serial_probe()
1803 line = pdev->id; in msm_serial_probe()
1806 line = atomic_inc_return(&msm_uart_next_id) - 1; in msm_serial_probe()
1809 return -ENXIO; in msm_serial_probe()
1811 dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line); in msm_serial_probe()
1814 port->dev = &pdev->dev; in msm_serial_probe()
1817 id = of_match_device(msm_uartdm_table, &pdev->dev); in msm_serial_probe()
1819 msm_port->is_uartdm = (unsigned long)id->data; in msm_serial_probe()
1821 msm_port->is_uartdm = 0; in msm_serial_probe()
1823 msm_port->clk = devm_clk_get(&pdev->dev, "core"); in msm_serial_probe()
1824 if (IS_ERR(msm_port->clk)) in msm_serial_probe()
1825 return PTR_ERR(msm_port->clk); in msm_serial_probe()
1827 if (msm_port->is_uartdm) { in msm_serial_probe()
1828 msm_port->pclk = devm_clk_get(&pdev->dev, "iface"); in msm_serial_probe()
1829 if (IS_ERR(msm_port->pclk)) in msm_serial_probe()
1830 return PTR_ERR(msm_port->pclk); in msm_serial_probe()
1833 ret = devm_pm_opp_set_clkname(&pdev->dev, "core"); in msm_serial_probe()
1838 ret = devm_pm_opp_of_add_table(&pdev->dev); in msm_serial_probe()
1839 if (ret && ret != -ENODEV) in msm_serial_probe()
1840 return dev_err_probe(&pdev->dev, ret, "invalid OPP table\n"); in msm_serial_probe()
1842 port->uartclk = clk_get_rate(msm_port->clk); in msm_serial_probe()
1843 dev_info(&pdev->dev, "uartclk = %d\n", port->uartclk); in msm_serial_probe()
1847 return -ENXIO; in msm_serial_probe()
1848 port->mapbase = resource->start; in msm_serial_probe()
1852 return -ENXIO; in msm_serial_probe()
1853 port->irq = irq; in msm_serial_probe()
1854 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MSM_CONSOLE); in msm_serial_probe()
1869 { .compatible = "qcom,msm-uart" },
1870 { .compatible = "qcom,msm-uartdm" },
1879 uart_suspend_port(&msm_uart_driver, &port->uart); in msm_serial_suspend()
1888 uart_resume_port(&msm_uart_driver, &port->uart); in msm_serial_resume()