Lines Matching full:membase
386 return readl(port->membase + off); in lpuart32_read()
388 return ioread32be(port->membase + off); in lpuart32_read()
399 writel(val, port->membase + off); in lpuart32_write()
402 iowrite32be(val, port->membase + off); in lpuart32_write()
444 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
446 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
462 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
463 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
623 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
625 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
632 while (!(readb(port->membase + offset) & bit)) in lpuart_wait_bit_set()
656 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
658 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
661 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
665 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
668 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
669 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
670 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
673 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
674 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
677 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
687 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
692 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
695 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
753 readb(port->membase + UARTTCFIFO) < sport->txfifo_size, in lpuart_transmit_buffer()
754 writeb(ch, port->membase + UARTDR)); in lpuart_transmit_buffer()
798 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
799 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
805 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
846 unsigned char sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
847 unsigned char sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
895 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
902 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
903 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
948 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
949 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
1048 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
1052 readb(sport->port.membase + UARTDR); in lpuart_int()
1055 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1132 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1138 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1140 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1143 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1158 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1161 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1163 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1167 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1428 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1429 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1459 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1461 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1479 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1518 reg = readb(port->membase + UARTCR1); in lpuart_get_mctrl()
1541 reg = readb(port->membase + UARTCR1); in lpuart_set_mctrl()
1548 writeb(reg, port->membase + UARTCR1); in lpuart_set_mctrl()
1569 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1574 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1616 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1620 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1622 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1624 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1628 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1631 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1632 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1633 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1638 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1639 writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1642 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1651 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1653 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1755 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1756 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1790 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1792 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1821 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1938 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1941 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1988 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1989 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1990 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1991 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1992 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1993 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
2102 sport->port.membase + UARTCR2); in lpuart_set_termios()
2110 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
2111 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
2112 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
2113 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
2114 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
2115 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
2118 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
2465 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
2488 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2491 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2498 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2545 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2552 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2567 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2569 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2573 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2707 if (!device->port.membase) in lpuart_early_console_setup()
2717 if (!device->port.membase) in lpuart32_early_console_setup()
2732 if (!device->port.membase) in ls1028a_early_console_setup()
2754 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2758 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2824 global_addr = port->membase + UART_GLOBAL - IMX_REG_OFF; in lpuart_global_reset()
2854 sport->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in lpuart_probe()
2855 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2856 return PTR_ERR(sport->port.membase); in lpuart_probe()
2858 sport->port.membase += sdata->reg_off; in lpuart_probe()
3023 val = readb(sport->port.membase + UARTCR2); in serial_lpuart_enable_wakeup()
3028 writeb(val, sport->port.membase + UARTCR2); in serial_lpuart_enable_wakeup()
3102 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
3104 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
3125 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
3126 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()
3138 temp = readb(sport->port.membase + UARTCR5); in lpuart_suspend()
3140 writeb(temp, sport->port.membase + UARTCR5); in lpuart_suspend()