Lines Matching +full:bank +full:- +full:number
1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/nvmem-consumer.h>
103 /* The total number of temperature sensors in the MT8173 */
106 /* The number of banks in the MT8173 */
109 /* The number of sensing points per bank */
112 /* The number of controller in the MT8173 */
119 #define MT8173_TEMP_MIN -20000
195 /* The total number of temperature sensors in the MT2701 */
198 /* The number of sensing points per bank */
201 /* The number of controller in the MT2701 */
216 /* The total number of temperature sensors in the MT2712 */
219 /* The number of sensing points per bank */
222 /* The number of controller in the MT2712 */
235 /* The maximum number of banks */
252 /* The total number of temperature sensors in the MT8183 */
255 /* The number of banks in the MT8183 */
258 /* The number of sensing points per bank */
261 /* The number of controller in the MT8183 */
270 /* The total number of temperature sensors in the MT7986 */
273 /* The number of banks in the MT7986 */
276 /* The number of sensing points per bank */
282 /* The number of controller in the MT7986 */
472 * The MT8173 thermal controller has four banks. Each bank can read up to
474 * temperature sensors. We use each bank to measure a certain area of the
479 * the bank concept wouldn't be necessary here. However, the SVS (Smart
480 * Voltage Scaling) unit makes its decisions based on the same bank
515 * The MT2701 thermal controller has one bank, which can read up to
519 * The thermal core only gets the maximum temperature of this one bank,
520 * so the bank concept wouldn't be necessary here. However, the SVS (Smart
521 * Voltage Scaling) unit makes its decisions based on the same bank
546 * The MT8365 thermal controller has one bank, which can read up to
550 * The thermal core only gets the maximum temperature of this one bank,
551 * so the bank concept wouldn't be necessary here. However, the SVS (Smart
552 * Voltage Scaling) unit makes its decisions based on the same bank
580 * The MT2712 thermal controller has one bank, which can read up to
584 * The thermal core only gets the maximum temperature of this one bank,
585 * so the bank concept wouldn't be necessary here. However, the SVS (Smart
586 * Voltage Scaling) unit makes its decisions based on the same bank
639 * The MT8183 thermal controller has one bank for the current SW framework.
644 * the bank concept wouldn't be necessary here. However, the SVS (Smart
645 * Voltage Scaling) unit makes its decisions based on the same bank
701 * raw_to_mcelsius_v1 - convert a raw ADC value to mcelsius
703 * @sensno: sensor number
716 tmp /= mt->conf->cali_val + mt->o_slope; in raw_to_mcelsius_v1()
717 tmp /= 10000 + mt->adc_ge; in raw_to_mcelsius_v1()
718 tmp *= raw - mt->vts[sensno] - 3350; in raw_to_mcelsius_v1()
721 return mt->degc_cali * 500 - tmp; in raw_to_mcelsius_v1()
737 g_gain = 10000 + (((mt->adc_ge - 512) * 10000) >> 12); in raw_to_mcelsius_v2()
738 g_oe = mt->adc_oe - 512; in raw_to_mcelsius_v2()
739 format_1 = mt->vts[VTS2] + 3105 - g_oe; in raw_to_mcelsius_v2()
740 format_2 = (mt->degc_cali * 10) >> 1; in raw_to_mcelsius_v2()
743 tmp = (((((raw - g_oe) * 10000) >> 12) * 10000) / g_gain) - g_x_roomt; in raw_to_mcelsius_v2()
746 if (mt->o_slope_sign == 0) in raw_to_mcelsius_v2()
747 tmp = tmp / (165 - mt->o_slope); in raw_to_mcelsius_v2()
749 tmp = tmp / (165 + mt->o_slope); in raw_to_mcelsius_v2()
751 return (format_2 - tmp) * 100; in raw_to_mcelsius_v2()
763 tmp /= 4096 - 512 + mt->adc_ge; in raw_to_mcelsius_v3()
765 tmp *= raw - mt->vts[sensno] - 2900; in raw_to_mcelsius_v3()
767 return mt->degc_cali * 500 - tmp; in raw_to_mcelsius_v3()
771 * mtk_thermal_get_bank - get bank
772 * @bank: The bank
774 * The bank registers are banked, we have to select a bank in the
777 static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank) in mtk_thermal_get_bank() argument
779 struct mtk_thermal *mt = bank->mt; in mtk_thermal_get_bank()
782 if (mt->conf->need_switch_bank) { in mtk_thermal_get_bank()
783 mutex_lock(&mt->lock); in mtk_thermal_get_bank()
785 val = readl(mt->thermal_base + PTPCORESEL); in mtk_thermal_get_bank()
787 val |= bank->id; in mtk_thermal_get_bank()
788 writel(val, mt->thermal_base + PTPCORESEL); in mtk_thermal_get_bank()
793 * mtk_thermal_put_bank - release bank
794 * @bank: The bank
796 * release a bank previously taken with mtk_thermal_get_bank,
798 static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank) in mtk_thermal_put_bank() argument
800 struct mtk_thermal *mt = bank->mt; in mtk_thermal_put_bank()
802 if (mt->conf->need_switch_bank) in mtk_thermal_put_bank()
803 mutex_unlock(&mt->lock); in mtk_thermal_put_bank()
807 * mtk_thermal_bank_temperature - get the temperature of a bank
808 * @bank: The bank
810 * The temperature of a bank is considered the maximum temperature of
811 * the sensors associated to the bank.
813 static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank) in mtk_thermal_bank_temperature() argument
815 struct mtk_thermal *mt = bank->mt; in mtk_thermal_bank_temperature()
816 const struct mtk_thermal_data *conf = mt->conf; in mtk_thermal_bank_temperature()
820 for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) { in mtk_thermal_bank_temperature()
821 raw = readl(mt->thermal_base + conf->msr[i]); in mtk_thermal_bank_temperature()
823 temp = mt->raw_to_mcelsius( in mtk_thermal_bank_temperature()
824 mt, conf->bank_data[bank->id].sensors[i], raw); in mtk_thermal_bank_temperature()
851 for (i = 0; i < mt->conf->num_banks; i++) { in mtk_read_temp()
852 struct mtk_thermal_bank *bank = &mt->banks[i]; in mtk_read_temp() local
854 mtk_thermal_get_bank(bank); in mtk_read_temp()
856 tempmax = max(tempmax, mtk_thermal_bank_temperature(bank)); in mtk_read_temp()
858 mtk_thermal_put_bank(bank); in mtk_read_temp()
874 struct mtk_thermal_bank *bank = &mt->banks[num]; in mtk_thermal_init_bank() local
875 const struct mtk_thermal_data *conf = mt->conf; in mtk_thermal_init_bank()
878 int offset = mt->conf->controller_offset[ctrl_id]; in mtk_thermal_init_bank()
879 void __iomem *controller_base = mt->thermal_base + offset; in mtk_thermal_init_bank()
881 bank->id = num; in mtk_thermal_init_bank()
882 bank->mt = mt; in mtk_thermal_init_bank()
884 mtk_thermal_get_bank(bank); in mtk_thermal_init_bank()
907 /* number of interrupts per event, 1 is enough */ in mtk_thermal_init_bank()
924 writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX); in mtk_thermal_init_bank()
930 if (mt->conf->version == MTK_THERMAL_V1) { in mtk_thermal_init_bank()
937 writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN); in mtk_thermal_init_bank()
944 writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel), in mtk_thermal_init_bank()
948 writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel), in mtk_thermal_init_bank()
965 for (i = 0; i < conf->bank_data[num].num_sensors; i++) in mtk_thermal_init_bank()
966 writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]], in mtk_thermal_init_bank()
967 mt->thermal_base + conf->adcpnp[i]); in mtk_thermal_init_bank()
969 writel((1 << conf->bank_data[num].num_sensors) - 1, in mtk_thermal_init_bank()
976 mtk_thermal_put_bank(bank); in mtk_thermal_init_bank()
994 return -EINVAL; in mtk_thermal_extract_efuse_v1()
996 mt->adc_ge = CALIB_BUF1_ADC_GE_V1(buf[1]); in mtk_thermal_extract_efuse_v1()
998 for (i = 0; i < mt->conf->num_sensors; i++) { in mtk_thermal_extract_efuse_v1()
999 switch (mt->conf->vts_index[i]) { in mtk_thermal_extract_efuse_v1()
1001 mt->vts[VTS1] = CALIB_BUF0_VTS_TS1_V1(buf[0]); in mtk_thermal_extract_efuse_v1()
1004 mt->vts[VTS2] = CALIB_BUF0_VTS_TS2_V1(buf[0]); in mtk_thermal_extract_efuse_v1()
1007 mt->vts[VTS3] = CALIB_BUF1_VTS_TS3_V1(buf[1]); in mtk_thermal_extract_efuse_v1()
1010 mt->vts[VTS4] = CALIB_BUF2_VTS_TS4_V1(buf[2]); in mtk_thermal_extract_efuse_v1()
1013 mt->vts[VTS5] = CALIB_BUF2_VTS_TS5_V1(buf[2]); in mtk_thermal_extract_efuse_v1()
1016 mt->vts[VTSABB] = in mtk_thermal_extract_efuse_v1()
1024 mt->degc_cali = CALIB_BUF0_DEGC_CALI_V1(buf[0]); in mtk_thermal_extract_efuse_v1()
1027 mt->o_slope = -CALIB_BUF0_O_SLOPE_V1(buf[0]); in mtk_thermal_extract_efuse_v1()
1029 mt->o_slope = CALIB_BUF0_O_SLOPE_V1(buf[0]); in mtk_thermal_extract_efuse_v1()
1037 return -EINVAL; in mtk_thermal_extract_efuse_v2()
1039 mt->adc_oe = CALIB_BUF0_ADC_OE_V2(buf[0]); in mtk_thermal_extract_efuse_v2()
1040 mt->adc_ge = CALIB_BUF0_ADC_GE_V2(buf[0]); in mtk_thermal_extract_efuse_v2()
1041 mt->degc_cali = CALIB_BUF0_DEGC_CALI_V2(buf[0]); in mtk_thermal_extract_efuse_v2()
1042 mt->o_slope = CALIB_BUF0_O_SLOPE_V2(buf[0]); in mtk_thermal_extract_efuse_v2()
1043 mt->vts[VTS1] = CALIB_BUF1_VTS_TS1_V2(buf[1]); in mtk_thermal_extract_efuse_v2()
1044 mt->vts[VTS2] = CALIB_BUF1_VTS_TS2_V2(buf[1]); in mtk_thermal_extract_efuse_v2()
1045 mt->vts[VTSABB] = CALIB_BUF1_VTS_TSABB_V2(buf[1]); in mtk_thermal_extract_efuse_v2()
1046 mt->o_slope_sign = CALIB_BUF1_O_SLOPE_SIGN_V2(buf[1]); in mtk_thermal_extract_efuse_v2()
1054 return -EINVAL; in mtk_thermal_extract_efuse_v3()
1056 mt->adc_ge = CALIB_BUF0_ADC_GE_V3(buf[0]); in mtk_thermal_extract_efuse_v3()
1057 mt->degc_cali = CALIB_BUF0_DEGC_CALI_V3(buf[0]); in mtk_thermal_extract_efuse_v3()
1058 mt->o_slope = CALIB_BUF0_O_SLOPE_V3(buf[0]); in mtk_thermal_extract_efuse_v3()
1059 mt->vts[VTS1] = CALIB_BUF1_VTS_TS1_V3(buf[1]); in mtk_thermal_extract_efuse_v3()
1060 mt->vts[VTS2] = CALIB_BUF1_VTS_TS2_V3(buf[1]); in mtk_thermal_extract_efuse_v3()
1061 mt->vts[VTSABB] = CALIB_BUF1_VTS_TSABB_V3(buf[1]); in mtk_thermal_extract_efuse_v3()
1062 mt->o_slope_sign = CALIB_BUF1_O_SLOPE_SIGN_V3(buf[1]); in mtk_thermal_extract_efuse_v3()
1065 mt->o_slope = 0; in mtk_thermal_extract_efuse_v3()
1079 mt->adc_ge = 512; in mtk_thermal_get_calibration_data()
1080 mt->adc_oe = 512; in mtk_thermal_get_calibration_data()
1081 for (i = 0; i < mt->conf->num_sensors; i++) in mtk_thermal_get_calibration_data()
1082 mt->vts[i] = 260; in mtk_thermal_get_calibration_data()
1083 mt->degc_cali = 40; in mtk_thermal_get_calibration_data()
1084 mt->o_slope = 0; in mtk_thermal_get_calibration_data()
1086 cell = nvmem_cell_get(dev, "calibration-data"); in mtk_thermal_get_calibration_data()
1088 if (PTR_ERR(cell) == -EPROBE_DEFER) in mtk_thermal_get_calibration_data()
1102 ret = -EINVAL; in mtk_thermal_get_calibration_data()
1106 switch (mt->conf->version) { in mtk_thermal_get_calibration_data()
1117 ret = -EINVAL; in mtk_thermal_get_calibration_data()
1134 .compatible = "mediatek,mt8173-thermal",
1138 .compatible = "mediatek,mt2701-thermal",
1142 .compatible = "mediatek,mt2712-thermal",
1146 .compatible = "mediatek,mt7622-thermal",
1150 .compatible = "mediatek,mt7986-thermal",
1154 .compatible = "mediatek,mt8183-thermal",
1158 .compatible = "mediatek,mt8365-thermal",
1170 if (!mt->conf->apmixed_buffer_ctl_reg) in mtk_thermal_turn_on_buffer()
1173 tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg); in mtk_thermal_turn_on_buffer()
1174 tmp &= mt->conf->apmixed_buffer_ctl_mask; in mtk_thermal_turn_on_buffer()
1175 tmp |= mt->conf->apmixed_buffer_ctl_set; in mtk_thermal_turn_on_buffer()
1176 writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg); in mtk_thermal_turn_on_buffer()
1186 writel(0x1, mt->thermal_base + TEMP_MONCTL0); in mtk_thermal_release_periodic_ts()
1187 tmp = readl(mt->thermal_base + TEMP_MSRCTL1); in mtk_thermal_release_periodic_ts()
1188 writel((tmp & (~0x10e)), mt->thermal_base + TEMP_MSRCTL1); in mtk_thermal_release_periodic_ts()
1194 struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node; in mtk_thermal_probe()
1200 mt = devm_kzalloc(&pdev->dev, sizeof(*mt), GFP_KERNEL); in mtk_thermal_probe()
1202 return -ENOMEM; in mtk_thermal_probe()
1204 mt->conf = of_device_get_match_data(&pdev->dev); in mtk_thermal_probe()
1206 mt->thermal_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); in mtk_thermal_probe()
1207 if (IS_ERR(mt->thermal_base)) in mtk_thermal_probe()
1208 return PTR_ERR(mt->thermal_base); in mtk_thermal_probe()
1210 ret = mtk_thermal_get_calibration_data(&pdev->dev, mt); in mtk_thermal_probe()
1214 mutex_init(&mt->lock); in mtk_thermal_probe()
1216 mt->dev = &pdev->dev; in mtk_thermal_probe()
1220 dev_err(&pdev->dev, "missing auxadc node\n"); in mtk_thermal_probe()
1221 return -ENODEV; in mtk_thermal_probe()
1230 dev_err(&pdev->dev, "Can't get auxadc phys address\n"); in mtk_thermal_probe()
1231 return -EINVAL; in mtk_thermal_probe()
1236 dev_err(&pdev->dev, "missing apmixedsys node\n"); in mtk_thermal_probe()
1237 return -ENODEV; in mtk_thermal_probe()
1246 dev_err(&pdev->dev, "Can't get auxadc phys address\n"); in mtk_thermal_probe()
1247 return -EINVAL; in mtk_thermal_probe()
1250 ret = device_reset_optional(&pdev->dev); in mtk_thermal_probe()
1254 mt->clk_auxadc = devm_clk_get_enabled(&pdev->dev, "auxadc"); in mtk_thermal_probe()
1255 if (IS_ERR(mt->clk_auxadc)) { in mtk_thermal_probe()
1256 ret = PTR_ERR(mt->clk_auxadc); in mtk_thermal_probe()
1257 dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret); in mtk_thermal_probe()
1261 mt->clk_peri_therm = devm_clk_get_enabled(&pdev->dev, "therm"); in mtk_thermal_probe()
1262 if (IS_ERR(mt->clk_peri_therm)) { in mtk_thermal_probe()
1263 ret = PTR_ERR(mt->clk_peri_therm); in mtk_thermal_probe()
1264 dev_err(&pdev->dev, "Can't enable peri clk: %d\n", ret); in mtk_thermal_probe()
1270 if (mt->conf->version != MTK_THERMAL_V1) in mtk_thermal_probe()
1273 if (mt->conf->version == MTK_THERMAL_V1) in mtk_thermal_probe()
1274 mt->raw_to_mcelsius = raw_to_mcelsius_v1; in mtk_thermal_probe()
1275 else if (mt->conf->version == MTK_THERMAL_V2) in mtk_thermal_probe()
1276 mt->raw_to_mcelsius = raw_to_mcelsius_v2; in mtk_thermal_probe()
1278 mt->raw_to_mcelsius = raw_to_mcelsius_v3; in mtk_thermal_probe()
1280 for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++) in mtk_thermal_probe()
1281 for (i = 0; i < mt->conf->num_banks; i++) in mtk_thermal_probe()
1285 tzdev = devm_thermal_of_zone_register(&pdev->dev, 0, mt, in mtk_thermal_probe()
1290 ret = devm_thermal_add_hwmon_sysfs(&pdev->dev, tzdev); in mtk_thermal_probe()
1292 dev_warn(&pdev->dev, "error in thermal_add_hwmon_sysfs"); in mtk_thermal_probe()
1300 .name = "mtk-thermal",