110 struct spi_engine {  struct
349 static bool spi_engine_write_cmd_fifo(struct spi_engine *spi_engine,  in spi_engine_write_cmd_fifo()  argument
352 	void __iomem *addr = spi_engine->base + SPI_ENGINE_REG_CMD_FIFO;  in spi_engine_write_cmd_fifo()
357 	n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_CMD_FIFO_ROOM);  in spi_engine_write_cmd_fifo()
371 static bool spi_engine_write_tx_fifo(struct spi_engine *spi_engine,  in spi_engine_write_tx_fifo()  argument
374 	void __iomem *addr = spi_engine->base + SPI_ENGINE_REG_SDO_DATA_FIFO;  in spi_engine_write_tx_fifo()
378 	n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_SDO_FIFO_ROOM);  in spi_engine_write_tx_fifo()
413 static bool spi_engine_read_rx_fifo(struct spi_engine *spi_engine,  in spi_engine_read_rx_fifo()  argument
416 	void __iomem *addr = spi_engine->base + SPI_ENGINE_REG_SDI_DATA_FIFO;  in spi_engine_read_rx_fifo()
420 	n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_SDI_FIFO_LEVEL);  in spi_engine_read_rx_fifo()
459 	struct spi_engine *spi_engine = spi_controller_get_devdata(host);  in spi_engine_irq()  local
464 	pending = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_INT_PENDING);  in spi_engine_irq()
468 			spi_engine->base + SPI_ENGINE_REG_INT_PENDING);  in spi_engine_irq()
470 			spi_engine->base + SPI_ENGINE_REG_SYNC_ID);  in spi_engine_irq()
473 	spin_lock(&spi_engine->lock);  in spi_engine_irq()
476 		if (!spi_engine_write_cmd_fifo(spi_engine, msg))  in spi_engine_irq()
481 		if (!spi_engine_write_tx_fifo(spi_engine, msg))  in spi_engine_irq()
486 		if (!spi_engine_read_rx_fifo(spi_engine, msg))  in spi_engine_irq()
494 			if (timer_delete_sync(&spi_engine->watchdog_timer)) {  in spi_engine_irq()
504 		spi_engine->int_enable &= ~disable_int;  in spi_engine_irq()
505 		writel_relaxed(spi_engine->int_enable,  in spi_engine_irq()
506 			spi_engine->base + SPI_ENGINE_REG_INT_ENABLE);  in spi_engine_irq()
509 	spin_unlock(&spi_engine->lock);  in spi_engine_irq()
518 	struct spi_engine *spi_engine = spi_controller_get_devdata(host);  in spi_engine_prepare_message()  local
539 	ret = ida_alloc_range(&spi_engine->sync_ida, 0, U8_MAX, GFP_KERNEL);  in spi_engine_prepare_message()
563 	struct spi_engine *spi_engine = spi_controller_get_devdata(host);  in spi_engine_unprepare_message()  local
566 	ida_free(&spi_engine->sync_ida, st->sync_id);  in spi_engine_unprepare_message()
576 	struct spi_engine *spi_engine = spi_controller_get_devdata(host);  in spi_engine_transfer_one_message()  local
581 	mod_timer(&spi_engine->watchdog_timer, jiffies + msecs_to_jiffies(5000));  in spi_engine_transfer_one_message()
583 	spin_lock_irqsave(&spi_engine->lock, flags);  in spi_engine_transfer_one_message()
585 	if (spi_engine_write_cmd_fifo(spi_engine, msg))  in spi_engine_transfer_one_message()
589 	if (spi_engine_write_tx_fifo(spi_engine, msg))  in spi_engine_transfer_one_message()
599 		spi_engine->base + SPI_ENGINE_REG_INT_ENABLE);  in spi_engine_transfer_one_message()
600 	spi_engine->int_enable = int_enable;  in spi_engine_transfer_one_message()
601 	spin_unlock_irqrestore(&spi_engine->lock, flags);  in spi_engine_transfer_one_message()
608 	struct spi_engine *spi_engine = from_timer(spi_engine, timer, watchdog_timer);  in spi_engine_timeout()  local
609 	struct spi_controller *host = spi_engine->controller;  in spi_engine_timeout()
622 	struct spi_engine *spi_engine = p;  in spi_engine_release_hw()  local
624 	writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING);  in spi_engine_release_hw()
625 	writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE);  in spi_engine_release_hw()
626 	writel_relaxed(0x01, spi_engine->base + SPI_ENGINE_REG_RESET);  in spi_engine_release_hw()
631 	struct spi_engine *spi_engine;  in spi_engine_probe()  local
641 	host = devm_spi_alloc_host(&pdev->dev, sizeof(*spi_engine));  in spi_engine_probe()
645 	spi_engine = spi_controller_get_devdata(host);  in spi_engine_probe()
647 	spin_lock_init(&spi_engine->lock);  in spi_engine_probe()
648 	ida_init(&spi_engine->sync_ida);  in spi_engine_probe()
649 	timer_setup(&spi_engine->watchdog_timer, spi_engine_timeout, TIMER_IRQSAFE);  in spi_engine_probe()
650 	spi_engine->controller = host;  in spi_engine_probe()
652 	spi_engine->clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");  in spi_engine_probe()
653 	if (IS_ERR(spi_engine->clk))  in spi_engine_probe()
654 		return PTR_ERR(spi_engine->clk);  in spi_engine_probe()
656 	spi_engine->ref_clk = devm_clk_get_enabled(&pdev->dev, "spi_clk");  in spi_engine_probe()
657 	if (IS_ERR(spi_engine->ref_clk))  in spi_engine_probe()
658 		return PTR_ERR(spi_engine->ref_clk);  in spi_engine_probe()
660 	spi_engine->base = devm_platform_ioremap_resource(pdev, 0);  in spi_engine_probe()
661 	if (IS_ERR(spi_engine->base))  in spi_engine_probe()
662 		return PTR_ERR(spi_engine->base);  in spi_engine_probe()
664 	version = readl(spi_engine->base + SPI_ENGINE_REG_VERSION);  in spi_engine_probe()
673 	writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_RESET);  in spi_engine_probe()
674 	writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING);  in spi_engine_probe()
675 	writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE);  in spi_engine_probe()
678 				       spi_engine);  in spi_engine_probe()
690 	host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2;  in spi_engine_probe()