Lines Matching +full:0 +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
15 #include <linux/nvmem-consumer.h>
20 #include <linux/soc/qcom/llcc-qcom.h>
22 #define ACTIVATE BIT(0)
23 #define DEACTIVATE BIT(1)
24 #define ACT_CLEAR BIT(0)
26 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0)
27 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1)
28 #define ACT_CTRL_ACT_TRIG BIT(0)
29 #define ACT_CTRL_OPCODE_SHIFT 0x01
30 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 0x02
31 #define ATTR1_FIXED_SIZE_SHIFT 0x03
32 #define ATTR1_PRIORITY_SHIFT 0x04
33 #define ATTR1_MAX_CAP_SHIFT 0x10
34 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0)
36 #define ATTR0_BONUS_WAYS_SHIFT 0x10
48 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
49 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
50 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n)
52 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00
53 #define LLCC_TRP_PCB_ACT 0x21f04
54 #define LLCC_TRP_ALGO_CFG1 0x21f0c
55 #define LLCC_TRP_ALGO_CFG2 0x21f10
56 #define LLCC_TRP_ALGO_CFG3 0x21f14
57 #define LLCC_TRP_ALGO_CFG4 0x21f18
58 #define LLCC_TRP_ALGO_CFG5 0x21f1c
59 #define LLCC_TRP_WRSC_EN 0x21f20
60 #define LLCC_TRP_ALGO_CFG6 0x21f24
61 #define LLCC_TRP_ALGO_CFG7 0x21f28
62 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c
63 #define LLCC_TRP_ALGO_CFG8 0x21f30
65 #define LLCC_VERSION_2_0_0_0 0x02000000
66 #define LLCC_VERSION_2_1_0_0 0x02010000
67 #define LLCC_VERSION_4_1_0_0 0x04010000
70 * struct llcc_slice_config - Data associated with the llcc slice
85 * configured to 1 only bonus and reserved ways are probed.
86 * When configured to 0 all ways in llcc are probed.
96 * @stale_cap_en: Bit enables stale only if current scid is over-cap.
97 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is
98 * under-cap.
99 * @mru_rollover: Roll-over on reserved cache ways.
100 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no
101 * same-scid lines for replacement.
102 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID.
103 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority
104 * over-cap scid. Depends on corresponding bit being set in
106 * @vict_prio: When current scid is under-capacity, allocate over other
107 * lower-than victim priority-line threshold scid.
154 { LLCC_CPUSS, 1, 256, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 1 },
155 { LLCC_MDM, 8, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
156 { LLCC_GPUHTW, 11, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
157 { LLCC_GPU, 12, 128, 1, 0, 0xf, 0x0, 0, 0, 0, 1, 0 },
161 { LLCC_CPUSS, 1, 768, 1, 0, 0x3f, 0x0, 0, 0, 0, 1, 1, 0},
162 { LLCC_MDMHPGRW, 7, 512, 2, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
163 { LLCC_CMPT, 10, 768, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
164 { LLCC_GPUHTW, 11, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
165 { LLCC_GPU, 12, 512, 1, 0, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
166 { LLCC_MMUHWT, 13, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 0, 1, 0},
167 { LLCC_MDMPNG, 21, 768, 0, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
168 { LLCC_WLHW, 24, 256, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
169 { LLCC_MODPE, 29, 64, 1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},
173 { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1 },
174 { LLCC_VIDSC0, 2, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
175 { LLCC_VIDSC1, 3, 512, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
176 { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
177 { LLCC_MDMHPGRW, 7, 3072, 1, 1, 0x3ff, 0xc00, 0, 0, 0, 1, 0 },
178 { LLCC_MDM, 8, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
179 { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
180 { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
181 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
182 { LLCC_GPU, 12, 5120, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
183 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1 },
184 { LLCC_CMPTDMA, 15, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
185 { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
186 { LLCC_VIDFW, 17, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
187 { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
188 { LLCC_MDMPNG, 21, 1024, 0, 1, 0xc, 0x0, 0, 0, 0, 1, 0 },
189 { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
190 { LLCC_NPU, 23, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
191 { LLCC_WLHW, 24, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0 },
192 { LLCC_MODPE, 29, 512, 1, 1, 0xc, 0x0, 0, 0, 0, 1, 0 },
193 { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 },
194 { LLCC_WRCACHE, 31, 128, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0 },
198 { LLCC_CPUSS, 1, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
199 { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
200 { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
201 { LLCC_CMPT, 10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
202 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
203 { LLCC_GPU, 12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 },
204 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
205 { LLCC_DISP, 16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
206 { LLCC_AUDHW, 22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
207 { LLCC_ECC, 26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
208 { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
209 { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
210 { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
211 { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
212 { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
213 { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
217 { LLCC_CPUSS, 1, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 1 },
218 { LLCC_VIDSC0, 2, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 },
219 { LLCC_VIDSC1, 3, 512, 2, 1, 0x0, 0x0f0, 0, 0, 1, 1, 0 },
220 { LLCC_ROTATOR, 4, 563, 2, 1, 0x0, 0x00e, 2, 0, 1, 1, 0 },
221 { LLCC_VOICE, 5, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
222 { LLCC_AUDIO, 6, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
223 { LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xfc, 0xf00, 0, 0, 1, 1, 0 },
224 { LLCC_MDM, 8, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
225 { LLCC_CMPT, 10, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
226 { LLCC_GPUHTW, 11, 512, 1, 1, 0xc, 0x0, 0, 0, 1, 1, 0 },
227 { LLCC_GPU, 12, 2304, 1, 0, 0xff0, 0x2, 0, 0, 1, 1, 0 },
228 { LLCC_MMUHWT, 13, 256, 2, 0, 0x0, 0x1, 0, 0, 1, 0, 1 },
229 { LLCC_CMPTDMA, 15, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
230 { LLCC_DISP, 16, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
231 { LLCC_VIDFW, 17, 2816, 1, 0, 0xffc, 0x2, 0, 0, 1, 1, 0 },
232 { LLCC_MDMHPFX, 20, 1024, 2, 1, 0x0, 0xf00, 0, 0, 1, 1, 0 },
233 { LLCC_MDMPNG, 21, 1024, 0, 1, 0x1e, 0x0, 0, 0, 1, 1, 0 },
234 { LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 },
238 { LLCC_CPUSS, 1, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1 },
239 { LLCC_MDM, 8, 512, 2, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
240 { LLCC_GPUHTW, 11, 256, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
241 { LLCC_GPU, 12, 512, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
242 { LLCC_MDMPNG, 21, 768, 0, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
243 { LLCC_NPU, 23, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
244 { LLCC_MODPE, 29, 64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
248 { LLCC_CPUSS, 1, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 1 },
249 { LLCC_MDM, 8, 128, 2, 0, 0xF, 0x0, 0, 0, 0, 1, 0 },
250 { LLCC_GPUHTW, 11, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
251 { LLCC_GPU, 12, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
252 { LLCC_NPU, 23, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 0 },
256 { LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 },
257 { LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
258 { LLCC_VIDSC1, 3, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
259 { LLCC_AUDIO, 6, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
260 { LLCC_MDMHPGRW, 7, 3072, 1, 0, 0xFF, 0xF00, 0, 0, 0, 1, 0 },
261 { LLCC_MDM, 8, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
262 { LLCC_MODHW, 9, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
263 { LLCC_CMPT, 10, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
264 { LLCC_GPUHTW , 11, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
265 { LLCC_GPU, 12, 2560, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
266 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1 },
267 { LLCC_CMPTDMA, 15, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
268 { LLCC_DISP, 16, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
269 { LLCC_MDMHPFX, 20, 1024, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
270 { LLCC_MDMHPFX, 21, 1024, 0, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
271 { LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
272 { LLCC_NPU, 23, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
273 { LLCC_WLHW, 24, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
274 { LLCC_MODPE, 29, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 },
275 { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0 },
276 { LLCC_WRCACHE, 31, 128, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0 },
280 { LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
281 { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
282 { LLCC_AUDIO, 6, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
283 { LLCC_CMPT, 10, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
284 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
285 { LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 },
286 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
287 { LLCC_CMPTDMA, 15, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
288 { LLCC_DISP, 16, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
289 { LLCC_VIDFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
290 { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
291 { LLCC_NPU, 23, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
292 { LLCC_WLHW, 24, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
293 { LLCC_CVP, 28, 256, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
294 { LLCC_APTCM, 30, 128, 3, 0, 0x0, 0x3, 1, 0, 0, 1, 0, 0 },
295 { LLCC_WRCACHE, 31, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
299 { LLCC_CPUSS, 1, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 1 },
300 { LLCC_VIDSC0, 2, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
301 { LLCC_AUDIO, 6, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },
302 { LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
303 { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
304 { LLCC_CMPT, 10, 3072, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
305 { LLCC_GPUHTW, 11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
306 { LLCC_GPU, 12, 1024, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },
307 { LLCC_MMUHWT, 13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
308 { LLCC_DISP, 16, 3072, 2, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
309 { LLCC_MDMPNG, 21, 1024, 0, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 },
310 { LLCC_AUDHW, 22, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
311 { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
312 { LLCC_MODPE, 29, 256, 1, 1, 0xf, 0x0, 0, 0, 0, 0, 1, 0 },
313 { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 0, 1, 0 },
314 { LLCC_WRCACHE, 31, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
315 { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
316 { LLCC_CPUSS1, 3, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
317 { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 1 },
321 {LLCC_CPUSS, 1, 3072, 1, 0, 0xFFFF, 0x0, 0, 0, 0, 1, 1, 0, 0 },
322 {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
323 {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 },
324 {LLCC_MDMHPGRW, 7, 1024, 3, 0, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
325 {LLCC_MODHW, 9, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
326 {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
327 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
328 {LLCC_GPU, 12, 2048, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 1, 0 },
329 {LLCC_MMUHWT, 13, 768, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0 },
330 {LLCC_DISP, 16, 4096, 2, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
331 {LLCC_MDMPNG, 21, 1024, 1, 1, 0xF000, 0x0, 0, 0, 0, 1, 0, 0, 0 },
332 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 },
333 {LLCC_CVP, 28, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
334 {LLCC_MODPE, 29, 64, 1, 1, 0xF000, 0x0, 0, 0, 0, 1, 0, 0, 0 },
335 {LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xF0, 1, 0, 0, 1, 0, 0, 0 },
336 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0 },
337 {LLCC_CVPFW, 17, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
338 {LLCC_CPUSS1, 3, 1024, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
339 {LLCC_CAMEXP0, 4, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
340 {LLCC_CPUMTE, 23, 256, 1, 1, 0x0FFF, 0x0, 0, 0, 0, 0, 1, 0, 0 },
341 {LLCC_CPUHWT, 5, 512, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 1, 0, 0 },
342 {LLCC_CAMEXP1, 27, 256, 3, 1, 0xFFFF, 0x0, 0, 0, 0, 1, 0, 0, 0 },
343 {LLCC_AENPU, 8, 2048, 1, 1, 0xFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0 },
347 {LLCC_CPUSS, 1, 5120, 1, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
348 {LLCC_VIDSC0, 2, 512, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
349 {LLCC_AUDIO, 6, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
350 {LLCC_MDMHPGRW, 25, 1024, 4, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
351 {LLCC_MODHW, 26, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
352 {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
353 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
354 {LLCC_GPU, 9, 3096, 1, 0, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, },
355 {LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
356 {LLCC_DISP, 16, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
357 {LLCC_MDMPNG, 27, 1024, 0, 1, 0xF00000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
358 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
359 {LLCC_CVP, 8, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
360 {LLCC_MODPE, 29, 64, 1, 1, 0xF00000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, },
361 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
362 {LLCC_CAMEXP0, 4, 256, 4, 1, 0xF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
363 {LLCC_CPUHWT, 5, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
364 {LLCC_CAMEXP1, 7, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
365 {LLCC_CMPTHCP, 17, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
366 {LLCC_LCPDARE, 30, 128, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, },
367 {LLCC_AENPU, 3, 3072, 1, 1, 0xFE01FF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
368 {LLCC_ISLAND1, 12, 1792, 7, 1, 0xFE00, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
369 {LLCC_ISLAND4, 15, 256, 7, 1, 0x10000, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
370 {LLCC_CAMEXP2, 19, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
371 {LLCC_CAMEXP3, 20, 3200, 2, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
372 {LLCC_CAMEXP4, 21, 3200, 2, 1, 0xFFFFF0, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
373 {LLCC_DISP_WB, 23, 1024, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
374 {LLCC_DISP_1, 24, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
375 {LLCC_VIDVSP, 28, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
379 {LLCC_CPUSS, 1, 5120, 1, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0},
380 {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
381 {LLCC_AUDIO, 6, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
382 {LLCC_MDMHPGRW, 25, 1024, 3, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
383 {LLCC_MODHW, 26, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
384 {LLCC_CMPT, 10, 4096, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
385 {LLCC_GPUHTW, 11, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
386 {LLCC_GPU, 9, 3096, 1, 0, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0},
387 {LLCC_MMUHWT, 18, 768, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
388 {LLCC_DISP, 16, 6144, 1, 1, 0xFFFFFF, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
389 {LLCC_MDMHPFX, 24, 1024, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
390 {LLCC_MDMPNG, 27, 1024, 0, 1, 0x000000, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
391 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
392 {LLCC_CVP, 8, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
393 {LLCC_MODPE, 29, 128, 1, 1, 0xF00000, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0},
394 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
395 {LLCC_CAMEXP0, 4, 256, 3, 1, 0xF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
396 {LLCC_CAMEXP1, 7, 3200, 3, 1, 0xFFFFF0, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
397 {LLCC_CMPTHCP, 17, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
398 {LLCC_LCPDARE, 30, 128, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0},
399 {LLCC_AENPU, 3, 3072, 1, 1, 0xFFFFFF, 0x0, 2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
400 {LLCC_ISLAND1, 12, 5888, 7, 1, 0x0, 0x7FFFFF, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
401 {LLCC_DISP_WB, 23, 1024, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
402 {LLCC_VIDVSP, 28, 256, 3, 1, 0xFFFFFF, 0x0, 0, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
406 { LLCC_MDMHPGRW, 7, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
407 { LLCC_MODHW, 9, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
408 { LLCC_MDMPNG, 21, 256, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 },
409 { LLCC_ECC, 26, 512, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 },
410 { LLCC_MODPE, 29, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
411 { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 },
412 { LLCC_WRCACHE, 31, 128, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 },
416 { LLCC_MDMHPGRW, 7, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
417 { LLCC_MODHW, 9, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
418 { LLCC_MDMPNG, 21, 512, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 },
419 { LLCC_ECC, 26, 1024, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 },
420 { LLCC_MODPE, 29, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
421 { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 },
422 { LLCC_WRCACHE, 31, 256, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 },
426 { LLCC_MDMHPGRW, 7, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
427 { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
428 { LLCC_MDMPNG, 21, 1024, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 },
429 { LLCC_ECC, 26, 2048, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 },
430 { LLCC_MODPE, 29, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 },
431 { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xc, 1, 0, 0, 1, 0, 0, 0 },
432 { LLCC_WRCACHE, 31, 512, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 },
436 {LLCC_CPUSS, 1, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0},
437 {LLCC_VIDSC0, 2, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
438 {LLCC_AUDIO, 6, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
439 {LLCC_CMPT, 10, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
440 {LLCC_GPUHTW, 11, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
441 {LLCC_GPU, 9, 4096, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0},
442 {LLCC_MMUHWT, 18, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
443 {LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
444 {LLCC_CVP, 8, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
445 {LLCC_WRCACHE, 31, 512, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
446 {LLCC_CAMEXP1, 7, 3072, 2, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
447 {LLCC_LCPDARE, 30, 512, 3, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
448 {LLCC_AENPU, 3, 3072, 1, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
449 {LLCC_ISLAND1, 12, 512, 7, 1, 0x1, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
450 {LLCC_ISLAND2, 13, 512, 7, 1, 0x2, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
451 {LLCC_ISLAND3, 14, 512, 7, 1, 0x3, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
452 {LLCC_ISLAND4, 15, 512, 7, 1, 0x4, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
453 {LLCC_CAMEXP2, 19, 3072, 3, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
454 {LLCC_CAMEXP3, 20, 3072, 3, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
455 {LLCC_CAMEXP4, 21, 3072, 3, 1, 0xFFF, 0x0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
459 .trp_ecc_error_status0 = 0x20344,
460 .trp_ecc_error_status1 = 0x20348,
461 .trp_ecc_sb_err_syn0 = 0x2304c,
462 .trp_ecc_db_err_syn0 = 0x20370,
463 .trp_ecc_error_cntr_clear = 0x20440,
464 .trp_interrupt_0_status = 0x20480,
465 .trp_interrupt_0_clear = 0x20484,
466 .trp_interrupt_0_enable = 0x20488,
469 .cmn_status0 = 0x3000c,
470 .cmn_interrupt_0_enable = 0x3001c,
471 .cmn_interrupt_2_enable = 0x3003c,
474 .drp_ecc_error_cfg = 0x40000,
475 .drp_ecc_error_cntr_clear = 0x40004,
476 .drp_interrupt_status = 0x41000,
477 .drp_interrupt_clear = 0x41008,
478 .drp_interrupt_enable = 0x4100c,
479 .drp_ecc_error_status0 = 0x42044,
480 .drp_ecc_error_status1 = 0x42048,
481 .drp_ecc_sb_err_syn0 = 0x4204c,
482 .drp_ecc_db_err_syn0 = 0x42070,
486 .trp_ecc_error_status0 = 0x20344,
487 .trp_ecc_error_status1 = 0x20348,
488 .trp_ecc_sb_err_syn0 = 0x2034c,
489 .trp_ecc_db_err_syn0 = 0x20370,
490 .trp_ecc_error_cntr_clear = 0x20440,
491 .trp_interrupt_0_status = 0x20480,
492 .trp_interrupt_0_clear = 0x20484,
493 .trp_interrupt_0_enable = 0x20488,
496 .cmn_status0 = 0x3400c,
497 .cmn_interrupt_0_enable = 0x3401c,
498 .cmn_interrupt_2_enable = 0x3403c,
501 .drp_ecc_error_cfg = 0x50000,
502 .drp_ecc_error_cntr_clear = 0x50004,
503 .drp_interrupt_status = 0x50020,
504 .drp_interrupt_clear = 0x50028,
505 .drp_interrupt_enable = 0x5002c,
506 .drp_ecc_error_status0 = 0x520f4,
507 .drp_ecc_error_status1 = 0x520f8,
508 .drp_ecc_sb_err_syn0 = 0x520fc,
509 .drp_ecc_db_err_syn0 = 0x52120,
514 [LLCC_COMMON_HW_INFO] = 0x00030000,
515 [LLCC_COMMON_STATUS0] = 0x0003000c,
520 [LLCC_COMMON_HW_INFO] = 0x00034000,
521 [LLCC_COMMON_STATUS0] = 0x0003400c,
771 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
774 * llcc_slice_getd - get llcc slice descriptor
789 cfg = drv_data->cfg; in llcc_slice_getd()
790 sz = drv_data->cfg_size; in llcc_slice_getd()
792 for (count = 0; cfg && count < sz; count++, cfg++) in llcc_slice_getd()
793 if (cfg->usecase_id == uid) in llcc_slice_getd()
797 return ERR_PTR(-ENODEV); in llcc_slice_getd()
801 return ERR_PTR(-ENOMEM); in llcc_slice_getd()
803 desc->slice_id = cfg->slice_id; in llcc_slice_getd()
804 desc->slice_size = cfg->max_cap; in llcc_slice_getd()
811 * llcc_slice_putd - llcc slice descriptor
839 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, in llcc_update_act_ctrl()
846 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, in llcc_update_act_ctrl()
851 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in llcc_update_act_ctrl()
852 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, in llcc_update_act_ctrl()
854 0, LLCC_STATUS_READ_DELAY); in llcc_update_act_ctrl()
859 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, in llcc_update_act_ctrl()
861 0, LLCC_STATUS_READ_DELAY); in llcc_update_act_ctrl()
863 if (drv_data->version >= LLCC_VERSION_4_1_0_0) in llcc_update_act_ctrl()
864 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg, in llcc_update_act_ctrl()
871 * llcc_slice_activate - Activate the llcc slice
886 return -EINVAL; in llcc_slice_activate()
888 mutex_lock(&drv_data->lock); in llcc_slice_activate()
889 if (test_bit(desc->slice_id, drv_data->bitmap)) { in llcc_slice_activate()
890 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
891 return 0; in llcc_slice_activate()
896 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, in llcc_slice_activate()
899 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
903 __set_bit(desc->slice_id, drv_data->bitmap); in llcc_slice_activate()
904 mutex_unlock(&drv_data->lock); in llcc_slice_activate()
911 * llcc_slice_deactivate - Deactivate the llcc slice
926 return -EINVAL; in llcc_slice_deactivate()
928 mutex_lock(&drv_data->lock); in llcc_slice_deactivate()
929 if (!test_bit(desc->slice_id, drv_data->bitmap)) { in llcc_slice_deactivate()
930 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
931 return 0; in llcc_slice_deactivate()
935 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, in llcc_slice_deactivate()
938 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
942 __clear_bit(desc->slice_id, drv_data->bitmap); in llcc_slice_deactivate()
943 mutex_unlock(&drv_data->lock); in llcc_slice_deactivate()
950 * llcc_get_slice_id - return the slice id
956 return -EINVAL; in llcc_get_slice_id()
958 return desc->slice_id; in llcc_get_slice_id()
963 * llcc_get_slice_size - return the slice id
969 return 0; in llcc_get_slice_size()
971 return desc->slice_size; in llcc_get_slice_size()
988 attr1_val = config->cache_mode; in _qcom_llcc_cfg_program()
989 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT; in _qcom_llcc_cfg_program()
990 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT; in _qcom_llcc_cfg_program()
991 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT; in _qcom_llcc_cfg_program()
993 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap); in _qcom_llcc_cfg_program()
1002 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; in _qcom_llcc_cfg_program()
1006 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
1008 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); in _qcom_llcc_cfg_program()
1012 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1013 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
1014 attr0_val = config->res_ways; in _qcom_llcc_cfg_program()
1015 attr2_val = config->bonus_ways; in _qcom_llcc_cfg_program()
1017 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK; in _qcom_llcc_cfg_program()
1018 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT; in _qcom_llcc_cfg_program()
1021 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id); in _qcom_llcc_cfg_program()
1023 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); in _qcom_llcc_cfg_program()
1027 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1028 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); in _qcom_llcc_cfg_program()
1033 if (cfg->need_llcc_cfg) { in _qcom_llcc_cfg_program()
1036 disable_cap_alloc = config->dis_cap_alloc << config->slice_id; in _qcom_llcc_cfg_program()
1037 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC, in _qcom_llcc_cfg_program()
1038 BIT(config->slice_id), disable_cap_alloc); in _qcom_llcc_cfg_program()
1042 if (drv_data->version < LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1043 retain_pc = config->retain_on_pc << config->slice_id; in _qcom_llcc_cfg_program()
1044 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT, in _qcom_llcc_cfg_program()
1045 BIT(config->slice_id), retain_pc); in _qcom_llcc_cfg_program()
1051 if (drv_data->version >= LLCC_VERSION_2_0_0_0) { in _qcom_llcc_cfg_program()
1054 wren = config->write_scid_en << config->slice_id; in _qcom_llcc_cfg_program()
1055 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN, in _qcom_llcc_cfg_program()
1056 BIT(config->slice_id), wren); in _qcom_llcc_cfg_program()
1061 if (drv_data->version >= LLCC_VERSION_2_1_0_0) { in _qcom_llcc_cfg_program()
1064 wr_cache_en = config->write_scid_cacheable_en << config->slice_id; in _qcom_llcc_cfg_program()
1065 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN, in _qcom_llcc_cfg_program()
1066 BIT(config->slice_id), wr_cache_en); in _qcom_llcc_cfg_program()
1071 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { in _qcom_llcc_cfg_program()
1081 stale_en = config->stale_en << config->slice_id; in _qcom_llcc_cfg_program()
1082 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1, in _qcom_llcc_cfg_program()
1083 BIT(config->slice_id), stale_en); in _qcom_llcc_cfg_program()
1087 stale_cap_en = config->stale_cap_en << config->slice_id; in _qcom_llcc_cfg_program()
1088 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2, in _qcom_llcc_cfg_program()
1089 BIT(config->slice_id), stale_cap_en); in _qcom_llcc_cfg_program()
1093 mru_uncap_en = config->mru_uncap_en << config->slice_id; in _qcom_llcc_cfg_program()
1094 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3, in _qcom_llcc_cfg_program()
1095 BIT(config->slice_id), mru_uncap_en); in _qcom_llcc_cfg_program()
1099 mru_rollover = config->mru_rollover << config->slice_id; in _qcom_llcc_cfg_program()
1100 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4, in _qcom_llcc_cfg_program()
1101 BIT(config->slice_id), mru_rollover); in _qcom_llcc_cfg_program()
1105 alloc_oneway_en = config->alloc_oneway_en << config->slice_id; in _qcom_llcc_cfg_program()
1106 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5, in _qcom_llcc_cfg_program()
1107 BIT(config->slice_id), alloc_oneway_en); in _qcom_llcc_cfg_program()
1111 ovcap_en = config->ovcap_en << config->slice_id; in _qcom_llcc_cfg_program()
1112 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6, in _qcom_llcc_cfg_program()
1113 BIT(config->slice_id), ovcap_en); in _qcom_llcc_cfg_program()
1117 ovcap_prio = config->ovcap_prio << config->slice_id; in _qcom_llcc_cfg_program()
1118 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7, in _qcom_llcc_cfg_program()
1119 BIT(config->slice_id), ovcap_prio); in _qcom_llcc_cfg_program()
1123 vict_prio = config->vict_prio << config->slice_id; in _qcom_llcc_cfg_program()
1124 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8, in _qcom_llcc_cfg_program()
1125 BIT(config->slice_id), vict_prio); in _qcom_llcc_cfg_program()
1130 if (config->activate_on_init) { in _qcom_llcc_cfg_program()
1131 desc.slice_id = config->slice_id; in _qcom_llcc_cfg_program()
1143 int ret = 0; in qcom_llcc_cfg_program()
1146 sz = drv_data->cfg_size; in qcom_llcc_cfg_program()
1147 llcc_table = drv_data->cfg; in qcom_llcc_cfg_program()
1149 for (i = 0; i < sz; i++) { in qcom_llcc_cfg_program()
1162 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index); in qcom_llcc_get_cfg_index()
1163 if (ret == -ENOENT || ret == -EOPNOTSUPP) { in qcom_llcc_get_cfg_index()
1164 if (num_config > 1) in qcom_llcc_get_cfg_index()
1165 return -EINVAL; in qcom_llcc_get_cfg_index()
1166 *cfg_index = 0; in qcom_llcc_get_cfg_index()
1167 return 0; in qcom_llcc_get_cfg_index()
1171 ret = -EINVAL; in qcom_llcc_get_cfg_index()
1179 drv_data = ERR_PTR(-ENODEV); in qcom_llcc_remove()
1198 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); in qcom_llcc_init_mmio()
1204 struct device *dev = &pdev->dev; in qcom_llcc_probe()
1216 return -EBUSY; in qcom_llcc_probe()
1220 ret = -ENOMEM; in qcom_llcc_probe()
1225 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); in qcom_llcc_probe()
1231 cfgs = of_device_get_match_data(&pdev->dev); in qcom_llcc_probe()
1233 ret = -EINVAL; in qcom_llcc_probe()
1236 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); in qcom_llcc_probe()
1239 cfg = &cfgs->llcc_config[cfg_index]; in qcom_llcc_probe()
1241 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); in qcom_llcc_probe()
1247 drv_data->num_banks = num_banks; in qcom_llcc_probe()
1249 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); in qcom_llcc_probe()
1250 if (!drv_data->regmaps) { in qcom_llcc_probe()
1251 ret = -ENOMEM; in qcom_llcc_probe()
1255 drv_data->regmaps[0] = regmap; in qcom_llcc_probe()
1258 for (i = 1; i < num_banks; i++) { in qcom_llcc_probe()
1261 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); in qcom_llcc_probe()
1262 if (IS_ERR(drv_data->regmaps[i])) { in qcom_llcc_probe()
1263 ret = PTR_ERR(drv_data->regmaps[i]); in qcom_llcc_probe()
1271 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); in qcom_llcc_probe()
1272 if (IS_ERR(drv_data->bcast_regmap)) { in qcom_llcc_probe()
1273 ret = PTR_ERR(drv_data->bcast_regmap); in qcom_llcc_probe()
1278 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], in qcom_llcc_probe()
1283 drv_data->version = version; in qcom_llcc_probe()
1285 llcc_cfg = cfg->sct_data; in qcom_llcc_probe()
1286 sz = cfg->size; in qcom_llcc_probe()
1288 for (i = 0; i < sz; i++) in qcom_llcc_probe()
1289 if (llcc_cfg[i].slice_id > drv_data->max_slices) in qcom_llcc_probe()
1290 drv_data->max_slices = llcc_cfg[i].slice_id; in qcom_llcc_probe()
1292 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, in qcom_llcc_probe()
1294 if (!drv_data->bitmap) { in qcom_llcc_probe()
1295 ret = -ENOMEM; in qcom_llcc_probe()
1299 drv_data->cfg = llcc_cfg; in qcom_llcc_probe()
1300 drv_data->cfg_size = sz; in qcom_llcc_probe()
1301 drv_data->edac_reg_offset = cfg->edac_reg_offset; in qcom_llcc_probe()
1302 mutex_init(&drv_data->lock); in qcom_llcc_probe()
1309 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); in qcom_llcc_probe()
1317 if (!cfg->no_edac) { in qcom_llcc_probe()
1318 llcc_edac = platform_device_register_data(&pdev->dev, in qcom_llcc_probe()
1319 "qcom_llcc_edac", -1, drv_data, in qcom_llcc_probe()
1325 return 0; in qcom_llcc_probe()
1327 drv_data = ERR_PTR(-ENODEV); in qcom_llcc_probe()
1332 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
1333 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
1334 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs },
1335 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
1336 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs },
1337 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs },
1338 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs },
1339 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs },
1340 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs },
1341 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs },
1342 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs },
1343 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs },
1344 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs },
1345 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs },
1346 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs },
1353 .name = "qcom-llcc",