1 // SPDX-License-Identifier: GPL-2.0-only
3  * PolarFire SoC (MPFS) Peripheral Clock Reset Controller
14 #include <linux/reset-controller.h>
15 #include <dt-bindings/clock/microchip,mpfs-clock.h>
16 #include <soc/microchip/mpfs.h>
20  * defines in the dt to make things easier to configure - so this is accounting
32  * Peripheral clock resets
42 	reg = mpfs_reset_read(rcdev->dev);  in mpfs_assert()
44 	mpfs_reset_write(rcdev->dev, reg);  in mpfs_assert()
58 	reg = mpfs_reset_read(rcdev->dev);  in mpfs_deassert()
60 	mpfs_reset_write(rcdev->dev, reg);  in mpfs_deassert()
69 	u32 reg = mpfs_reset_read(rcdev->dev);  in mpfs_status()
99 	unsigned int index = reset_spec->args[0];  in mpfs_reset_xlate()
102 	 * CLK_RESERVED does not map to a clock, but it does map to a reset,  in mpfs_reset_xlate()
104 	 * so if this reset gets called - do not reset it.  in mpfs_reset_xlate()
107 		dev_err(rcdev->dev, "Resetting the fabric is not supported\n");  in mpfs_reset_xlate()
108 		return -EINVAL;  in mpfs_reset_xlate()
111 	if (index < MPFS_PERIPH_OFFSET || index >= (MPFS_PERIPH_OFFSET + rcdev->nr_resets)) {  in mpfs_reset_xlate()
112 		dev_err(rcdev->dev, "Invalid reset index %u\n", index);  in mpfs_reset_xlate()
113 		return -EINVAL;  in mpfs_reset_xlate()
116 	return index - MPFS_PERIPH_OFFSET;  in mpfs_reset_xlate()
122 	struct device *dev = &adev->dev;  in mpfs_reset_probe()
127 		return -ENOMEM;  in mpfs_reset_probe()
129 	rcdev->dev = dev;  in mpfs_reset_probe()
130 	rcdev->dev->parent = dev->parent;  in mpfs_reset_probe()
131 	rcdev->ops = &mpfs_reset_ops;  in mpfs_reset_probe()
132 	rcdev->of_node = dev->parent->of_node;  in mpfs_reset_probe()
133 	rcdev->of_reset_n_cells = 1;  in mpfs_reset_probe()
134 	rcdev->of_xlate = mpfs_reset_xlate;  in mpfs_reset_probe()
135 	rcdev->nr_resets = MPFS_NUM_RESETS;  in mpfs_reset_probe()
142 		.name = "clk_mpfs.reset-mpfs",