Lines Matching +full:default +full:- +full:on
1 # SPDX-License-Identifier: GPL-2.0-only
7 default y if ARCH_HAS_RESET_CONTROLLER
12 via GPIOs or SoC-internal reset controller modules.
20 depends on MFD_ALTERA_A10SR || COMPILE_TEST
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
27 default ATH79
34 default ARC_PLAT_AXS10X
40 depends on BMIPS_GENERIC || COMPILE_TEST
41 default BMIPS_GENERIC
47 depends on ARCH_BERLIN || COMPILE_TEST
48 default m if ARCH_BERLIN
54 depends on ARCH_BRCMSTB || COMPILE_TEST
55 default ARCH_BRCMSTB
62 depends on HAS_IOMEM
63 depends on ARCH_BRCMSTB || COMPILE_TEST
64 default ARCH_BRCMSTB
66 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
71 depends on HAS_IOMEM
72 depends on ARC_SOC_HSDK || COMPILE_TEST
78 depends on HAS_IOMEM
79 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
80 default y if SOC_IMX7D
87 depends on X86 || COMPILE_TEST
88 depends on OF && HAS_IOMEM
97 depends on (SOC_CANAAN || COMPILE_TEST) && OF
99 default SOC_CANAAN
101 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
107 default SOC_TYPE_XWAY
113 default ARCH_LPC18XX
119 depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
120 default y if SPARX5_SWITCH
127 depends on ARCH_MESON || COMPILE_TEST
128 default ARCH_MESON
134 depends on ARCH_MESON || COMPILE_TEST
141 default ARCH_NPCM
148 depends on ARCH_MA35 || COMPILE_TEST
149 default ARCH_MA35
155 depends on MIPS || COMPILE_TEST
161 depends on MCHP_CLK_MPFS
163 default MCHP_CLK_MPFS
169 depends on ARCH_QCOM || COMPILE_TEST
171 This enables the AOSS (always on subsystem) reset driver
178 depends on ARCH_QCOM || COMPILE_TEST
187 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
188 default USB_XHCI_PCI
190 Raspberry Pi 4's co-processor controls some of the board's HW
193 interfacing with RPi4's co-processor and model these firmware
198 depends on ARCH_RZG2L || COMPILE_TEST
200 Support for USBPHY Control found on RZ/G2L family. It mainly
205 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
206 default ARM_SCMI_PROTOCOL
216 …default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SO…
217 depends on HAS_IOMEM
224 - Altera SoCFPGAs
225 - ASPEED BMC SoCs
226 - Bitmain BM1880 SoC
227 - Realtek SoCs
228 - RCC reset controller in STM32 MCUs
229 - Allwinner SoCs
230 - SiFive FU740 SoCs
234 default ARM && ARCH_INTEL_SOCFPGA
242 default ARCH_SUNPLUS
251 default ARCH_SUNXI
257 tristate "TI System Control Interface (TI-SCI) reset driver"
258 depends on TI_SCI_PROTOCOL || (COMPILE_TEST && TI_SCI_PROTOCOL=n)
261 available on some new TI's SoCs. If you wish to use reset resources
266 depends on HAS_IOMEM
270 memory-mapped reset registers as part of a syscon device node. If
271 you wish to use the reset framework for such memory-mapped devices,
284 depends on MFD_TN48M_CPLD || COMPILE_TEST
285 default MFD_TN48M_CPLD
288 It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
289 switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and
293 called reset-tn48m.
297 depends on ARCH_UNIPHIER || COMPILE_TEST
298 depends on OF && MFD_SYSCON
299 default ARCH_UNIPHIER
301 Support for reset controllers on UniPhier SoCs.
307 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
308 default ARCH_UNIPHIER
312 on UniPhier SoCs. Say Y if you want to control reset signals
317 default ARCH_ZYNQ