16  * - The period and duty cycle can't be changed together in one atomic action.
45  * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are
58 						   int period, int duty)  in ntxec_pwm_set_raw_period_and_duty_cycle()  argument
63 	 * Changes to the period and duty cycle take effect as soon as the  in ntxec_pwm_set_raw_period_and_duty_cycle()
65 	 * to an inconsistent state after the period is written and before the  in ntxec_pwm_set_raw_period_and_duty_cycle()
67 	 * is longer than the new period, the EC may output 100% for a moment.  in ntxec_pwm_set_raw_period_and_duty_cycle()
69 	 * To minimize the time between the changes to period and duty cycle  in ntxec_pwm_set_raw_period_and_duty_cycle()
74 		{ NTXEC_REG_PERIOD_HIGH, ntxec_reg8(period >> 8) },  in ntxec_pwm_set_raw_period_and_duty_cycle()
76 		{ NTXEC_REG_PERIOD_LOW, ntxec_reg8(period) },  in ntxec_pwm_set_raw_period_and_duty_cycle()
87 	unsigned int period, duty;  in ntxec_pwm_apply()  local
93 	period = min_t(u64, state->period, MAX_PERIOD_NS);  in ntxec_pwm_apply()
94 	duty   = min_t(u64, state->duty_cycle, period);  in ntxec_pwm_apply()
96 	period /= TIME_BASE_NS;  in ntxec_pwm_apply()
109 		res = ntxec_pwm_set_raw_period_and_duty_cycle(chip, period, duty);  in ntxec_pwm_apply()