Lines Matching full:sfp
99 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_pin_dbg_show() local
100 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pin_dbg_show()
104 if (pin < sfp->gc.ngpio) { in jh7110_pin_dbg_show()
107 u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset); in jh7110_pin_dbg_show()
108 u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset); in jh7110_pin_dbg_show()
109 u32 gpi = readl_relaxed(sfp->base + info->gpi_reg_base + offset); in jh7110_pin_dbg_show()
127 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_dt_node_to_map() local
128 struct device *dev = sfp->gc.parent; in jh7110_dt_node_to_map()
152 mutex_lock(&sfp->mutex); in jh7110_dt_node_to_map()
230 mutex_unlock(&sfp->mutex); in jh7110_dt_node_to_map()
240 mutex_unlock(&sfp->mutex); in jh7110_dt_node_to_map()
253 void jh7110_set_gpiomux(struct jh7110_pinctrl *sfp, unsigned int pin, in jh7110_set_gpiomux() argument
256 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_set_gpiomux()
268 reg_dout = sfp->base + info->dout_reg_base + offset; in jh7110_set_gpiomux()
269 reg_doen = sfp->base + info->doen_reg_base + offset; in jh7110_set_gpiomux()
276 reg_din = sfp->base + info->gpi_reg_base + ioffset; in jh7110_set_gpiomux()
283 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_set_gpiomux()
292 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_set_gpiomux()
299 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_set_mux() local
300 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_set_mux()
314 info->jh7110_set_one_pin_mux(sfp, in jh7110_set_mux()
351 static void jh7110_padcfg_rmw(struct jh7110_pinctrl *sfp, in jh7110_padcfg_rmw() argument
354 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_padcfg_rmw()
362 padcfg_base = info->jh7110_get_padcfg_base(sfp, pin); in jh7110_padcfg_rmw()
366 reg = sfp->base + padcfg_base + 4 * pin; in jh7110_padcfg_rmw()
369 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_padcfg_rmw()
372 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_padcfg_rmw()
378 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_pinconf_get() local
379 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pinconf_get()
388 padcfg_base = info->jh7110_get_padcfg_base(sfp, pin); in jh7110_pinconf_get()
392 padcfg = readl_relaxed(sfp->base + padcfg_base + 4 * pin); in jh7110_pinconf_get()
448 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_pinconf_group_set() local
512 jh7110_padcfg_rmw(sfp, group->grp.pins[i], mask, value); in jh7110_pinconf_group_set()
521 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_pinconf_dbg_show() local
522 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pinconf_dbg_show()
529 padcfg_base = info->jh7110_get_padcfg_base(sfp, pin); in jh7110_pinconf_dbg_show()
533 value = readl_relaxed(sfp->base + padcfg_base + 4 * pin); in jh7110_pinconf_dbg_show()
551 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_get_direction() local
553 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_gpio_get_direction()
556 u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset); in jh7110_gpio_get_direction()
567 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_direction_input() local
569 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_gpio_direction_input()
572 jh7110_padcfg_rmw(sfp, gpio, in jh7110_gpio_direction_input()
577 info->jh7110_set_one_pin_mux(sfp, gpio, in jh7110_gpio_direction_input()
586 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_direction_output() local
588 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_gpio_direction_output()
591 info->jh7110_set_one_pin_mux(sfp, gpio, in jh7110_gpio_direction_output()
596 jh7110_padcfg_rmw(sfp, gpio, in jh7110_gpio_direction_output()
604 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_get() local
606 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_gpio_get()
607 void __iomem *reg = sfp->base + info->gpioin_reg_base in jh7110_gpio_get()
616 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_set() local
618 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_gpio_set()
621 void __iomem *reg_dout = sfp->base + info->dout_reg_base + offset; in jh7110_gpio_set()
626 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_gpio_set()
629 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_gpio_set()
635 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_set_config() local
672 jh7110_padcfg_rmw(sfp, gpio, mask, value); in jh7110_gpio_set_config()
678 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_gpio_add_pin_ranges() local
681 sfp->gpios.name = sfp->gc.label; in jh7110_gpio_add_pin_ranges()
682 sfp->gpios.base = sfp->gc.base; in jh7110_gpio_add_pin_ranges()
683 sfp->gpios.pin_base = 0; in jh7110_gpio_add_pin_ranges()
684 sfp->gpios.npins = sfp->gc.ngpio; in jh7110_gpio_add_pin_ranges()
685 sfp->gpios.gc = &sfp->gc; in jh7110_gpio_add_pin_ranges()
686 pinctrl_add_gpio_range(sfp->pctl, &sfp->gpios); in jh7110_gpio_add_pin_ranges()
692 struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d); in jh7110_irq_ack() local
693 const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg; in jh7110_irq_ack()
695 void __iomem *ic = sfp->base + irq_reg->ic_reg_base in jh7110_irq_ack()
701 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_irq_ack()
705 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_irq_ack()
710 struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d); in jh7110_irq_mask() local
711 const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg; in jh7110_irq_mask()
713 void __iomem *ie = sfp->base + irq_reg->ie_reg_base in jh7110_irq_mask()
719 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_irq_mask()
722 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_irq_mask()
724 gpiochip_disable_irq(&sfp->gc, d->hwirq); in jh7110_irq_mask()
729 struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d); in jh7110_irq_mask_ack() local
730 const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg; in jh7110_irq_mask_ack()
732 void __iomem *ie = sfp->base + irq_reg->ie_reg_base in jh7110_irq_mask_ack()
734 void __iomem *ic = sfp->base + irq_reg->ic_reg_base in jh7110_irq_mask_ack()
740 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_irq_mask_ack()
747 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_irq_mask_ack()
752 struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d); in jh7110_irq_unmask() local
753 const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg; in jh7110_irq_unmask()
755 void __iomem *ie = sfp->base + irq_reg->ie_reg_base in jh7110_irq_unmask()
761 gpiochip_enable_irq(&sfp->gc, d->hwirq); in jh7110_irq_unmask()
763 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_irq_unmask()
766 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_irq_unmask()
771 struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d); in jh7110_irq_set_type() local
772 const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg; in jh7110_irq_set_type()
774 void __iomem *base = sfp->base + 4 * (gpio / 32); in jh7110_irq_set_type()
814 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_irq_set_type()
823 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_irq_set_type()
846 struct jh7110_pinctrl *sfp; in jh7110_pinctrl_probe() local
861 sfp = devm_kzalloc(dev, sizeof(*sfp), GFP_KERNEL); in jh7110_pinctrl_probe()
862 if (!sfp) in jh7110_pinctrl_probe()
866 sfp->saved_regs = devm_kcalloc(dev, info->nsaved_regs, in jh7110_pinctrl_probe()
867 sizeof(*sfp->saved_regs), GFP_KERNEL); in jh7110_pinctrl_probe()
868 if (!sfp->saved_regs) in jh7110_pinctrl_probe()
872 sfp->base = devm_platform_ioremap_resource(pdev, 0); in jh7110_pinctrl_probe()
873 if (IS_ERR(sfp->base)) in jh7110_pinctrl_probe()
874 return PTR_ERR(sfp->base); in jh7110_pinctrl_probe()
917 sfp->info = info; in jh7110_pinctrl_probe()
918 sfp->dev = dev; in jh7110_pinctrl_probe()
919 platform_set_drvdata(pdev, sfp); in jh7110_pinctrl_probe()
920 sfp->gc.parent = dev; in jh7110_pinctrl_probe()
921 raw_spin_lock_init(&sfp->lock); in jh7110_pinctrl_probe()
922 mutex_init(&sfp->mutex); in jh7110_pinctrl_probe()
926 sfp, &sfp->pctl); in jh7110_pinctrl_probe()
931 sfp->gc.label = dev_name(dev); in jh7110_pinctrl_probe()
932 sfp->gc.owner = THIS_MODULE; in jh7110_pinctrl_probe()
933 sfp->gc.request = pinctrl_gpio_request; in jh7110_pinctrl_probe()
934 sfp->gc.free = pinctrl_gpio_free; in jh7110_pinctrl_probe()
935 sfp->gc.get_direction = jh7110_gpio_get_direction; in jh7110_pinctrl_probe()
936 sfp->gc.direction_input = jh7110_gpio_direction_input; in jh7110_pinctrl_probe()
937 sfp->gc.direction_output = jh7110_gpio_direction_output; in jh7110_pinctrl_probe()
938 sfp->gc.get = jh7110_gpio_get; in jh7110_pinctrl_probe()
939 sfp->gc.set = jh7110_gpio_set; in jh7110_pinctrl_probe()
940 sfp->gc.set_config = jh7110_gpio_set_config; in jh7110_pinctrl_probe()
941 sfp->gc.add_pin_ranges = jh7110_gpio_add_pin_ranges; in jh7110_pinctrl_probe()
942 sfp->gc.base = info->gc_base; in jh7110_pinctrl_probe()
943 sfp->gc.ngpio = info->ngpios; in jh7110_pinctrl_probe()
945 jh7110_irq_chip.name = sfp->gc.label; in jh7110_pinctrl_probe()
946 gpio_irq_chip_set_chip(&sfp->gc.irq, &jh7110_irq_chip); in jh7110_pinctrl_probe()
947 sfp->gc.irq.parent_handler = info->jh7110_gpio_irq_handler; in jh7110_pinctrl_probe()
948 sfp->gc.irq.num_parents = 1; in jh7110_pinctrl_probe()
949 sfp->gc.irq.parents = devm_kcalloc(dev, sfp->gc.irq.num_parents, in jh7110_pinctrl_probe()
950 sizeof(*sfp->gc.irq.parents), in jh7110_pinctrl_probe()
952 if (!sfp->gc.irq.parents) in jh7110_pinctrl_probe()
954 sfp->gc.irq.default_type = IRQ_TYPE_NONE; in jh7110_pinctrl_probe()
955 sfp->gc.irq.handler = handle_bad_irq; in jh7110_pinctrl_probe()
956 sfp->gc.irq.init_hw = info->jh7110_gpio_init_hw; in jh7110_pinctrl_probe()
961 sfp->gc.irq.parents[0] = ret; in jh7110_pinctrl_probe()
963 ret = devm_gpiochip_add_data(dev, &sfp->gc, sfp); in jh7110_pinctrl_probe()
967 dev_info(dev, "StarFive GPIO chip registered %d GPIOs\n", sfp->gc.ngpio); in jh7110_pinctrl_probe()
969 return pinctrl_enable(sfp->pctl); in jh7110_pinctrl_probe()
975 struct jh7110_pinctrl *sfp = dev_get_drvdata(dev); in jh7110_pinctrl_suspend() local
979 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_pinctrl_suspend()
980 for (i = 0 ; i < sfp->info->nsaved_regs ; i++) in jh7110_pinctrl_suspend()
981 sfp->saved_regs[i] = readl_relaxed(sfp->base + 4 * i); in jh7110_pinctrl_suspend()
983 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_pinctrl_suspend()
989 struct jh7110_pinctrl *sfp = dev_get_drvdata(dev); in jh7110_pinctrl_resume() local
993 raw_spin_lock_irqsave(&sfp->lock, flags); in jh7110_pinctrl_resume()
994 for (i = 0 ; i < sfp->info->nsaved_regs ; i++) in jh7110_pinctrl_resume()
995 writel_relaxed(sfp->saved_regs[i], sfp->base + 4 * i); in jh7110_pinctrl_resume()
997 raw_spin_unlock_irqrestore(&sfp->lock, flags); in jh7110_pinctrl_resume()