Lines Matching +full:controller +full:- +full:specific

1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25 * enum pincfg_type - possible pin configuration types supported.
46 * packed together into a 16-bits. The upper 8-bits represent the configuration
47 * type and the lower 8-bits hold the value of the configuration type.
65 * enum eint_type - possible external interrupt types.
71 * Samsung GPIO controller groups all the available pins into banks. The pins
85 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
116 * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
118 * @pctl_offset: starting offset of the pin-bank registers.
119 * @pctl_res_idx: index of base address for pin-bank registers.
124 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
125 * @eint_con_offset: ExynosAuto SoC-specific EINT control register offset of bank.
126 * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank.
127 * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank.
146 * struct samsung_pin_bank: represent a controller pin-bank.
148 * @pctl_base: base address of the pin-bank registers
149 * @pctl_offset: starting offset of the pin-bank registers.
151 * @eint_base: base address of the pin-bank EINT registers.
155 * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
156 * @eint_con_offset: ExynosAuto SoC-specific EINT register or interrupt offset of bank.
157 * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank.
158 * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank.
162 * @soc_priv: per-bank private data for SoC-specific code.
164 * @drvdata: link to controller driver data
202 * struct samsung_retention_data: runtime pin-bank retention control data.
208 * @enable: platform specific callback to enter retention mode.
209 * @disable: platform specific callback to exit retention mode.
222 * struct samsung_retention_data: represent a pin-bank retention control data.
227 * @init: platform specific callback to initialize retention control.
239 * struct samsung_pin_ctrl: represent a pin controller.
240 * @pin_banks: list of pin banks included in this controller.
244 * @eint_gpio_init: platform specific callback to setup the external gpio
245 * interrupts for the controller.
246 * @eint_wkup_init: platform specific callback to setup the external wakeup
247 * interrupts for the controller.
248 * @suspend: platform specific suspend callback, executed during pin controller
250 * @resume: platform specific resume callback, executed during pin controller
271 * @virt_base: register base address of the controller; this will be equal
272 * to each bank samsung_pin_bank->pctl_base and used on legacy
275 * @dev: device instance representing the controller.
276 * @irq: interrpt number used by the controller to notify gpio interrupts.
277 * @ctrl: pin controller instance managed by the driver.
278 * @pctl: pin controller descriptor registered with the pinctrl subsystem.
284 * @nr_pins: number of pins supported by the controller.
286 * @suspend: platform specific suspend callback, executed during pin controller
288 * @resume: platform specific resume callback, executed during pin controller
316 * struct samsung_pinctrl_of_match_data: OF match device specific configuration data.
317 * @ctrl: array of pin controller data.
352 /* list of all exported SoC specific data */