Lines Matching +full:latched +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0-only
27 #include <linux/pinctrl/pinconf-generic.h>
63 #define CY8C95X0_MUX_REGMAP_TO_OFFSET(x, p) ((x) - CY8C95X0_INTMASK + (p) * MUXED_STRIDE)
86 { "irq-gpios", &cy8c95x0_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
98 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in cy8c95x0_acpi_get_irq()
111 * Since first controller (gpio-sch.c) and second
112 * (gpio-dwapb.c) are at the fixed bases, we may safely
130 * struct cy8c95x0_pinctrl - driver data
456 mutex_lock(&chip->i2c_lock); in cy8c95x0_mux_reg_read()
458 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_mux_reg_read()
466 ret = regmap_read(chip->regmap, reg, val); in cy8c95x0_mux_reg_read()
468 mutex_unlock(&chip->i2c_lock); in cy8c95x0_mux_reg_read()
480 mutex_lock(&chip->i2c_lock); in cy8c95x0_mux_reg_write()
482 ret = regmap_write(chip->regmap, CY8C95X0_PORTSEL, port); in cy8c95x0_mux_reg_write()
490 ret = regmap_write(chip->regmap, reg, val); in cy8c95x0_mux_reg_write()
492 mutex_unlock(&chip->i2c_lock); in cy8c95x0_mux_reg_write()
504 if (port >= chip->nport) in cy8c95x0_mux_accessible_register()
515 /* Regmap for muxed registers CY8C95X0_INTMASK - CY8C95X0_DRV_HIZ */
560 return -EINVAL; in cy8c95x0_regmap_update_bits_base()
564 regmap = chip->muxed_regmap; in cy8c95x0_regmap_update_bits_base()
567 regmap = chip->regmap; in cy8c95x0_regmap_update_bits_base()
603 * cy8c95x0_regmap_write_bits() - writes a register using the regmap cache
627 * cy8c95x0_regmap_update_bits() - updates a register using the regmap cache
651 * cy8c95x0_regmap_read() - reads a register using the regmap cache
674 regmap = chip->muxed_regmap; in cy8c95x0_regmap_read()
677 regmap = chip->regmap; in cy8c95x0_regmap_read()
699 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
701 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
703 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
705 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
707 for (i = 0; i < chip->nport; i++) { in cy8c95x0_write_regs_mask()
722 dev_err(chip->dev, "failed writing register %d, port %d: err %d\n", reg, i, ret); in cy8c95x0_write_regs_mask()
739 bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
741 bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
743 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
745 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
747 for (i = 0; i < chip->nport; i++) { in cy8c95x0_read_regs_mask()
764 bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
768 dev_err(chip->dev, "failed reading register %d, port %d: err %d\n", reg, i, ret); in cy8c95x0_read_regs_mask()
905 ret = -ENOTSUPP; in cy8c95x0_gpio_get_pincfg()
939 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
943 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
947 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
951 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
955 __clear_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
959 __set_bit(off, chip->push_pull); in cy8c95x0_gpio_set_pincfg()
972 ret = -ENOTSUPP; in cy8c95x0_gpio_set_pincfg()
1003 struct device *dev = chip->dev; in cy8c95x0_add_pin_ranges()
1006 ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, 0, chip->tpin); in cy8c95x0_add_pin_ranges()
1015 struct gpio_chip *gc = &chip->gpio_chip; in cy8c95x0_setup_gpiochip()
1017 gc->request = gpiochip_generic_request; in cy8c95x0_setup_gpiochip()
1018 gc->free = gpiochip_generic_free; in cy8c95x0_setup_gpiochip()
1019 gc->direction_input = cy8c95x0_gpio_direction_input; in cy8c95x0_setup_gpiochip()
1020 gc->direction_output = cy8c95x0_gpio_direction_output; in cy8c95x0_setup_gpiochip()
1021 gc->get = cy8c95x0_gpio_get_value; in cy8c95x0_setup_gpiochip()
1022 gc->set = cy8c95x0_gpio_set_value; in cy8c95x0_setup_gpiochip()
1023 gc->get_direction = cy8c95x0_gpio_get_direction; in cy8c95x0_setup_gpiochip()
1024 gc->get_multiple = cy8c95x0_gpio_get_multiple; in cy8c95x0_setup_gpiochip()
1025 gc->set_multiple = cy8c95x0_gpio_set_multiple; in cy8c95x0_setup_gpiochip()
1026 gc->set_config = gpiochip_generic_config; in cy8c95x0_setup_gpiochip()
1027 gc->can_sleep = true; in cy8c95x0_setup_gpiochip()
1028 gc->add_pin_ranges = cy8c95x0_add_pin_ranges; in cy8c95x0_setup_gpiochip()
1030 gc->base = -1; in cy8c95x0_setup_gpiochip()
1031 gc->ngpio = chip->tpin; in cy8c95x0_setup_gpiochip()
1033 gc->parent = chip->dev; in cy8c95x0_setup_gpiochip()
1034 gc->owner = THIS_MODULE; in cy8c95x0_setup_gpiochip()
1035 gc->names = NULL; in cy8c95x0_setup_gpiochip()
1037 gc->label = dev_name(chip->dev); in cy8c95x0_setup_gpiochip()
1039 return devm_gpiochip_add_data(chip->dev, gc, chip); in cy8c95x0_setup_gpiochip()
1048 set_bit(hwirq, chip->irq_mask); in cy8c95x0_irq_mask()
1059 clear_bit(hwirq, chip->irq_mask); in cy8c95x0_irq_unmask()
1067 mutex_lock(&chip->irq_lock); in cy8c95x0_irq_bus_lock()
1080 cy8c95x0_write_regs_mask(chip, CY8C95X0_INTMASK, chip->irq_mask, ones); in cy8c95x0_irq_bus_sync_unlock()
1083 cy8c95x0_read_regs_mask(chip, CY8C95X0_DIRECTION, reg_direction, chip->irq_mask); in cy8c95x0_irq_bus_sync_unlock()
1084 bitmap_or(irq_mask, chip->irq_mask, reg_direction, MAX_LINE); in cy8c95x0_irq_bus_sync_unlock()
1090 mutex_unlock(&chip->irq_lock); in cy8c95x0_irq_bus_sync_unlock()
1113 dev_err(chip->dev, "irq %d: unsupported type %d\n", d->irq, type); in cy8c95x0_irq_set_type()
1114 return -EINVAL; in cy8c95x0_irq_set_type()
1117 assign_bit(hwirq, chip->irq_trig_fall, trig_type & IRQ_TYPE_EDGE_FALLING); in cy8c95x0_irq_set_type()
1118 assign_bit(hwirq, chip->irq_trig_raise, trig_type & IRQ_TYPE_EDGE_RISING); in cy8c95x0_irq_set_type()
1119 assign_bit(hwirq, chip->irq_trig_low, type == IRQ_TYPE_LEVEL_LOW); in cy8c95x0_irq_set_type()
1120 assign_bit(hwirq, chip->irq_trig_high, type == IRQ_TYPE_LEVEL_HIGH); in cy8c95x0_irq_set_type()
1131 clear_bit(hwirq, chip->irq_trig_raise); in cy8c95x0_irq_shutdown()
1132 clear_bit(hwirq, chip->irq_trig_fall); in cy8c95x0_irq_shutdown()
1133 clear_bit(hwirq, chip->irq_trig_low); in cy8c95x0_irq_shutdown()
1134 clear_bit(hwirq, chip->irq_trig_high); in cy8c95x0_irq_shutdown()
1138 .name = "cy8c95x0-irq",
1162 /* Check latched inputs */ in cy8c95x0_irq_pending()
1167 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, in cy8c95x0_irq_pending()
1178 struct gpio_chip *gc = &chip->gpio_chip; in cy8c95x0_irq_handler()
1190 nested_irq = irq_find_mapping(gc->irq.domain, level); in cy8c95x0_irq_handler()
1193 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level); in cy8c95x0_irq_handler()
1197 if (test_bit(level, chip->irq_trig_low)) in cy8c95x0_irq_handler()
1200 else if (test_bit(level, chip->irq_trig_high)) in cy8c95x0_irq_handler()
1216 return chip->tpin; in cy8c95x0_pinctrl_get_groups_count()
1289 *num_groups = chip->tpin; in cy8c95x0_get_function_groups()
1353 * the direction register isn't sufficient in Push-Pull mode. in cy8c95x0_pinmux_direction()
1355 if (input && test_bit(pin, chip->push_pull)) { in cy8c95x0_pinmux_direction()
1360 __clear_bit(pin, chip->push_pull); in cy8c95x0_pinmux_direction()
1417 struct gpio_irq_chip *girq = &chip->gpio_chip.irq; in cy8c95x0_irq_setup()
1421 mutex_init(&chip->irq_lock); in cy8c95x0_irq_setup()
1428 dev_err(chip->dev, "failed to clear irq status register\n"); in cy8c95x0_irq_setup()
1433 bitmap_fill(chip->irq_mask, MAX_LINE); in cy8c95x0_irq_setup()
1438 girq->parent_handler = NULL; in cy8c95x0_irq_setup()
1439 girq->num_parents = 0; in cy8c95x0_irq_setup()
1440 girq->parents = NULL; in cy8c95x0_irq_setup()
1441 girq->default_type = IRQ_TYPE_NONE; in cy8c95x0_irq_setup()
1442 girq->handler = handle_simple_irq; in cy8c95x0_irq_setup()
1443 girq->threaded = true; in cy8c95x0_irq_setup()
1445 ret = devm_request_threaded_irq(chip->dev, irq, in cy8c95x0_irq_setup()
1448 dev_name(chip->dev), chip); in cy8c95x0_irq_setup()
1450 dev_err(chip->dev, "failed to request irq %d\n", irq); in cy8c95x0_irq_setup()
1453 dev_info(chip->dev, "Registered threaded IRQ\n"); in cy8c95x0_irq_setup()
1460 struct pinctrl_desc *pd = &chip->pinctrl_desc; in cy8c95x0_setup_pinctrl()
1462 pd->pctlops = &cy8c95x0_pinctrl_ops; in cy8c95x0_setup_pinctrl()
1463 pd->confops = &cy8c95x0_pinconf_ops; in cy8c95x0_setup_pinctrl()
1464 pd->pmxops = &cy8c95x0_pmxops; in cy8c95x0_setup_pinctrl()
1465 pd->name = dev_name(chip->dev); in cy8c95x0_setup_pinctrl()
1466 pd->pins = cy8c9560_pins; in cy8c95x0_setup_pinctrl()
1467 pd->npins = chip->tpin; in cy8c95x0_setup_pinctrl()
1468 pd->owner = THIS_MODULE; in cy8c95x0_setup_pinctrl()
1470 chip->pctldev = devm_pinctrl_register(chip->dev, pd, chip); in cy8c95x0_setup_pinctrl()
1471 if (IS_ERR(chip->pctldev)) in cy8c95x0_setup_pinctrl()
1472 return dev_err_probe(chip->dev, PTR_ERR(chip->pctldev), in cy8c95x0_setup_pinctrl()
1481 struct i2c_adapter *adapter = client->adapter; in cy8c95x0_detect()
1486 return -ENODEV; in cy8c95x0_detect()
1502 return -ENODEV; in cy8c95x0_detect()
1505 dev_info(&client->dev, "Found a %s chip at 0x%02x.\n", name, client->addr); in cy8c95x0_detect()
1506 strscpy(info->type, name, I2C_NAME_SIZE); in cy8c95x0_detect()
1517 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); in cy8c95x0_probe()
1519 return -ENOMEM; in cy8c95x0_probe()
1521 chip->dev = &client->dev; in cy8c95x0_probe()
1524 chip->driver_data = (uintptr_t)i2c_get_match_data(client); in cy8c95x0_probe()
1525 if (!chip->driver_data) in cy8c95x0_probe()
1526 return -ENODEV; in cy8c95x0_probe()
1530 chip->tpin = chip->driver_data & CY8C95X0_GPIO_MASK; in cy8c95x0_probe()
1531 chip->nport = DIV_ROUND_UP(CY8C95X0_PIN_TO_OFFSET(chip->tpin), BANK_SZ); in cy8c95x0_probe()
1533 switch (chip->tpin) { in cy8c95x0_probe()
1535 strscpy(chip->name, cy8c95x0_id[0].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1538 strscpy(chip->name, cy8c95x0_id[1].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1541 strscpy(chip->name, cy8c95x0_id[2].name, I2C_NAME_SIZE); in cy8c95x0_probe()
1544 return -ENODEV; in cy8c95x0_probe()
1547 reg = devm_regulator_get(&client->dev, "vdd"); in cy8c95x0_probe()
1549 if (PTR_ERR(reg) == -EPROBE_DEFER) in cy8c95x0_probe()
1550 return -EPROBE_DEFER; in cy8c95x0_probe()
1554 dev_err(&client->dev, "failed to enable regulator vdd: %d\n", ret); in cy8c95x0_probe()
1557 chip->regulator = reg; in cy8c95x0_probe()
1561 chip->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH); in cy8c95x0_probe()
1562 if (IS_ERR(chip->gpio_reset)) { in cy8c95x0_probe()
1563 ret = dev_err_probe(chip->dev, PTR_ERR(chip->gpio_reset), in cy8c95x0_probe()
1566 } else if (chip->gpio_reset) { in cy8c95x0_probe()
1568 gpiod_set_value_cansleep(chip->gpio_reset, 0); in cy8c95x0_probe()
1571 gpiod_set_consumer_name(chip->gpio_reset, "CY8C95X0 RESET"); in cy8c95x0_probe()
1575 chip->regmap = devm_regmap_init_i2c(client, &cy8c95x0_i2c_regmap); in cy8c95x0_probe()
1576 if (IS_ERR(chip->regmap)) { in cy8c95x0_probe()
1577 ret = PTR_ERR(chip->regmap); in cy8c95x0_probe()
1582 chip->muxed_regmap = devm_regmap_init(&client->dev, &cy8c95x0_regmap_bus, in cy8c95x0_probe()
1584 if (IS_ERR(chip->muxed_regmap)) { in cy8c95x0_probe()
1585 ret = dev_err_probe(&client->dev, PTR_ERR(chip->muxed_regmap), in cy8c95x0_probe()
1590 bitmap_zero(chip->push_pull, MAX_LINE); in cy8c95x0_probe()
1591 bitmap_zero(chip->shiftmask, MAX_LINE); in cy8c95x0_probe()
1592 bitmap_set(chip->shiftmask, 0, 20); in cy8c95x0_probe()
1593 mutex_init(&chip->i2c_lock); in cy8c95x0_probe()
1596 ret = cy8c95x0_acpi_get_irq(&client->dev); in cy8c95x0_probe()
1598 client->irq = ret; in cy8c95x0_probe()
1601 if (client->irq) { in cy8c95x0_probe()
1602 ret = cy8c95x0_irq_setup(chip, client->irq); in cy8c95x0_probe()
1618 if (!IS_ERR_OR_NULL(chip->regulator)) in cy8c95x0_probe()
1619 regulator_disable(chip->regulator); in cy8c95x0_probe()
1627 if (!IS_ERR_OR_NULL(chip->regulator)) in cy8c95x0_remove()
1628 regulator_disable(chip->regulator); in cy8c95x0_remove()
1639 .name = "cy8c95x0-pinctrl",