Lines Matching full:using

22 	  allows configuring of SoC pins and using them as GPIOs.
30 	  using them as GPIOs.
46 	  of Intel PCH pins and using them as GPIOs. Currently the following
55 	  of Intel Alder Lake PCH pins and using them as GPIOs.
62 	  configuring of SoC pins and using them as GPIOs.
69 	  of Intel Cannon Lake PCH pins and using them as GPIOs.
76 	  of Intel Cedar Fork PCH pins and using them as GPIOs.
83 	  of Intel Denverton SoC pins and using them as GPIOs.
90 	  of Intel Elkhart Lake SoC pins and using them as GPIOs.
97 	  of Intel Emmitsburg pins and using them as GPIOs.
104 	  of Intel Gemini Lake SoC pins and using them as GPIOs.
111 	  of Intel Ice Lake PCH pins and using them as GPIOs.
118 	  of Intel Jasper Lake PCH pins and using them as GPIOs.
125 	  of Intel Lakefield SoC pins and using them as GPIOs.
132 	  of Intel Lewisburg pins and using them as GPIOs.
139 	  of Intel Meteor Lake pins and using them as GPIOs.
148 	  using them as GPIOs.
156 	  using them as GPIOs.
163 	  of Intel Tiger Lake PCH pins and using them as GPIOs.