Lines Matching +full:x1e80100 +full:- +full:gcc
1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
24 #include <drm/bridge/aux-bridge.h>
26 #include <dt-bindings/phy/phy-qcom-qmp.h>
28 #include "phy-qcom-qmp.h"
29 #include "phy-qcom-qmp-pcs-misc-v3.h"
30 #include "phy-qcom-qmp-pcs-usb-v4.h"
31 #include "phy-qcom-qmp-pcs-usb-v5.h"
32 #include "phy-qcom-qmp-pcs-usb-v6.h"
99 /* set of registers with offsets different per-PHY */
1334 { .name = "vdda-phy", .enable_load = 21800 },
1335 { .name = "vdda-pll", .enable_load = 36000 },
1443 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
2046 if (!(t->lane_mask & lane_mask)) in qmp_combo_configure_lane()
2049 writel(t->val, base + t->offset); in qmp_combo_configure_lane()
2062 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_serdes_init()
2063 void __iomem *serdes = qmp->dp_serdes; in qmp_combo_dp_serdes_init()
2064 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_dp_serdes_init()
2066 qmp_combo_configure(serdes, cfg->dp_serdes_tbl, cfg->dp_serdes_tbl_num); in qmp_combo_dp_serdes_init()
2068 switch (dp_opts->link_rate) { in qmp_combo_dp_serdes_init()
2070 qmp_combo_configure(serdes, cfg->serdes_tbl_rbr, in qmp_combo_dp_serdes_init()
2071 cfg->serdes_tbl_rbr_num); in qmp_combo_dp_serdes_init()
2074 qmp_combo_configure(serdes, cfg->serdes_tbl_hbr, in qmp_combo_dp_serdes_init()
2075 cfg->serdes_tbl_hbr_num); in qmp_combo_dp_serdes_init()
2078 qmp_combo_configure(serdes, cfg->serdes_tbl_hbr2, in qmp_combo_dp_serdes_init()
2079 cfg->serdes_tbl_hbr2_num); in qmp_combo_dp_serdes_init()
2082 qmp_combo_configure(serdes, cfg->serdes_tbl_hbr3, in qmp_combo_dp_serdes_init()
2083 cfg->serdes_tbl_hbr3_num); in qmp_combo_dp_serdes_init()
2087 return -EINVAL; in qmp_combo_dp_serdes_init()
2095 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v3_dp_aux_init()
2099 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v3_dp_aux_init()
2104 qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); in qmp_v3_dp_aux_init()
2106 writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v3_dp_aux_init()
2112 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v3_dp_aux_init()
2118 qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); in qmp_v3_dp_aux_init()
2120 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); in qmp_v3_dp_aux_init()
2121 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v3_dp_aux_init()
2122 writel(0x24, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v3_dp_aux_init()
2123 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); in qmp_v3_dp_aux_init()
2124 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); in qmp_v3_dp_aux_init()
2125 writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); in qmp_v3_dp_aux_init()
2126 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); in qmp_v3_dp_aux_init()
2127 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); in qmp_v3_dp_aux_init()
2128 writel(0xbb, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); in qmp_v3_dp_aux_init()
2129 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); in qmp_v3_dp_aux_init()
2130 qmp->dp_aux_cfg = 0; in qmp_v3_dp_aux_init()
2135 qmp->dp_dp_phy + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); in qmp_v3_dp_aux_init()
2140 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_configure_dp_swing()
2141 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_configure_dp_swing()
2146 for (i = 0; i < dp_opts->lanes; i++) { in qmp_combo_configure_dp_swing()
2147 v_level = max(v_level, dp_opts->voltage[i]); in qmp_combo_configure_dp_swing()
2148 p_level = max(p_level, dp_opts->pre[i]); in qmp_combo_configure_dp_swing()
2151 if (dp_opts->link_rate <= 2700) { in qmp_combo_configure_dp_swing()
2152 voltage_swing_cfg = (*cfg->swing_hbr_rbr)[v_level][p_level]; in qmp_combo_configure_dp_swing()
2153 pre_emphasis_cfg = (*cfg->pre_emphasis_hbr_rbr)[v_level][p_level]; in qmp_combo_configure_dp_swing()
2155 voltage_swing_cfg = (*cfg->swing_hbr3_hbr2)[v_level][p_level]; in qmp_combo_configure_dp_swing()
2156 pre_emphasis_cfg = (*cfg->pre_emphasis_hbr3_hbr2)[v_level][p_level]; in qmp_combo_configure_dp_swing()
2161 return -EINVAL; in qmp_combo_configure_dp_swing()
2167 writel(voltage_swing_cfg, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_combo_configure_dp_swing()
2168 writel(pre_emphasis_cfg, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_combo_configure_dp_swing()
2169 writel(voltage_swing_cfg, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_combo_configure_dp_swing()
2170 writel(pre_emphasis_cfg, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_combo_configure_dp_swing()
2177 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_v3_configure_dp_tx()
2183 if (dp_opts->lanes == 1) { in qmp_v3_configure_dp_tx()
2191 writel(drvr_en, qmp->dp_tx + QSERDES_V3_TX_HIGHZ_DRVR_EN); in qmp_v3_configure_dp_tx()
2192 writel(bias_en, qmp->dp_tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); in qmp_v3_configure_dp_tx()
2193 writel(drvr_en, qmp->dp_tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN); in qmp_v3_configure_dp_tx()
2194 writel(bias_en, qmp->dp_tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN); in qmp_v3_configure_dp_tx()
2199 bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); in qmp_combo_configure_dp_mode()
2200 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_configure_dp_mode()
2206 if (dp_opts->lanes == 4 || reverse) in qmp_combo_configure_dp_mode()
2208 if (dp_opts->lanes == 4 || !reverse) in qmp_combo_configure_dp_mode()
2211 writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_combo_configure_dp_mode()
2214 writel(0x4c, qmp->pcs + QSERDES_DP_PHY_MODE); in qmp_combo_configure_dp_mode()
2216 writel(0x5c, qmp->pcs + QSERDES_DP_PHY_MODE); in qmp_combo_configure_dp_mode()
2223 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_combo_configure_dp_clocks()
2227 switch (dp_opts->link_rate) { in qmp_combo_configure_dp_clocks()
2246 return -EINVAL; in qmp_combo_configure_dp_clocks()
2248 writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_VCO_DIV); in qmp_combo_configure_dp_clocks()
2250 clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000); in qmp_combo_configure_dp_clocks()
2251 clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq); in qmp_combo_configure_dp_clocks()
2258 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v3_configure_dp_phy()
2264 writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); in qmp_v3_configure_dp_phy()
2265 writel(0x05, qmp->dp_dp_phy + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); in qmp_v3_configure_dp_phy()
2271 writel(0x04, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v3_configure_dp_phy()
2272 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2273 writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2274 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2275 writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2277 writel(0x20, qmp->dp_serdes + cfg->regs[QPHY_COM_RESETSM_CNTRL]); in qmp_v3_configure_dp_phy()
2279 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_C_READY_STATUS], in qmp_v3_configure_dp_phy()
2284 return -ETIMEDOUT; in qmp_v3_configure_dp_phy()
2286 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2288 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v3_configure_dp_phy()
2293 return -ETIMEDOUT; in qmp_v3_configure_dp_phy()
2295 writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2297 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v3_configure_dp_phy()
2299 return readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v3_configure_dp_phy()
2315 qmp->dp_aux_cfg++; in qmp_v3_calibrate_dp_phy()
2316 qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); in qmp_v3_calibrate_dp_phy()
2317 val = cfg1_settings[qmp->dp_aux_cfg]; in qmp_v3_calibrate_dp_phy()
2319 writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v3_calibrate_dp_phy()
2326 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v4_dp_aux_init()
2330 qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_v4_dp_aux_init()
2333 writel(0x17, qmp->dp_serdes + cfg->regs[QPHY_COM_BIAS_EN_CLKBUFLR_EN]); in qmp_v4_dp_aux_init()
2335 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG0); in qmp_v4_dp_aux_init()
2336 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v4_dp_aux_init()
2337 writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v4_dp_aux_init()
2338 writel(0x00, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG3); in qmp_v4_dp_aux_init()
2339 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG4); in qmp_v4_dp_aux_init()
2340 writel(0x26, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG5); in qmp_v4_dp_aux_init()
2341 writel(0x0a, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG6); in qmp_v4_dp_aux_init()
2342 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG7); in qmp_v4_dp_aux_init()
2343 writel(0xb7, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG8); in qmp_v4_dp_aux_init()
2344 writel(0x03, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG9); in qmp_v4_dp_aux_init()
2345 qmp->dp_aux_cfg = 0; in qmp_v4_dp_aux_init()
2350 qmp->dp_dp_phy + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); in qmp_v4_dp_aux_init()
2355 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v4_configure_dp_tx()
2358 writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_tx()
2359 writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_tx()
2361 writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_tx()
2362 writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_tx()
2369 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v456_configure_dp_phy()
2373 writel(0x0f, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_CFG_1); in qmp_v456_configure_dp_phy()
2377 writel(0x13, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v456_configure_dp_phy()
2378 writel(0xa4, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG2); in qmp_v456_configure_dp_phy()
2380 writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); in qmp_v456_configure_dp_phy()
2381 writel(0x05, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); in qmp_v456_configure_dp_phy()
2387 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2388 writel(0x05, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2389 writel(0x01, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2390 writel(0x09, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2392 writel(0x20, qmp->dp_serdes + cfg->regs[QPHY_COM_RESETSM_CNTRL]); in qmp_v456_configure_dp_phy()
2394 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_C_READY_STATUS], in qmp_v456_configure_dp_phy()
2399 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2401 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS], in qmp_v456_configure_dp_phy()
2406 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2408 if (readl_poll_timeout(qmp->dp_serdes + cfg->regs[QPHY_COM_CMN_STATUS], in qmp_v456_configure_dp_phy()
2413 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2415 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v456_configure_dp_phy()
2417 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v456_configure_dp_phy()
2422 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2424 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v456_configure_dp_phy()
2429 return -ETIMEDOUT; in qmp_v456_configure_dp_phy()
2436 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_v4_configure_dp_phy()
2437 bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); in qmp_v4_configure_dp_phy()
2438 const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; in qmp_v4_configure_dp_phy()
2452 if (dp_opts->lanes == 1) { in qmp_v4_configure_dp_phy()
2457 } else if (dp_opts->lanes == 2) { in qmp_v4_configure_dp_phy()
2469 writel(drvr0_en, qmp->dp_tx + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); in qmp_v4_configure_dp_phy()
2470 writel(bias0_en, qmp->dp_tx + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); in qmp_v4_configure_dp_phy()
2471 writel(drvr1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_HIGHZ_DRVR_EN]); in qmp_v4_configure_dp_phy()
2472 writel(bias1_en, qmp->dp_tx2 + cfg->regs[QPHY_TX_TRANSCEIVER_BIAS_EN]); in qmp_v4_configure_dp_phy()
2474 writel(0x18, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v4_configure_dp_phy()
2476 writel(0x19, qmp->dp_dp_phy + QSERDES_DP_PHY_CFG); in qmp_v4_configure_dp_phy()
2478 if (readl_poll_timeout(qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_STATUS], in qmp_v4_configure_dp_phy()
2483 return -ETIMEDOUT; in qmp_v4_configure_dp_phy()
2485 writel(0x0a, qmp->dp_tx + cfg->regs[QPHY_TX_TX_POL_INV]); in qmp_v4_configure_dp_phy()
2486 writel(0x0a, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_POL_INV]); in qmp_v4_configure_dp_phy()
2488 writel(0x27, qmp->dp_tx + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_phy()
2489 writel(0x27, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_DRV_LVL]); in qmp_v4_configure_dp_phy()
2491 writel(0x20, qmp->dp_tx + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_phy()
2492 writel(0x20, qmp->dp_tx2 + cfg->regs[QPHY_TX_TX_EMP_POST1_LVL]); in qmp_v4_configure_dp_phy()
2508 qmp->dp_aux_cfg++; in qmp_v4_calibrate_dp_phy()
2509 qmp->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings); in qmp_v4_calibrate_dp_phy()
2510 val = cfg1_settings[qmp->dp_aux_cfg]; in qmp_v4_calibrate_dp_phy()
2512 writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_AUX_CFG1); in qmp_v4_calibrate_dp_phy()
2519 const struct phy_configure_opts_dp *dp_opts = &opts->dp; in qmp_combo_dp_configure()
2521 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_configure()
2523 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_configure()
2525 memcpy(&qmp->dp_opts, dp_opts, sizeof(*dp_opts)); in qmp_combo_dp_configure()
2526 if (qmp->dp_opts.set_voltages) { in qmp_combo_dp_configure()
2527 cfg->configure_dp_tx(qmp); in qmp_combo_dp_configure()
2528 qmp->dp_opts.set_voltages = 0; in qmp_combo_dp_configure()
2531 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_configure()
2539 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_calibrate()
2542 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_calibrate()
2544 if (cfg->calibrate_dp_phy) in qmp_combo_dp_calibrate()
2545 ret = cfg->calibrate_dp_phy(qmp); in qmp_combo_dp_calibrate()
2547 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_calibrate()
2554 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_com_init()
2555 void __iomem *com = qmp->com; in qmp_combo_com_init()
2559 if (!force && qmp->init_count++) in qmp_combo_com_init()
2562 ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); in qmp_combo_com_init()
2564 dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); in qmp_combo_com_init()
2568 ret = reset_control_bulk_assert(cfg->num_resets, qmp->resets); in qmp_combo_com_init()
2570 dev_err(qmp->dev, "reset assert failed\n"); in qmp_combo_com_init()
2574 ret = reset_control_bulk_deassert(cfg->num_resets, qmp->resets); in qmp_combo_com_init()
2576 dev_err(qmp->dev, "reset deassert failed\n"); in qmp_combo_com_init()
2580 ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); in qmp_combo_com_init()
2593 if (qmp->orientation == TYPEC_ORIENTATION_REVERSE) in qmp_combo_com_init()
2606 qphy_setbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], in qmp_combo_com_init()
2612 reset_control_bulk_assert(cfg->num_resets, qmp->resets); in qmp_combo_com_init()
2614 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); in qmp_combo_com_init()
2616 qmp->init_count--; in qmp_combo_com_init()
2623 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_com_exit()
2625 if (!force && --qmp->init_count) in qmp_combo_com_exit()
2628 reset_control_bulk_assert(cfg->num_resets, qmp->resets); in qmp_combo_com_exit()
2630 clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); in qmp_combo_com_exit()
2632 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); in qmp_combo_com_exit()
2640 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_init()
2643 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_init()
2649 cfg->dp_aux_init(qmp); in qmp_combo_dp_init()
2651 qmp->dp_init_count++; in qmp_combo_dp_init()
2654 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_init()
2662 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_exit()
2666 qmp->dp_init_count--; in qmp_combo_dp_exit()
2668 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_exit()
2676 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_dp_power_on()
2677 void __iomem *tx = qmp->dp_tx; in qmp_combo_dp_power_on()
2678 void __iomem *tx2 = qmp->dp_tx2; in qmp_combo_dp_power_on()
2680 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_power_on()
2684 qmp_combo_configure_lane(tx, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 1); in qmp_combo_dp_power_on()
2685 qmp_combo_configure_lane(tx2, cfg->dp_tx_tbl, cfg->dp_tx_tbl_num, 2); in qmp_combo_dp_power_on()
2688 cfg->configure_dp_tx(qmp); in qmp_combo_dp_power_on()
2691 cfg->configure_dp_phy(qmp); in qmp_combo_dp_power_on()
2693 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_power_on()
2702 mutex_lock(&qmp->phy_mutex); in qmp_combo_dp_power_off()
2705 writel(DP_PHY_PD_CTL_PSR_PWRDN, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL); in qmp_combo_dp_power_off()
2707 mutex_unlock(&qmp->phy_mutex); in qmp_combo_dp_power_off()
2715 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_usb_power_on()
2716 void __iomem *serdes = qmp->serdes; in qmp_combo_usb_power_on()
2717 void __iomem *tx = qmp->tx; in qmp_combo_usb_power_on()
2718 void __iomem *rx = qmp->rx; in qmp_combo_usb_power_on()
2719 void __iomem *tx2 = qmp->tx2; in qmp_combo_usb_power_on()
2720 void __iomem *rx2 = qmp->rx2; in qmp_combo_usb_power_on()
2721 void __iomem *pcs = qmp->pcs; in qmp_combo_usb_power_on()
2722 void __iomem *pcs_usb = qmp->pcs_usb; in qmp_combo_usb_power_on()
2727 qmp_combo_configure(serdes, cfg->serdes_tbl, cfg->serdes_tbl_num); in qmp_combo_usb_power_on()
2729 ret = clk_prepare_enable(qmp->pipe_clk); in qmp_combo_usb_power_on()
2731 dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret); in qmp_combo_usb_power_on()
2736 qmp_combo_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1); in qmp_combo_usb_power_on()
2737 qmp_combo_configure_lane(tx2, cfg->tx_tbl, cfg->tx_tbl_num, 2); in qmp_combo_usb_power_on()
2739 qmp_combo_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1); in qmp_combo_usb_power_on()
2740 qmp_combo_configure_lane(rx2, cfg->rx_tbl, cfg->rx_tbl_num, 2); in qmp_combo_usb_power_on()
2742 qmp_combo_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num); in qmp_combo_usb_power_on()
2745 qmp_combo_configure(pcs_usb, cfg->pcs_usb_tbl, cfg->pcs_usb_tbl_num); in qmp_combo_usb_power_on()
2747 if (cfg->has_pwrdn_delay) in qmp_combo_usb_power_on()
2751 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_combo_usb_power_on()
2753 /* start SerDes and Phy-Coding-Sublayer */ in qmp_combo_usb_power_on()
2754 qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START); in qmp_combo_usb_power_on()
2756 status = pcs + cfg->regs[QPHY_PCS_STATUS]; in qmp_combo_usb_power_on()
2760 dev_err(qmp->dev, "phy initialization timed-out\n"); in qmp_combo_usb_power_on()
2767 clk_disable_unprepare(qmp->pipe_clk); in qmp_combo_usb_power_on()
2775 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_usb_power_off()
2777 clk_disable_unprepare(qmp->pipe_clk); in qmp_combo_usb_power_off()
2780 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_combo_usb_power_off()
2782 /* stop SerDes and Phy-Coding-Sublayer */ in qmp_combo_usb_power_off()
2783 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_START_CTRL], in qmp_combo_usb_power_off()
2787 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], in qmp_combo_usb_power_off()
2798 mutex_lock(&qmp->phy_mutex); in qmp_combo_usb_init()
2809 qmp->usb_init_count++; in qmp_combo_usb_init()
2812 mutex_unlock(&qmp->phy_mutex); in qmp_combo_usb_init()
2821 mutex_lock(&qmp->phy_mutex); in qmp_combo_usb_exit()
2830 qmp->usb_init_count--; in qmp_combo_usb_exit()
2833 mutex_unlock(&qmp->phy_mutex); in qmp_combo_usb_exit()
2841 qmp->mode = mode; in qmp_combo_usb_set_mode()
2865 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_enable_autonomous_mode()
2866 void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; in qmp_combo_enable_autonomous_mode()
2867 void __iomem *pcs_misc = qmp->pcs_misc; in qmp_combo_enable_autonomous_mode()
2870 if (qmp->mode == PHY_MODE_USB_HOST_SS || in qmp_combo_enable_autonomous_mode()
2871 qmp->mode == PHY_MODE_USB_DEVICE_SS) in qmp_combo_enable_autonomous_mode()
2877 qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_enable_autonomous_mode()
2879 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_enable_autonomous_mode()
2881 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], in qmp_combo_enable_autonomous_mode()
2885 qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask); in qmp_combo_enable_autonomous_mode()
2894 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_disable_autonomous_mode()
2895 void __iomem *pcs_usb = qmp->pcs_usb ?: qmp->pcs; in qmp_combo_disable_autonomous_mode()
2896 void __iomem *pcs_misc = qmp->pcs_misc; in qmp_combo_disable_autonomous_mode()
2902 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], in qmp_combo_disable_autonomous_mode()
2905 qphy_setbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_disable_autonomous_mode()
2907 qphy_clrbits(pcs_usb, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qmp_combo_disable_autonomous_mode()
2914 dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode); in qmp_combo_runtime_suspend()
2916 if (!qmp->init_count) { in qmp_combo_runtime_suspend()
2923 clk_disable_unprepare(qmp->pipe_clk); in qmp_combo_runtime_suspend()
2924 clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); in qmp_combo_runtime_suspend()
2934 dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode); in qmp_combo_runtime_resume()
2936 if (!qmp->init_count) { in qmp_combo_runtime_resume()
2941 ret = clk_bulk_prepare_enable(qmp->num_clks, qmp->clks); in qmp_combo_runtime_resume()
2945 ret = clk_prepare_enable(qmp->pipe_clk); in qmp_combo_runtime_resume()
2948 clk_bulk_disable_unprepare(qmp->num_clks, qmp->clks); in qmp_combo_runtime_resume()
2964 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_vreg_init()
2965 struct device *dev = qmp->dev; in qmp_combo_vreg_init()
2966 int num = cfg->num_vregs; in qmp_combo_vreg_init()
2969 qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL); in qmp_combo_vreg_init()
2970 if (!qmp->vregs) in qmp_combo_vreg_init()
2971 return -ENOMEM; in qmp_combo_vreg_init()
2974 qmp->vregs[i].supply = cfg->vreg_list[i].name; in qmp_combo_vreg_init()
2976 ret = devm_regulator_bulk_get(dev, num, qmp->vregs); in qmp_combo_vreg_init()
2983 ret = regulator_set_load(qmp->vregs[i].consumer, in qmp_combo_vreg_init()
2984 cfg->vreg_list[i].enable_load); in qmp_combo_vreg_init()
2987 qmp->vregs[i].supply); in qmp_combo_vreg_init()
2997 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_reset_init()
2998 struct device *dev = qmp->dev; in qmp_combo_reset_init()
3002 qmp->resets = devm_kcalloc(dev, cfg->num_resets, in qmp_combo_reset_init()
3003 sizeof(*qmp->resets), GFP_KERNEL); in qmp_combo_reset_init()
3004 if (!qmp->resets) in qmp_combo_reset_init()
3005 return -ENOMEM; in qmp_combo_reset_init()
3007 for (i = 0; i < cfg->num_resets; i++) in qmp_combo_reset_init()
3008 qmp->resets[i].id = cfg->reset_list[i]; in qmp_combo_reset_init()
3010 ret = devm_reset_control_bulk_get_exclusive(dev, cfg->num_resets, qmp->resets); in qmp_combo_reset_init()
3019 struct device *dev = qmp->dev; in qmp_combo_clk_init()
3023 qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL); in qmp_combo_clk_init()
3024 if (!qmp->clks) in qmp_combo_clk_init()
3025 return -ENOMEM; in qmp_combo_clk_init()
3028 qmp->clks[i].id = qmp_combo_phy_clk_l[i]; in qmp_combo_clk_init()
3030 qmp->num_clks = num; in qmp_combo_clk_init()
3032 return devm_clk_bulk_get_optional(dev, num, qmp->clks); in qmp_combo_clk_init()
3043 * The <s>_pipe_clksrc generated by PHY goes to the GCC that gate
3044 * controls it. The <s>_pipe_clk coming out of the GCC is requested
3046 * We register the <s>_pipe_clksrc here. The gcc driver takes care
3050 * +---------------+
3051 * | PHY block |<<---------------------------------------+
3053 * | +-------+ | +-----+ |
3054 * I/P---^-->| PLL |---^--->pipe_clksrc--->| GCC |--->pipe_clk---+
3055 * clk | +-------+ | +-----+
3056 * +---------------+
3060 struct clk_fixed_rate *fixed = &qmp->pipe_clk_fixed; in phy_pipe_clk_register()
3064 snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); in phy_pipe_clk_register()
3069 fixed->fixed_rate = 125000000; in phy_pipe_clk_register()
3070 fixed->hw.init = &init; in phy_pipe_clk_register()
3072 return devm_clk_hw_register(qmp->dev, &fixed->hw); in phy_pipe_clk_register()
3078 * +------------------------------+
3081 * | +-------------------+ |
3083 * | +---------+---------+ |
3085 * | +----------+-----------+ |
3087 * | +----------+-----------+ |
3088 * +------------------------------+
3090 * +---------<---------v------------>----------+
3092 * +--------v----------------+ |
3095 * +--------+----------------+ |
3104 * +--------<------------+-----------------+---<---+
3106 * +----v---------+ +--------v-----+ +--------v------+
3111 * +-------+------+ +-----+--------+ +--------+------+
3113 * v---->----------v-------------<------v
3115 * +----------+-----------------+
3117 * +---------+------------------+
3126 switch (req->rate) { in qmp_dp_pixel_clk_determine_rate()
3132 return -EINVAL; in qmp_dp_pixel_clk_determine_rate()
3142 dp_opts = &qmp->dp_opts; in qmp_dp_pixel_clk_recalc_rate()
3144 switch (dp_opts->link_rate) { in qmp_dp_pixel_clk_recalc_rate()
3165 switch (req->rate) { in qmp_dp_link_clk_determine_rate()
3172 return -EINVAL; in qmp_dp_link_clk_determine_rate()
3182 dp_opts = &qmp->dp_opts; in qmp_dp_link_clk_recalc_rate()
3184 switch (dp_opts->link_rate) { in qmp_dp_link_clk_recalc_rate()
3189 return dp_opts->link_rate * 100000; in qmp_dp_link_clk_recalc_rate()
3203 unsigned int idx = clkspec->args[0]; in qmp_dp_clks_hw_get()
3207 return ERR_PTR(-EINVAL); in qmp_dp_clks_hw_get()
3211 return &qmp->dp_link_hw; in qmp_dp_clks_hw_get()
3213 return &qmp->dp_pixel_hw; in qmp_dp_clks_hw_get()
3222 snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev)); in phy_dp_clks_register()
3225 qmp->dp_link_hw.init = &init; in phy_dp_clks_register()
3226 ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw); in phy_dp_clks_register()
3230 snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev)); in phy_dp_clks_register()
3233 qmp->dp_pixel_hw.init = &init; in phy_dp_clks_register()
3234 ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw); in phy_dp_clks_register()
3245 switch (clkspec->args[0]) { in qmp_combo_clk_hw_get()
3247 return &qmp->pipe_clk_fixed.hw; in qmp_combo_clk_hw_get()
3249 return &qmp->dp_link_hw; in qmp_combo_clk_hw_get()
3251 return &qmp->dp_pixel_hw; in qmp_combo_clk_hw_get()
3254 return ERR_PTR(-EINVAL); in qmp_combo_clk_hw_get()
3273 if (usb_np == qmp->dev->of_node) in qmp_combo_register_clocks()
3274 return devm_of_clk_add_hw_provider(qmp->dev, qmp_combo_clk_hw_get, qmp); in qmp_combo_register_clocks()
3280 &qmp->pipe_clk_fixed.hw); in qmp_combo_register_clocks()
3288 ret = devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, usb_np); in qmp_combo_register_clocks()
3296 return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, dp_np); in qmp_combo_register_clocks()
3304 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_typec_switch_set()
3306 if (orientation == qmp->orientation || orientation == TYPEC_ORIENTATION_NONE) in qmp_combo_typec_switch_set()
3309 mutex_lock(&qmp->phy_mutex); in qmp_combo_typec_switch_set()
3310 qmp->orientation = orientation; in qmp_combo_typec_switch_set()
3312 if (qmp->init_count) { in qmp_combo_typec_switch_set()
3313 if (qmp->usb_init_count) in qmp_combo_typec_switch_set()
3314 qmp_combo_usb_power_off(qmp->usb_phy); in qmp_combo_typec_switch_set()
3318 if (qmp->usb_init_count) in qmp_combo_typec_switch_set()
3319 qmp_combo_usb_power_on(qmp->usb_phy); in qmp_combo_typec_switch_set()
3320 if (qmp->dp_init_count) in qmp_combo_typec_switch_set()
3321 cfg->dp_aux_init(qmp); in qmp_combo_typec_switch_set()
3323 mutex_unlock(&qmp->phy_mutex); in qmp_combo_typec_switch_set()
3332 typec_switch_unregister(qmp->sw); in qmp_combo_typec_unregister()
3338 struct device *dev = qmp->dev; in qmp_combo_typec_switch_register()
3341 sw_desc.fwnode = dev->fwnode; in qmp_combo_typec_switch_register()
3343 qmp->sw = typec_switch_register(dev, &sw_desc); in qmp_combo_typec_switch_register()
3344 if (IS_ERR(qmp->sw)) { in qmp_combo_typec_switch_register()
3345 dev_err(dev, "Unable to register typec switch: %pe\n", qmp->sw); in qmp_combo_typec_switch_register()
3346 return PTR_ERR(qmp->sw); in qmp_combo_typec_switch_register()
3360 struct device *dev = qmp->dev; in qmp_combo_parse_dt_lecacy_dp()
3364 * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2; in qmp_combo_parse_dt_lecacy_dp()
3365 * tx2 -> 3; rx2 -> 4 in qmp_combo_parse_dt_lecacy_dp()
3370 qmp->dp_tx = devm_of_iomap(dev, np, 0, NULL); in qmp_combo_parse_dt_lecacy_dp()
3371 if (IS_ERR(qmp->dp_tx)) in qmp_combo_parse_dt_lecacy_dp()
3372 return PTR_ERR(qmp->dp_tx); in qmp_combo_parse_dt_lecacy_dp()
3374 qmp->dp_dp_phy = devm_of_iomap(dev, np, 2, NULL); in qmp_combo_parse_dt_lecacy_dp()
3375 if (IS_ERR(qmp->dp_dp_phy)) in qmp_combo_parse_dt_lecacy_dp()
3376 return PTR_ERR(qmp->dp_dp_phy); in qmp_combo_parse_dt_lecacy_dp()
3378 qmp->dp_tx2 = devm_of_iomap(dev, np, 3, NULL); in qmp_combo_parse_dt_lecacy_dp()
3379 if (IS_ERR(qmp->dp_tx2)) in qmp_combo_parse_dt_lecacy_dp()
3380 return PTR_ERR(qmp->dp_tx2); in qmp_combo_parse_dt_lecacy_dp()
3387 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_parse_dt_lecacy_usb()
3388 struct device *dev = qmp->dev; in qmp_combo_parse_dt_lecacy_usb()
3392 * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2; in qmp_combo_parse_dt_lecacy_usb()
3393 * tx2 -> 3; rx2 -> 4; pcs_misc (optional) -> 5 in qmp_combo_parse_dt_lecacy_usb()
3395 qmp->tx = devm_of_iomap(dev, np, 0, NULL); in qmp_combo_parse_dt_lecacy_usb()
3396 if (IS_ERR(qmp->tx)) in qmp_combo_parse_dt_lecacy_usb()
3397 return PTR_ERR(qmp->tx); in qmp_combo_parse_dt_lecacy_usb()
3399 qmp->rx = devm_of_iomap(dev, np, 1, NULL); in qmp_combo_parse_dt_lecacy_usb()
3400 if (IS_ERR(qmp->rx)) in qmp_combo_parse_dt_lecacy_usb()
3401 return PTR_ERR(qmp->rx); in qmp_combo_parse_dt_lecacy_usb()
3403 qmp->pcs = devm_of_iomap(dev, np, 2, NULL); in qmp_combo_parse_dt_lecacy_usb()
3404 if (IS_ERR(qmp->pcs)) in qmp_combo_parse_dt_lecacy_usb()
3405 return PTR_ERR(qmp->pcs); in qmp_combo_parse_dt_lecacy_usb()
3407 if (cfg->pcs_usb_offset) in qmp_combo_parse_dt_lecacy_usb()
3408 qmp->pcs_usb = qmp->pcs + cfg->pcs_usb_offset; in qmp_combo_parse_dt_lecacy_usb()
3410 qmp->tx2 = devm_of_iomap(dev, np, 3, NULL); in qmp_combo_parse_dt_lecacy_usb()
3411 if (IS_ERR(qmp->tx2)) in qmp_combo_parse_dt_lecacy_usb()
3412 return PTR_ERR(qmp->tx2); in qmp_combo_parse_dt_lecacy_usb()
3414 qmp->rx2 = devm_of_iomap(dev, np, 4, NULL); in qmp_combo_parse_dt_lecacy_usb()
3415 if (IS_ERR(qmp->rx2)) in qmp_combo_parse_dt_lecacy_usb()
3416 return PTR_ERR(qmp->rx2); in qmp_combo_parse_dt_lecacy_usb()
3418 qmp->pcs_misc = devm_of_iomap(dev, np, 5, NULL); in qmp_combo_parse_dt_lecacy_usb()
3419 if (IS_ERR(qmp->pcs_misc)) { in qmp_combo_parse_dt_lecacy_usb()
3420 dev_vdbg(dev, "PHY pcs_misc-reg not used\n"); in qmp_combo_parse_dt_lecacy_usb()
3421 qmp->pcs_misc = NULL; in qmp_combo_parse_dt_lecacy_usb()
3424 qmp->pipe_clk = devm_get_clk_from_child(dev, np, NULL); in qmp_combo_parse_dt_lecacy_usb()
3425 if (IS_ERR(qmp->pipe_clk)) { in qmp_combo_parse_dt_lecacy_usb()
3426 return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), in qmp_combo_parse_dt_lecacy_usb()
3436 struct platform_device *pdev = to_platform_device(qmp->dev); in qmp_combo_parse_dt_legacy()
3439 qmp->serdes = devm_platform_ioremap_resource(pdev, 0); in qmp_combo_parse_dt_legacy()
3440 if (IS_ERR(qmp->serdes)) in qmp_combo_parse_dt_legacy()
3441 return PTR_ERR(qmp->serdes); in qmp_combo_parse_dt_legacy()
3443 qmp->com = devm_platform_ioremap_resource(pdev, 1); in qmp_combo_parse_dt_legacy()
3444 if (IS_ERR(qmp->com)) in qmp_combo_parse_dt_legacy()
3445 return PTR_ERR(qmp->com); in qmp_combo_parse_dt_legacy()
3447 qmp->dp_serdes = devm_platform_ioremap_resource(pdev, 2); in qmp_combo_parse_dt_legacy()
3448 if (IS_ERR(qmp->dp_serdes)) in qmp_combo_parse_dt_legacy()
3449 return PTR_ERR(qmp->dp_serdes); in qmp_combo_parse_dt_legacy()
3459 ret = devm_clk_bulk_get_all(qmp->dev, &qmp->clks); in qmp_combo_parse_dt_legacy()
3463 qmp->num_clks = ret; in qmp_combo_parse_dt_legacy()
3470 struct platform_device *pdev = to_platform_device(qmp->dev); in qmp_combo_parse_dt()
3471 const struct qmp_phy_cfg *cfg = qmp->cfg; in qmp_combo_parse_dt()
3472 const struct qmp_combo_offsets *offs = cfg->offsets; in qmp_combo_parse_dt()
3473 struct device *dev = qmp->dev; in qmp_combo_parse_dt()
3478 return -EINVAL; in qmp_combo_parse_dt()
3484 qmp->com = base + offs->com; in qmp_combo_parse_dt()
3485 qmp->tx = base + offs->txa; in qmp_combo_parse_dt()
3486 qmp->rx = base + offs->rxa; in qmp_combo_parse_dt()
3487 qmp->tx2 = base + offs->txb; in qmp_combo_parse_dt()
3488 qmp->rx2 = base + offs->rxb; in qmp_combo_parse_dt()
3490 qmp->serdes = base + offs->usb3_serdes; in qmp_combo_parse_dt()
3491 qmp->pcs_misc = base + offs->usb3_pcs_misc; in qmp_combo_parse_dt()
3492 qmp->pcs = base + offs->usb3_pcs; in qmp_combo_parse_dt()
3493 qmp->pcs_usb = base + offs->usb3_pcs_usb; in qmp_combo_parse_dt()
3495 qmp->dp_serdes = base + offs->dp_serdes; in qmp_combo_parse_dt()
3496 if (offs->dp_txa) { in qmp_combo_parse_dt()
3497 qmp->dp_tx = base + offs->dp_txa; in qmp_combo_parse_dt()
3498 qmp->dp_tx2 = base + offs->dp_txb; in qmp_combo_parse_dt()
3500 qmp->dp_tx = base + offs->txa; in qmp_combo_parse_dt()
3501 qmp->dp_tx2 = base + offs->txb; in qmp_combo_parse_dt()
3503 qmp->dp_dp_phy = base + offs->dp_dp_phy; in qmp_combo_parse_dt()
3509 qmp->pipe_clk = devm_clk_get(dev, "usb3_pipe"); in qmp_combo_parse_dt()
3510 if (IS_ERR(qmp->pipe_clk)) { in qmp_combo_parse_dt()
3511 return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk), in qmp_combo_parse_dt()
3522 if (args->args_count == 0) in qmp_combo_phy_xlate()
3523 return ERR_PTR(-EINVAL); in qmp_combo_phy_xlate()
3525 switch (args->args[0]) { in qmp_combo_phy_xlate()
3527 return qmp->usb_phy; in qmp_combo_phy_xlate()
3529 return qmp->dp_phy; in qmp_combo_phy_xlate()
3532 return ERR_PTR(-EINVAL); in qmp_combo_phy_xlate()
3538 struct device *dev = &pdev->dev; in qmp_combo_probe()
3545 return -ENOMEM; in qmp_combo_probe()
3547 qmp->dev = dev; in qmp_combo_probe()
3549 qmp->orientation = TYPEC_ORIENTATION_NORMAL; in qmp_combo_probe()
3551 qmp->cfg = of_device_get_match_data(dev); in qmp_combo_probe()
3552 if (!qmp->cfg) in qmp_combo_probe()
3553 return -EINVAL; in qmp_combo_probe()
3555 mutex_init(&qmp->phy_mutex); in qmp_combo_probe()
3566 usb_np = of_get_child_by_name(dev->of_node, "usb3-phy"); in qmp_combo_probe()
3568 dp_np = of_get_child_by_name(dev->of_node, "dp-phy"); in qmp_combo_probe()
3571 return -EINVAL; in qmp_combo_probe()
3576 usb_np = of_node_get(dev->of_node); in qmp_combo_probe()
3577 dp_np = of_node_get(dev->of_node); in qmp_combo_probe()
3606 qmp->usb_phy = devm_phy_create(dev, usb_np, &qmp_combo_usb_phy_ops); in qmp_combo_probe()
3607 if (IS_ERR(qmp->usb_phy)) { in qmp_combo_probe()
3608 ret = PTR_ERR(qmp->usb_phy); in qmp_combo_probe()
3613 phy_set_drvdata(qmp->usb_phy, qmp); in qmp_combo_probe()
3615 qmp->dp_phy = devm_phy_create(dev, dp_np, &qmp_combo_dp_phy_ops); in qmp_combo_probe()
3616 if (IS_ERR(qmp->dp_phy)) { in qmp_combo_probe()
3617 ret = PTR_ERR(qmp->dp_phy); in qmp_combo_probe()
3622 phy_set_drvdata(qmp->dp_phy, qmp); in qmp_combo_probe()
3626 if (usb_np == dev->of_node) in qmp_combo_probe()
3644 .compatible = "qcom,sc7180-qmp-usb3-dp-phy",
3648 .compatible = "qcom,sc7280-qmp-usb3-dp-phy",
3652 .compatible = "qcom,sc8180x-qmp-usb3-dp-phy",
3656 .compatible = "qcom,sc8280xp-qmp-usb43dp-phy",
3660 .compatible = "qcom,sdm845-qmp-usb3-dp-phy",
3664 .compatible = "qcom,sm6350-qmp-usb3-dp-phy",
3668 .compatible = "qcom,sm8150-qmp-usb3-dp-phy",
3672 .compatible = "qcom,sm8250-qmp-usb3-dp-phy",
3676 .compatible = "qcom,sm8350-qmp-usb3-dp-phy",
3680 .compatible = "qcom,sm8450-qmp-usb3-dp-phy",
3684 .compatible = "qcom,sm8550-qmp-usb3-dp-phy",
3688 .compatible = "qcom,sm8650-qmp-usb3-dp-phy",
3692 .compatible = "qcom,x1e80100-qmp-usb3-dp-phy",
3702 .name = "qcom-qmp-combo-phy",