phy/freescale/phy-fsl-imx8-mipi-dphy.c

35 /* DPHY registers */
91 	bool is_combo;	/* MIPI DPHY and LVDS PHY combo */
109 	/* DPHY PLL parameters */
113 	/* DPHY register values */
139 	.name = "mipi-dphy",
149 		dev_err(&phy->dev, "Failed to write DPHY reg %d: %d\n", reg,  in phy_write()
531 		dev_err(&phy->dev, "Could not get DPHY lock (%d)!\n", ret);  in mixel_dphy_power_on_mipi_dphy()
620 		dev_err(&phy->dev, "Failed to set PHY mode to MIPI DPHY\n");  in mixel_dphy_set_mode()
652 	{ .compatible = "fsl,imx8mq-mipi-dphy",
654 	{ .compatible = "fsl,imx8qxp-mipi-dphy",
688 		dev_err(dev, "Couldn't create the DPHY regmap\n");  in mixel_dphy_probe()
709 		priv->id = of_alias_get_id(np, "mipi-dphy");  in mixel_dphy_probe()
741 		.name = "mixel-mipi-dphy",