Lines Matching +full:pcie +full:- +full:r8a7791
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
16 #include <linux/clk-provider.h>
34 #include "pcie-rcar.h"
45 /* Structure representing the PCIe interface */
47 struct rcar_pcie pcie; member
65 ret = -EINVAL; in rcar_pcie_wakeup()
72 * Test if the PCIe controller received PM_ENTER_L1 DLLP and in rcar_pcie_wakeup()
73 * the PCIe controller is not in L1 link state. If true, apply in rcar_pcie_wakeup()
95 static u32 rcar_read_conf(struct rcar_pcie *pcie, int where) in rcar_read_conf() argument
98 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_read_conf()
105 " .arch armv7-a\n" \
120 static int rcar_pci_write_reg_workaround(struct rcar_pcie *pcie, u32 val, in rcar_pci_write_reg_workaround() argument
127 : "+r"(error):"r"(val), "r"(pcie->base + reg) : "memory"); in rcar_pci_write_reg_workaround()
129 rcar_pci_write_reg(pcie, val, reg); in rcar_pci_write_reg_workaround()
134 static int rcar_pci_read_reg_workaround(struct rcar_pcie *pcie, u32 *val, in rcar_pci_read_reg_workaround() argument
141 : "+r"(error), "=r"(*val) : "r"(pcie->base + reg) : "memory"); in rcar_pci_read_reg_workaround()
146 *val = rcar_pci_read_reg(pcie, reg); in rcar_pci_read_reg_workaround()
156 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_config_access() local
161 ret = rcar_pcie_wakeup(pcie->dev, pcie->base); in rcar_pcie_config_access()
173 * While each channel has its own memory-mapped extended config in rcar_pcie_config_access()
181 * the same channel <-> device access works for any PCI_SLOT() in rcar_pcie_config_access()
183 * space to devfn 0 in order to enable self-enumeration. In this in rcar_pcie_config_access()
192 *data = rcar_pci_read_reg(pcie, PCICONF(index)); in rcar_pcie_config_access()
194 rcar_pci_write_reg(pcie, *data, PCICONF(index)); in rcar_pcie_config_access()
200 rcar_pci_write_reg(pcie, rcar_pci_read_reg(pcie, PCIEERRFR), PCIEERRFR); in rcar_pcie_config_access()
203 rcar_pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) | in rcar_pcie_config_access()
207 if (pci_is_root_bus(bus->parent)) in rcar_pcie_config_access()
208 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE0, PCIECCTLR); in rcar_pcie_config_access()
210 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE1, PCIECCTLR); in rcar_pcie_config_access()
213 if (rcar_pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST) in rcar_pcie_config_access()
217 if (rcar_read_conf(pcie, RCONF(PCI_STATUS)) & in rcar_pcie_config_access()
222 ret = rcar_pci_read_reg_workaround(pcie, data, PCIECDR); in rcar_pcie_config_access()
224 ret = rcar_pci_write_reg_workaround(pcie, *data, PCIECDR); in rcar_pcie_config_access()
227 rcar_pci_write_reg(pcie, 0, PCIECCTLR); in rcar_pcie_config_access()
235 struct rcar_pcie_host *host = bus->sysdata; in rcar_pcie_read_conf()
248 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", in rcar_pcie_read_conf()
249 bus->number, devfn, where, size, *val); in rcar_pcie_read_conf()
258 struct rcar_pcie_host *host = bus->sysdata; in rcar_pcie_write_conf()
268 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08x\n", in rcar_pcie_write_conf()
269 bus->number, devfn, where, size, val); in rcar_pcie_write_conf()
293 static void rcar_pcie_force_speedup(struct rcar_pcie *pcie) in rcar_pcie_force_speedup() argument
295 struct device *dev = pcie->dev; in rcar_pcie_force_speedup()
299 if ((rcar_pci_read_reg(pcie, MACS2R) & LINK_SPEED) != LINK_SPEED_5_0GTS) in rcar_pcie_force_speedup()
302 if (rcar_pci_read_reg(pcie, MACCTLR) & SPEED_CHANGE) { in rcar_pcie_force_speedup()
307 macsr = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_force_speedup()
312 rcar_rmw32(pcie, EXPCAP(12), PCI_EXP_LNKSTA_CLS, in rcar_pcie_force_speedup()
316 rcar_rmw32(pcie, MACCGSPSETR, SPCNGRSN, 0); in rcar_pcie_force_speedup()
320 rcar_pci_write_reg(pcie, macsr, MACSR); in rcar_pcie_force_speedup()
323 rcar_rmw32(pcie, MACCTLR, SPEED_CHANGE, SPEED_CHANGE); in rcar_pcie_force_speedup()
325 while (timeout--) { in rcar_pcie_force_speedup()
326 macsr = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_force_speedup()
329 rcar_pci_write_reg(pcie, macsr, MACSR); in rcar_pcie_force_speedup()
349 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_hw_enable() local
356 rcar_pcie_force_speedup(pcie); in rcar_pcie_hw_enable()
359 resource_list_for_each_entry(win, &bridge->windows) { in rcar_pcie_hw_enable()
360 struct resource *res = win->res; in rcar_pcie_hw_enable()
362 if (!res->flags) in rcar_pcie_hw_enable()
368 rcar_pcie_set_outbound(pcie, i, win); in rcar_pcie_hw_enable()
383 bridge->sysdata = host; in rcar_pcie_enable()
384 bridge->ops = &rcar_pcie_ops; in rcar_pcie_enable()
389 static int phy_wait_for_ack(struct rcar_pcie *pcie) in phy_wait_for_ack() argument
391 struct device *dev = pcie->dev; in phy_wait_for_ack()
394 while (timeout--) { in phy_wait_for_ack()
395 if (rcar_pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK) in phy_wait_for_ack()
401 dev_err(dev, "Access to PCIe phy timed out\n"); in phy_wait_for_ack()
403 return -ETIMEDOUT; in phy_wait_for_ack()
406 static void phy_write_reg(struct rcar_pcie *pcie, in phy_write_reg() argument
418 rcar_pci_write_reg(pcie, data, H1_PCIEPHYDOUTR); in phy_write_reg()
419 rcar_pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR); in phy_write_reg()
422 phy_wait_for_ack(pcie); in phy_write_reg()
425 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYDOUTR); in phy_write_reg()
426 rcar_pci_write_reg(pcie, 0, H1_PCIEPHYADRR); in phy_write_reg()
429 phy_wait_for_ack(pcie); in phy_write_reg()
432 static int rcar_pcie_hw_init(struct rcar_pcie *pcie) in rcar_pcie_hw_init() argument
437 rcar_pci_write_reg(pcie, 0, PCIETCTLR); in rcar_pcie_hw_init()
440 rcar_pci_write_reg(pcie, 1, PCIEMSR); in rcar_pcie_hw_init()
442 err = rcar_pcie_wait_for_phyrdy(pcie); in rcar_pcie_hw_init()
451 rcar_pci_write_reg(pcie, PCI_CLASS_BRIDGE_PCI_NORMAL << 8, IDSETR1); in rcar_pcie_hw_init()
457 rcar_rmw32(pcie, RCONF(PCI_SECONDARY_BUS), 0xff, 1); in rcar_pcie_hw_init()
458 rcar_rmw32(pcie, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1); in rcar_pcie_hw_init()
461 rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP); in rcar_pcie_hw_init()
462 rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS), in rcar_pcie_hw_init()
464 rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), PCI_HEADER_TYPE_MASK, in rcar_pcie_hw_init()
468 rcar_rmw32(pcie, REXPCAP(PCI_EXP_LNKCAP), PCI_EXP_LNKCAP_DLLLARC, in rcar_pcie_hw_init()
472 rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0); in rcar_pcie_hw_init()
475 rcar_rmw32(pcie, TLCTLR + 1, 0x3f, 50); in rcar_pcie_hw_init()
478 rcar_rmw32(pcie, RVCCAP(0), 0xfff00000, 0); in rcar_pcie_hw_init()
482 rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR); in rcar_pcie_hw_init()
484 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); in rcar_pcie_hw_init()
486 /* Finish initialization - establish a PCI Express link */ in rcar_pcie_hw_init()
487 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); in rcar_pcie_hw_init()
490 err = rcar_pcie_wait_for_dl(pcie); in rcar_pcie_hw_init()
495 rcar_rmw32(pcie, PCIEINTXR, 0, 0xF << 8); in rcar_pcie_hw_init()
504 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_phy_init_h1() local
507 phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191); in rcar_pcie_phy_init_h1()
508 phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180); in rcar_pcie_phy_init_h1()
509 phy_write_reg(pcie, 0, 0x43, 0x1, 0x00210188); in rcar_pcie_phy_init_h1()
510 phy_write_reg(pcie, 1, 0x43, 0x1, 0x00210188); in rcar_pcie_phy_init_h1()
511 phy_write_reg(pcie, 0, 0x44, 0x1, 0x015C0014); in rcar_pcie_phy_init_h1()
512 phy_write_reg(pcie, 1, 0x44, 0x1, 0x015C0014); in rcar_pcie_phy_init_h1()
513 phy_write_reg(pcie, 1, 0x4C, 0x1, 0x786174A0); in rcar_pcie_phy_init_h1()
514 phy_write_reg(pcie, 1, 0x4D, 0x1, 0x048000BB); in rcar_pcie_phy_init_h1()
515 phy_write_reg(pcie, 0, 0x51, 0x1, 0x079EC062); in rcar_pcie_phy_init_h1()
516 phy_write_reg(pcie, 0, 0x52, 0x1, 0x20000000); in rcar_pcie_phy_init_h1()
517 phy_write_reg(pcie, 1, 0x52, 0x1, 0x20000000); in rcar_pcie_phy_init_h1()
518 phy_write_reg(pcie, 1, 0x56, 0x1, 0x00003806); in rcar_pcie_phy_init_h1()
520 phy_write_reg(pcie, 0, 0x60, 0x1, 0x004B03A5); in rcar_pcie_phy_init_h1()
521 phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F); in rcar_pcie_phy_init_h1()
522 phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000); in rcar_pcie_phy_init_h1()
529 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_phy_init_gen2() local
532 * These settings come from the R-Car Series, 2nd Generation User's in rcar_pcie_phy_init_gen2()
535 rcar_pci_write_reg(pcie, 0x000f0030, GEN2_PCIEPHYADDR); in rcar_pcie_phy_init_gen2()
536 rcar_pci_write_reg(pcie, 0x00381203, GEN2_PCIEPHYDATA); in rcar_pcie_phy_init_gen2()
537 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
538 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
540 rcar_pci_write_reg(pcie, 0x000f0054, GEN2_PCIEPHYADDR); in rcar_pcie_phy_init_gen2()
542 rcar_pci_write_reg(pcie, 0x13802007, GEN2_PCIEPHYDATA); in rcar_pcie_phy_init_gen2()
543 rcar_pci_write_reg(pcie, 0x00000001, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
544 rcar_pci_write_reg(pcie, 0x00000006, GEN2_PCIEPHYCTRL); in rcar_pcie_phy_init_gen2()
553 err = phy_init(host->phy); in rcar_pcie_phy_init_gen3()
557 err = phy_power_on(host->phy); in rcar_pcie_phy_init_gen3()
559 phy_exit(host->phy); in rcar_pcie_phy_init_gen3()
567 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_msi_irq() local
568 struct rcar_msi *msi = &host->msi; in rcar_pcie_msi_irq()
569 struct device *dev = pcie->dev; in rcar_pcie_msi_irq()
572 reg = rcar_pci_read_reg(pcie, PCIEMSIFR); in rcar_pcie_msi_irq()
574 /* MSI & INTx share an interrupt - we only handle MSI here */ in rcar_pcie_msi_irq()
582 ret = generic_handle_domain_irq(msi->domain->parent, index); in rcar_pcie_msi_irq()
586 rcar_pci_write_reg(pcie, BIT(index), PCIEMSIFR); in rcar_pcie_msi_irq()
590 reg = rcar_pci_read_reg(pcie, PCIEMSIFR); in rcar_pcie_msi_irq()
614 .name = "PCIe MSI",
623 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_ack() local
626 rcar_pci_write_reg(pcie, BIT(d->hwirq), PCIEMSIFR); in rcar_msi_irq_ack()
632 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_mask() local
636 spin_lock_irqsave(&msi->mask_lock, flags); in rcar_msi_irq_mask()
637 value = rcar_pci_read_reg(pcie, PCIEMSIIER); in rcar_msi_irq_mask()
638 value &= ~BIT(d->hwirq); in rcar_msi_irq_mask()
639 rcar_pci_write_reg(pcie, value, PCIEMSIIER); in rcar_msi_irq_mask()
640 spin_unlock_irqrestore(&msi->mask_lock, flags); in rcar_msi_irq_mask()
646 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_msi_irq_unmask() local
650 spin_lock_irqsave(&msi->mask_lock, flags); in rcar_msi_irq_unmask()
651 value = rcar_pci_read_reg(pcie, PCIEMSIIER); in rcar_msi_irq_unmask()
652 value |= BIT(d->hwirq); in rcar_msi_irq_unmask()
653 rcar_pci_write_reg(pcie, value, PCIEMSIIER); in rcar_msi_irq_unmask()
654 spin_unlock_irqrestore(&msi->mask_lock, flags); in rcar_msi_irq_unmask()
659 return -EINVAL; in rcar_msi_set_affinity()
665 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_compose_msi_msg() local
667 msg->address_lo = rcar_pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE; in rcar_compose_msi_msg()
668 msg->address_hi = rcar_pci_read_reg(pcie, PCIEMSIAUR); in rcar_compose_msi_msg()
669 msg->data = data->hwirq; in rcar_compose_msi_msg()
673 .name = "R-Car MSI",
684 struct rcar_msi *msi = domain->host_data; in rcar_msi_domain_alloc()
688 mutex_lock(&msi->map_lock); in rcar_msi_domain_alloc()
690 hwirq = bitmap_find_free_region(msi->used, INT_PCI_MSI_NR, order_base_2(nr_irqs)); in rcar_msi_domain_alloc()
692 mutex_unlock(&msi->map_lock); in rcar_msi_domain_alloc()
695 return -ENOSPC; in rcar_msi_domain_alloc()
699 &rcar_msi_bottom_chip, domain->host_data, in rcar_msi_domain_alloc()
709 struct rcar_msi *msi = domain->host_data; in rcar_msi_domain_free()
711 mutex_lock(&msi->map_lock); in rcar_msi_domain_free()
713 bitmap_release_region(msi->used, d->hwirq, order_base_2(nr_irqs)); in rcar_msi_domain_free()
715 mutex_unlock(&msi->map_lock); in rcar_msi_domain_free()
731 struct rcar_pcie *pcie = &msi_to_host(msi)->pcie; in rcar_allocate_domains() local
732 struct fwnode_handle *fwnode = dev_fwnode(pcie->dev); in rcar_allocate_domains()
738 dev_err(pcie->dev, "failed to create IRQ domain\n"); in rcar_allocate_domains()
739 return -ENOMEM; in rcar_allocate_domains()
743 msi->domain = pci_msi_create_irq_domain(fwnode, &rcar_msi_info, parent); in rcar_allocate_domains()
744 if (!msi->domain) { in rcar_allocate_domains()
745 dev_err(pcie->dev, "failed to create MSI domain\n"); in rcar_allocate_domains()
747 return -ENOMEM; in rcar_allocate_domains()
755 struct irq_domain *parent = msi->domain->parent; in rcar_free_domains()
757 irq_domain_remove(msi->domain); in rcar_free_domains()
763 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_enable_msi() local
764 struct device *dev = pcie->dev; in rcar_pcie_enable_msi()
765 struct rcar_msi *msi = &host->msi; in rcar_pcie_enable_msi()
769 mutex_init(&msi->map_lock); in rcar_pcie_enable_msi()
770 spin_lock_init(&msi->mask_lock); in rcar_pcie_enable_msi()
772 err = of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_enable_msi()
780 /* Two irqs are for MSI, but they are also used for non-MSI irqs */ in rcar_pcie_enable_msi()
781 err = devm_request_irq(dev, msi->irq1, rcar_pcie_msi_irq, in rcar_pcie_enable_msi()
789 err = devm_request_irq(dev, msi->irq2, rcar_pcie_msi_irq, in rcar_pcie_enable_msi()
798 rcar_pci_write_reg(pcie, 0, PCIEMSIIER); in rcar_pcie_enable_msi()
802 * is guaranteed to be in the low 32bit range on any R-Car HW. in rcar_pcie_enable_msi()
804 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR); in rcar_pcie_enable_msi()
805 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR); in rcar_pcie_enable_msi()
816 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_teardown_msi() local
819 rcar_pci_write_reg(pcie, 0, PCIEMSIIER); in rcar_pcie_teardown_msi()
822 rcar_pci_write_reg(pcie, 0, PCIEMSIALR); in rcar_pcie_teardown_msi()
824 rcar_free_domains(&host->msi); in rcar_pcie_teardown_msi()
829 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_get_resources() local
830 struct device *dev = pcie->dev; in rcar_pcie_get_resources()
834 host->phy = devm_phy_optional_get(dev, "pcie"); in rcar_pcie_get_resources()
835 if (IS_ERR(host->phy)) in rcar_pcie_get_resources()
836 return PTR_ERR(host->phy); in rcar_pcie_get_resources()
838 err = of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_get_resources()
842 pcie->base = devm_ioremap_resource(dev, &res); in rcar_pcie_get_resources()
843 if (IS_ERR(pcie->base)) in rcar_pcie_get_resources()
844 return PTR_ERR(pcie->base); in rcar_pcie_get_resources()
846 host->bus_clk = devm_clk_get(dev, "pcie_bus"); in rcar_pcie_get_resources()
847 if (IS_ERR(host->bus_clk)) { in rcar_pcie_get_resources()
848 dev_err(dev, "cannot get pcie bus clock\n"); in rcar_pcie_get_resources()
849 return PTR_ERR(host->bus_clk); in rcar_pcie_get_resources()
852 i = irq_of_parse_and_map(dev->of_node, 0); in rcar_pcie_get_resources()
855 err = -ENOENT; in rcar_pcie_get_resources()
858 host->msi.irq1 = i; in rcar_pcie_get_resources()
860 i = irq_of_parse_and_map(dev->of_node, 1); in rcar_pcie_get_resources()
863 err = -ENOENT; in rcar_pcie_get_resources()
866 host->msi.irq2 = i; in rcar_pcie_get_resources()
871 irq_dispose_mapping(host->msi.irq1); in rcar_pcie_get_resources()
876 static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie, in rcar_pcie_inbound_ranges() argument
880 u64 restype = entry->res->flags; in rcar_pcie_inbound_ranges()
881 u64 cpu_addr = entry->res->start; in rcar_pcie_inbound_ranges()
882 u64 cpu_end = entry->res->end; in rcar_pcie_inbound_ranges()
883 u64 pci_addr = entry->res->start - entry->offset; in rcar_pcie_inbound_ranges()
886 u64 size = resource_size(entry->res); in rcar_pcie_inbound_ranges()
893 if (idx >= MAX_NR_INBOUND_MAPS - 1) { in rcar_pcie_inbound_ranges()
894 dev_err(pcie->dev, "Failed to map inbound regions!\n"); in rcar_pcie_inbound_ranges()
895 return -EINVAL; in rcar_pcie_inbound_ranges()
911 mask = roundup_pow_of_two(size) - 1; in rcar_pcie_inbound_ranges()
914 rcar_pcie_set_inbound(pcie, cpu_addr, pci_addr, in rcar_pcie_inbound_ranges()
932 resource_list_for_each_entry(entry, &bridge->dma_ranges) { in rcar_pcie_parse_map_dma_ranges()
933 err = rcar_pcie_inbound_ranges(&host->pcie, entry, &index); in rcar_pcie_parse_map_dma_ranges()
942 { .compatible = "renesas,pcie-r8a7779",
944 { .compatible = "renesas,pcie-r8a7790",
946 { .compatible = "renesas,pcie-r8a7791",
948 { .compatible = "renesas,pcie-rcar-gen2",
950 { .compatible = "renesas,pcie-r8a7795",
952 { .compatible = "renesas,pcie-rcar-gen3",
966 struct device *dev = &pdev->dev; in rcar_pcie_probe()
969 struct rcar_pcie *pcie; in rcar_pcie_probe() local
976 return -ENOMEM; in rcar_pcie_probe()
979 pcie = &host->pcie; in rcar_pcie_probe()
980 pcie->dev = dev; in rcar_pcie_probe()
985 if (err < 0 && err != -ENODEV) in rcar_pcie_probe()
990 pm_runtime_enable(pcie->dev); in rcar_pcie_probe()
991 err = pm_runtime_get_sync(pcie->dev); in rcar_pcie_probe()
993 dev_err(pcie->dev, "pm_runtime_get_sync failed\n"); in rcar_pcie_probe()
1003 err = clk_prepare_enable(host->bus_clk); in rcar_pcie_probe()
1013 host->phy_init_fn = of_device_get_match_data(dev); in rcar_pcie_probe()
1014 err = host->phy_init_fn(host); in rcar_pcie_probe()
1016 dev_err(dev, "failed to init PCIe PHY\n"); in rcar_pcie_probe()
1021 if (rcar_pcie_hw_init(pcie)) { in rcar_pcie_probe()
1022 dev_info(dev, "PCIe link down\n"); in rcar_pcie_probe()
1023 err = -ENODEV; in rcar_pcie_probe()
1027 data = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_probe()
1028 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); in rcar_pcie_probe()
1051 if (host->phy) { in rcar_pcie_probe()
1052 phy_power_off(host->phy); in rcar_pcie_probe()
1053 phy_exit(host->phy); in rcar_pcie_probe()
1057 clk_disable_unprepare(host->bus_clk); in rcar_pcie_probe()
1060 irq_dispose_mapping(host->msi.irq2); in rcar_pcie_probe()
1061 irq_dispose_mapping(host->msi.irq1); in rcar_pcie_probe()
1073 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_resume() local
1082 err = host->phy_init_fn(host); in rcar_pcie_resume()
1084 dev_info(dev, "PCIe link down\n"); in rcar_pcie_resume()
1088 data = rcar_pci_read_reg(pcie, MACSR); in rcar_pcie_resume()
1089 dev_info(dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f); in rcar_pcie_resume()
1096 of_address_to_resource(dev->of_node, 0, &res); in rcar_pcie_resume()
1097 rcar_pci_write_reg(pcie, upper_32_bits(res.start), PCIEMSIAUR); in rcar_pcie_resume()
1098 rcar_pci_write_reg(pcie, lower_32_bits(res.start) | MSIFE, PCIEMSIALR); in rcar_pcie_resume()
1100 bitmap_to_arr32(&val, host->msi.used, INT_PCI_MSI_NR); in rcar_pcie_resume()
1101 rcar_pci_write_reg(pcie, val, PCIEMSIIER); in rcar_pcie_resume()
1112 struct rcar_pcie *pcie = &host->pcie; in rcar_pcie_resume_noirq() local
1114 if (rcar_pci_read_reg(pcie, PMSR) && in rcar_pcie_resume_noirq()
1115 !(rcar_pci_read_reg(pcie, PCIETCTLR) & DL_DOWN)) in rcar_pcie_resume_noirq()
1118 /* Re-establish the PCIe link */ in rcar_pcie_resume_noirq()
1119 rcar_pci_write_reg(pcie, MACCTLR_INIT_VAL, MACCTLR); in rcar_pcie_resume_noirq()
1120 rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR); in rcar_pcie_resume_noirq()
1121 return rcar_pcie_wait_for_dl(pcie); in rcar_pcie_resume_noirq()
1131 .name = "rcar-pcie",
1147 { .compatible = "renesas,pcie-r8a7779" },
1148 { .compatible = "renesas,pcie-r8a7790" },
1149 { .compatible = "renesas,pcie-r8a7791" },
1150 { .compatible = "renesas,pcie-rcar-gen2" },