1 // SPDX-License-Identifier: GPL-2.0-only
4  * Copyright (c) 2021-2022, Intel Corporation.
48 /* Modem feature query identification code - "ICCC" */
71  * t7xx_pci_mhccif_isr() - Process MHCCIF interrupts.
77  ** 0		- Success.
78  ** -EINVAL	- Failure to get FSM control.
82 	struct t7xx_modem *md = t7xx_dev->md;  in t7xx_pci_mhccif_isr()
88 	ctl = md->fsm_ctl;  in t7xx_pci_mhccif_isr()
90 		dev_err_ratelimited(&t7xx_dev->pdev->dev,  in t7xx_pci_mhccif_isr()
92 		return -EINVAL;  in t7xx_pci_mhccif_isr()
95 	spin_lock_bh(&md->exp_lock);  in t7xx_pci_mhccif_isr()
97 	md->exp_id |= int_sta;  in t7xx_pci_mhccif_isr()
98 	if (md->exp_id & D2H_INT_EXCEPTION_INIT) {  in t7xx_pci_mhccif_isr()
99 		if (ctl->md_state == MD_STATE_INVALID ||  in t7xx_pci_mhccif_isr()
100 		    ctl->md_state == MD_STATE_WAITING_FOR_HS1 ||  in t7xx_pci_mhccif_isr()
101 		    ctl->md_state == MD_STATE_WAITING_FOR_HS2 ||  in t7xx_pci_mhccif_isr()
102 		    ctl->md_state == MD_STATE_READY) {  in t7xx_pci_mhccif_isr()
103 			md->exp_id &= ~D2H_INT_EXCEPTION_INIT;  in t7xx_pci_mhccif_isr()
106 	} else if (md->exp_id & D2H_INT_PORT_ENUM) {  in t7xx_pci_mhccif_isr()
107 		md->exp_id &= ~D2H_INT_PORT_ENUM;  in t7xx_pci_mhccif_isr()
109 		if (ctl->curr_state == FSM_STATE_INIT || ctl->curr_state == FSM_STATE_PRE_START ||  in t7xx_pci_mhccif_isr()
110 		    ctl->curr_state == FSM_STATE_STOPPED)  in t7xx_pci_mhccif_isr()
112 	} else if (ctl->md_state == MD_STATE_WAITING_FOR_HS1) {  in t7xx_pci_mhccif_isr()
114 		if ((md->exp_id & D2H_INT_ASYNC_MD_HK) && !(mask & D2H_INT_ASYNC_MD_HK)) {  in t7xx_pci_mhccif_isr()
115 			md->exp_id &= ~D2H_INT_ASYNC_MD_HK;  in t7xx_pci_mhccif_isr()
116 			queue_work(md->handshake_wq, &md->handshake_work);  in t7xx_pci_mhccif_isr()
119 	spin_unlock_bh(&md->exp_lock);  in t7xx_pci_mhccif_isr()
126 	struct t7xx_addr_base *pbase_addr = &t7xx_dev->base_addr;  in t7xx_clr_device_irq_via_pcie()
130 	reset_pcie_reg = pbase_addr->pcie_ext_reg_base + TOPRGU_CH_PCIE_IRQ_STA -  in t7xx_clr_device_irq_via_pcie()
131 			  pbase_addr->pcie_dev_reg_trsl_addr;  in t7xx_clr_device_irq_via_pcie()
148 	struct device *dev = &t7xx_dev->pdev->dev;  in t7xx_acpi_reset()
155 		return -EFAULT;  in t7xx_acpi_reset()
160 		return -EFAULT;  in t7xx_acpi_reset()
166 		return -EFAULT;  in t7xx_acpi_reset()
203 	struct t7xx_modem *modem;  in t7xx_rgu_isr_handler()  local
206 	if (!t7xx_dev->rgu_pci_irq_en)  in t7xx_rgu_isr_handler()
209 	modem = t7xx_dev->md;  in t7xx_rgu_isr_handler()
210 	modem->rgu_irq_asserted = true;  in t7xx_rgu_isr_handler()
221 	t7xx_dev->intr_handler[SAP_RGU_INT] = t7xx_rgu_isr_handler;  in t7xx_pcie_register_rgu_isr()
222 	t7xx_dev->intr_thread[SAP_RGU_INT] = t7xx_rgu_isr_thread;  in t7xx_pcie_register_rgu_isr()
223 	t7xx_dev->callback_param[SAP_RGU_INT] = t7xx_dev;  in t7xx_pcie_register_rgu_isr()
228  * t7xx_cldma_exception() - CLDMA exception handler.
229  * @md_ctrl: modem control struct.
232  * Part of the modem exception recovery.
236  * HIF_EX_ALLQ_RESET:	HW is back in safe mode for re-initialization and restart.
239 /* Modem Exception Handshake Flow
241  * Modem HW Exception interrupt received
244  *         +---------v--------+
246  *         +------------------+
248  *         +---------v--------+
249  *         | HIF_EX_INIT_DONE | : Wait for the init to be done
250  *         +------------------+
252  *         +---------v--------+
254  *         +------------------+ : Flush TX/RX workqueues
256  *         +---------v--------+
258  *         +------------------+
275 		if (md_ctrl->hif_id == CLDMA_ID_MD)  in t7xx_cldma_exception()
276 			t7xx_cldma_hw_reset(md_ctrl->t7xx_dev->base_addr.infracfg_ao_base);  in t7xx_cldma_exception()
282 		t7xx_cldma_hw_init(&md_ctrl->hw_info);  in t7xx_cldma_exception()
293 	struct t7xx_pci_dev *t7xx_dev = md->t7xx_dev;  in t7xx_md_exception()
298 		t7xx_port_proxy_reset(md->port_prox);  in t7xx_md_exception()
301 	t7xx_cldma_exception(md->md_ctrl[CLDMA_ID_MD], stage);  in t7xx_md_exception()
302 	t7xx_cldma_exception(md->md_ctrl[CLDMA_ID_AP], stage);  in t7xx_md_exception()
315 		if (md->exp_id & event_id)  in t7xx_wait_hif_ex_hk_event()
322 	return -EFAULT;  in t7xx_wait_hif_ex_hk_event()
334 	t7xx_dev->rgu_pci_irq_en = true;  in t7xx_md_sys_sw_init()
354 	ft_query->head_pattern = cpu_to_le32(MD_FEATURE_QUERY_ID);  in t7xx_prepare_host_rt_data_query()
355 	memcpy(ft_query->feature_set, core->feature_set, FEATURE_COUNT);  in t7xx_prepare_host_rt_data_query()
356 	ft_query->tail_pattern = cpu_to_le32(MD_FEATURE_QUERY_ID);  in t7xx_prepare_host_rt_data_query()
359 	t7xx_port_send_ctl_skb(core->ctl_port, skb, CTL_ID_HS1_MSG, 0);  in t7xx_prepare_host_rt_data_query()
371 	if (le32_to_cpu(md_feature->head_pattern) != MD_FEATURE_QUERY_ID ||  in t7xx_prepare_device_rt_data()
372 	    le32_to_cpu(md_feature->tail_pattern) != MD_FEATURE_QUERY_ID) {  in t7xx_prepare_device_rt_data()
374 			le32_to_cpu(md_feature->head_pattern),  in t7xx_prepare_device_rt_data()
375 			le32_to_cpu(md_feature->tail_pattern));  in t7xx_prepare_device_rt_data()
376 		return -EINVAL;  in t7xx_prepare_device_rt_data()
380 		if (FIELD_GET(FEATURE_MSK, md_feature->feature_set[i]) !=  in t7xx_prepare_device_rt_data()
387 		return -ENOMEM;  in t7xx_prepare_device_rt_data()
394 		u8 md_feature_mask = FIELD_GET(FEATURE_MSK, md_feature->feature_set[i]);  in t7xx_prepare_device_rt_data()
399 		rt_feature->feature_id = i;  in t7xx_prepare_device_rt_data()
401 			rt_feature->support_info = md_feature->feature_set[i];  in t7xx_prepare_device_rt_data()
407 	t7xx_port_send_ctl_skb(core->ctl_port, skb, CTL_ID_HS3_MSG, 0);  in t7xx_prepare_device_rt_data()
421 		offset += sizeof(*rt_feature) + le32_to_cpu(rt_feature->data_len);  in t7xx_parse_host_rt_data()
423 		ft_spt_cfg = FIELD_GET(FEATURE_MSK, core->feature_set[i]);  in t7xx_parse_host_rt_data()
427 		ft_spt_st = FIELD_GET(FEATURE_MSK, rt_feature->support_info);  in t7xx_parse_host_rt_data()
429 			return -EINVAL;  in t7xx_parse_host_rt_data()
432 			t7xx_port_enum_msg_handler(ctl->md, rt_feature->data);  in t7xx_parse_host_rt_data()
440 	struct device *dev = &md->t7xx_dev->pdev->dev;  in t7xx_core_reset()
441 	struct t7xx_fsm_ctl *ctl = md->fsm_ctl;  in t7xx_core_reset()
443 	md->core_md.ready = false;  in t7xx_core_reset()
447 		return -EINVAL;  in t7xx_core_reset()
450 	if (md->core_md.handshake_ongoing) {  in t7xx_core_reset()
457 	md->core_md.handshake_ongoing = false;  in t7xx_core_reset()
467 	struct device *dev = &md->t7xx_dev->pdev->dev;  in t7xx_core_hk_handler()
476 		spin_lock_irqsave(&ctl->event_lock, flags);  in t7xx_core_hk_handler()
477 		list_for_each_entry_safe(event, event_next, &ctl->event_queue, entry) {  in t7xx_core_hk_handler()
478 			if (event->event_id == err_detect) {  in t7xx_core_hk_handler()
479 				list_del(&event->entry);  in t7xx_core_hk_handler()
480 				spin_unlock_irqrestore(&ctl->event_lock, flags);  in t7xx_core_hk_handler()
483 			} else if (event->event_id == event_id) {  in t7xx_core_hk_handler()
484 				list_del(&event->entry);  in t7xx_core_hk_handler()
489 		spin_unlock_irqrestore(&ctl->event_lock, flags);  in t7xx_core_hk_handler()
494 		wait_event_interruptible(ctl->event_wq, !list_empty(&ctl->event_queue) ||  in t7xx_core_hk_handler()
500 	if (!event || ctl->exp_flg)  in t7xx_core_hk_handler()
503 	ret = t7xx_parse_host_rt_data(ctl, core_info, dev, event->data, event->length);  in t7xx_core_hk_handler()
509 	if (ctl->exp_flg)  in t7xx_core_hk_handler()
512 	ret = t7xx_prepare_device_rt_data(core_info, dev, event->data);  in t7xx_core_hk_handler()
518 	core_info->ready = true;  in t7xx_core_hk_handler()
519 	core_info->handshake_ongoing = false;  in t7xx_core_hk_handler()
520 	wake_up(&ctl->async_hk_wq);  in t7xx_core_hk_handler()
528 	struct t7xx_fsm_ctl *ctl = md->fsm_ctl;  in t7xx_md_hk_wq()
532 	t7xx_cldma_switch_cfg(md->md_ctrl[CLDMA_ID_MD]);  in t7xx_md_hk_wq()
533 	t7xx_cldma_start(md->md_ctrl[CLDMA_ID_MD]);  in t7xx_md_hk_wq()
535 	md->core_md.handshake_ongoing = true;  in t7xx_md_hk_wq()
536 	t7xx_core_hk_handler(md, &md->core_md, ctl, FSM_EVENT_MD_HS2, FSM_EVENT_MD_HS2_EXIT);  in t7xx_md_hk_wq()
542 	struct t7xx_fsm_ctl *ctl = md->fsm_ctl;  in t7xx_ap_hk_wq()
546 	t7xx_cldma_stop(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_ap_hk_wq()
547 	t7xx_cldma_switch_cfg(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_ap_hk_wq()
548 	t7xx_cldma_start(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_ap_hk_wq()
549 	md->core_ap.handshake_ongoing = true;  in t7xx_ap_hk_wq()
550 	t7xx_core_hk_handler(md, &md->core_ap, ctl, FSM_EVENT_AP_HS2, FSM_EVENT_AP_HS2_EXIT);  in t7xx_ap_hk_wq()
555 	struct t7xx_fsm_ctl *ctl = md->fsm_ctl;  in t7xx_md_event_notify()
561 		t7xx_mhccif_mask_clr(md->t7xx_dev, D2H_INT_PORT_ENUM | D2H_INT_ASYNC_MD_HK |  in t7xx_md_event_notify()
566 		t7xx_mhccif_mask_set(md->t7xx_dev, D2H_INT_PORT_ENUM);  in t7xx_md_event_notify()
568 		spin_lock_irqsave(&md->exp_lock, flags);  in t7xx_md_event_notify()
569 		int_sta = t7xx_get_interrupt_status(md->t7xx_dev);  in t7xx_md_event_notify()
570 		md->exp_id |= int_sta;  in t7xx_md_event_notify()
571 		if (md->exp_id & D2H_INT_EXCEPTION_INIT) {  in t7xx_md_event_notify()
572 			ctl->exp_flg = true;  in t7xx_md_event_notify()
573 			md->exp_id &= ~D2H_INT_EXCEPTION_INIT;  in t7xx_md_event_notify()
574 			md->exp_id &= ~D2H_INT_ASYNC_MD_HK;  in t7xx_md_event_notify()
575 			md->exp_id &= ~D2H_INT_ASYNC_AP_HK;  in t7xx_md_event_notify()
576 		} else if (ctl->exp_flg) {  in t7xx_md_event_notify()
577 			md->exp_id &= ~D2H_INT_ASYNC_MD_HK;  in t7xx_md_event_notify()
578 			md->exp_id &= ~D2H_INT_ASYNC_AP_HK;  in t7xx_md_event_notify()
580 			void __iomem *mhccif_base = md->t7xx_dev->base_addr.mhccif_rc_base;  in t7xx_md_event_notify()
582 			if (md->exp_id & D2H_INT_ASYNC_MD_HK) {  in t7xx_md_event_notify()
583 				queue_work(md->handshake_wq, &md->handshake_work);  in t7xx_md_event_notify()
584 				md->exp_id &= ~D2H_INT_ASYNC_MD_HK;  in t7xx_md_event_notify()
586 				t7xx_mhccif_mask_set(md->t7xx_dev, D2H_INT_ASYNC_MD_HK);  in t7xx_md_event_notify()
589 			if (md->exp_id & D2H_INT_ASYNC_AP_HK) {  in t7xx_md_event_notify()
590 				queue_work(md->handshake_wq, &md->ap_handshake_work);  in t7xx_md_event_notify()
591 				md->exp_id &= ~D2H_INT_ASYNC_AP_HK;  in t7xx_md_event_notify()
593 				t7xx_mhccif_mask_set(md->t7xx_dev, D2H_INT_ASYNC_AP_HK);  in t7xx_md_event_notify()
596 		spin_unlock_irqrestore(&md->exp_lock, flags);  in t7xx_md_event_notify()
598 		t7xx_mhccif_mask_clr(md->t7xx_dev,  in t7xx_md_event_notify()
606 		t7xx_mhccif_mask_set(md->t7xx_dev, D2H_INT_ASYNC_MD_HK);  in t7xx_md_event_notify()
607 		t7xx_mhccif_mask_set(md->t7xx_dev, D2H_INT_ASYNC_AP_HK);  in t7xx_md_event_notify()
617 	struct device *dev = &md->t7xx_dev->pdev->dev;  in t7xx_md_exception_handshake()
640 	struct device *dev = &t7xx_dev->pdev->dev;  in t7xx_md_alloc()
647 	md->t7xx_dev = t7xx_dev;  in t7xx_md_alloc()
648 	t7xx_dev->md = md;  in t7xx_md_alloc()
649 	spin_lock_init(&md->exp_lock);  in t7xx_md_alloc()
650 	md->handshake_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_HIGHPRI,  in t7xx_md_alloc()
652 	if (!md->handshake_wq)  in t7xx_md_alloc()
655 	INIT_WORK(&md->handshake_work, t7xx_md_hk_wq);  in t7xx_md_alloc()
656 	md->core_md.feature_set[RT_ID_MD_PORT_ENUM] &= ~FEATURE_MSK;  in t7xx_md_alloc()
657 	md->core_md.feature_set[RT_ID_MD_PORT_ENUM] |=  in t7xx_md_alloc()
660 	INIT_WORK(&md->ap_handshake_work, t7xx_ap_hk_wq);  in t7xx_md_alloc()
661 	md->core_ap.feature_set[RT_ID_AP_PORT_ENUM] &= ~FEATURE_MSK;  in t7xx_md_alloc()
662 	md->core_ap.feature_set[RT_ID_AP_PORT_ENUM] |=  in t7xx_md_alloc()
670 	struct t7xx_modem *md = t7xx_dev->md;  in t7xx_md_reset()
672 	md->md_init_finish = false;  in t7xx_md_reset()
673 	md->exp_id = 0;  in t7xx_md_reset()
675 	t7xx_cldma_reset(md->md_ctrl[CLDMA_ID_MD]);  in t7xx_md_reset()
676 	t7xx_cldma_reset(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_md_reset()
677 	t7xx_port_proxy_reset(md->port_prox);  in t7xx_md_reset()
678 	md->md_init_finish = true;  in t7xx_md_reset()
683  * t7xx_md_init() - Initialize modem.
690  ** 0		- Success.
691  ** -ENOMEM	- Allocation failure.
700 		return -ENOMEM;  in t7xx_md_init()
718 	ret = t7xx_cldma_init(md->md_ctrl[CLDMA_ID_MD]);  in t7xx_md_init()
722 	ret = t7xx_cldma_init(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_md_init()
730 	ret = t7xx_fsm_append_cmd(md->fsm_ctl, FSM_CMD_START, 0);  in t7xx_md_init()
735 	md->md_init_finish = true;  in t7xx_md_init()
739 	t7xx_port_proxy_uninit(md->port_prox);  in t7xx_md_init()
742 	t7xx_cldma_exit(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_md_init()
745 	t7xx_cldma_exit(md->md_ctrl[CLDMA_ID_MD]);  in t7xx_md_init()
754 	destroy_workqueue(md->handshake_wq);  in t7xx_md_init()
755 	dev_err(&t7xx_dev->pdev->dev, "Modem init failed\n");  in t7xx_md_init()
761 	struct t7xx_modem *md = t7xx_dev->md;  in t7xx_md_exit()
765 	if (!md->md_init_finish)  in t7xx_md_exit()
768 	t7xx_fsm_append_cmd(md->fsm_ctl, FSM_CMD_PRE_STOP, FSM_CMD_FLAG_WAIT_FOR_COMPLETION);  in t7xx_md_exit()
769 	t7xx_port_proxy_uninit(md->port_prox);  in t7xx_md_exit()
770 	t7xx_cldma_exit(md->md_ctrl[CLDMA_ID_AP]);  in t7xx_md_exit()
771 	t7xx_cldma_exit(md->md_ctrl[CLDMA_ID_MD]);  in t7xx_md_exit()
774 	destroy_workqueue(md->handshake_wq);  in t7xx_md_exit()