Lines Matching full:path
152 u8 path; in _wait_rx_mode() local
156 for (path = 0; path < RF_PATH_MAX; path++) { in _wait_rx_mode()
157 if (!(kpath & BIT(path))) in _wait_rx_mode()
161 2, 5000, false, rtwdev, path, 0x00, in _wait_rx_mode()
165 path, ret); in _wait_rx_mode()
303 enum rtw89_rf_path path, u8 index) in _dack_reload_by_path() argument
311 path_offset = (path == RF_PATH_A ? 0 : 0x28); in _dack_reload_by_path()
319 val32 |= dack->msbk_d[path][index][i + 12] << (i * 8); in _dack_reload_by_path()
328 val32 |= dack->msbk_d[path][index][i + 8] << (i * 8); in _dack_reload_by_path()
337 val32 |= dack->msbk_d[path][index][i + 4] << (i * 8); in _dack_reload_by_path()
346 val32 |= dack->msbk_d[path][index][i] << (i * 8); in _dack_reload_by_path()
353 val32 = (dack->biask_d[path][index] << 22) | in _dack_reload_by_path()
354 (dack->dadck_d[path][index] << 14); in _dack_reload_by_path()
360 static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dack_reload() argument
365 _dack_reload_by_path(rtwdev, path, i); in _dack_reload()
406 static void _dack_reset(struct rtw89_dev *rtwdev, u8 path) in _dack_reset() argument
408 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _dack_reset()
442 static void rtw8852c_txck_force(struct rtw89_dev *rtwdev, u8 path, bool force, in rtw8852c_txck_force() argument
445 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0); in rtw8852c_txck_force()
450 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck); in rtw8852c_txck_force()
451 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1); in rtw8852c_txck_force()
454 static void rtw8852c_rxck_force(struct rtw89_dev *rtwdev, u8 path, bool force, in rtw8852c_rxck_force() argument
459 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); in rtw8852c_rxck_force()
464 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); in rtw8852c_rxck_force()
465 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); in rtw8852c_rxck_force()
480 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_CTL, def->ctl); in rtw8852c_rxck_force()
481 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_EN, def->en); in rtw8852c_rxck_force()
482 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, def->bw0); in rtw8852c_rxck_force()
483 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, def->bw1); in rtw8852c_rxck_force()
484 rtw89_phy_write32_mask(rtwdev, R_DRCK | (path << 8), B_DRCK_MUL, def->mul); in rtw8852c_rxck_force()
485 rtw89_phy_write32_mask(rtwdev, R_ADCMOD | (path << 8), B_ADCMOD_LP, def->lp); in rtw8852c_rxck_force()
646 static void rtw8852c_disable_rxagc(struct rtw89_dev *rtwdev, u8 path, u8 en_rxgac) in rtw8852c_disable_rxagc() argument
648 if (path == RF_PATH_A) in rtw8852c_disable_rxagc()
654 static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_rxk_setting() argument
658 if (path == RF_PATH_A) in _iqk_rxk_setting()
663 switch (iqk_info->iqk_bw[path]) { in _iqk_rxk_setting()
666 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
667 rtw8852c_rxck_force(rtwdev, path, true, ADC_480M); in _iqk_rxk_setting()
668 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x0); in _iqk_rxk_setting()
669 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
670 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
673 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
674 rtw8852c_rxck_force(rtwdev, path, true, ADC_960M); in _iqk_rxk_setting()
675 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x1); in _iqk_rxk_setting()
676 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
677 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
680 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); in _iqk_rxk_setting()
681 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_rxk_setting()
682 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x2); in _iqk_rxk_setting()
683 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); in _iqk_rxk_setting()
684 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_rxk_setting()
692 if (path == RF_PATH_A) in _iqk_rxk_setting()
698 static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path, u8 ktype) in _iqk_check_cal() argument
710 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); in _iqk_check_cal()
713 "[IQK]S%x, type= %x, 0x8008 = 0x%x\n", path, ktype, tmp); in _iqk_check_cal()
719 enum rtw89_phy_idx phy_idx, u8 path, u8 ktype) in _iqk_one_shot() argument
722 u32 addr_rfc_ctl = R_UPD_CLK + (path << 13); in _iqk_one_shot()
728 iqk_cmd = 0x008 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
732 iqk_cmd = 0x008 | (1 << (4 + path)); in _iqk_one_shot()
736 iqk_cmd = 0x108 | (1 << (4 + path)); in _iqk_one_shot()
740 iqk_cmd = 0x508 | (1 << (4 + path)); in _iqk_one_shot()
744 iqk_cmd = 0x208 | (1 << (4 + path)); in _iqk_one_shot()
748 iqk_cmd = 0x308 | (1 << (4 + path)); in _iqk_one_shot()
752 iqk_cmd = 0x008 | (1 << (4 + path)) | ((0x8 + iqk_info->iqk_bw[path]) << 8); in _iqk_one_shot()
755 iqk_cmd = 0x508 | (1 << (4 + path)) | (path << 1); in _iqk_one_shot()
759 iqk_cmd = 0x008 | (1 << (4 + path)) | ((0xc + iqk_info->iqk_bw[path]) << 8); in _iqk_one_shot()
763 iqk_cmd = 0x408 | (1 << (4 + path)); in _iqk_one_shot()
767 iqk_cmd = 0x608 | (1 << (4 + path)); in _iqk_one_shot()
775 fail = _iqk_check_cal(rtwdev, path, ktype); in _iqk_one_shot()
782 enum rtw89_phy_idx phy_idx, u8 path) in _rxk_group_sel() argument
790 bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW); in _rxk_group_sel()
791 if (path == RF_PATH_B) { in _rxk_group_sel()
799 switch (iqk_info->iqk_band[path]) { in _rxk_group_sel()
802 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
803 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
804 rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9); in _rxk_group_sel()
807 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
808 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
809 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8); in _rxk_group_sel()
812 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _rxk_group_sel()
813 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _rxk_group_sel()
814 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9); in _rxk_group_sel()
821 switch (iqk_info->iqk_band[path]) { in _rxk_group_sel()
824 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
826 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, in _rxk_group_sel()
830 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
832 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, in _rxk_group_sel()
836 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, in _rxk_group_sel()
838 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, in _rxk_group_sel()
842 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
844 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
846 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _rxk_group_sel()
848 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _rxk_group_sel()
851 if (path == RF_PATH_B) in _rxk_group_sel()
852 rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0); in _rxk_group_sel()
853 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0); in _rxk_group_sel()
856 iqk_info->nb_rxcfir[path] = 0x40000002; in _rxk_group_sel()
857 iqk_info->is_wb_rxiqk[path] = false; in _rxk_group_sel()
859 iqk_info->nb_rxcfir[path] = 0x40000000; in _rxk_group_sel()
860 iqk_info->is_wb_rxiqk[path] = true; in _rxk_group_sel()
867 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_nbrxk() argument
875 bkrf0 = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_NBW); in _iqk_nbrxk()
876 if (path == RF_PATH_B) { in _iqk_nbrxk()
884 switch (iqk_info->iqk_band[path]) { in _iqk_nbrxk()
887 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
888 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
889 rtw89_write_rf(rtwdev, path, RR_RXG, RR_RXG_IQKMOD, 0x9); in _iqk_nbrxk()
892 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
893 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
894 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x8); in _iqk_nbrxk()
897 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); in _iqk_nbrxk()
898 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, 0x0); in _iqk_nbrxk()
899 rtw89_write_rf(rtwdev, path, RR_RXAE, RR_RXAE_IQKMOD, 0x9); in _iqk_nbrxk()
905 switch (iqk_info->iqk_band[path]) { in _iqk_nbrxk()
908 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_g_idxrxgain[gp]); in _iqk_nbrxk()
909 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_VOBUF, _rxk_g_idxattc2[gp]); in _iqk_nbrxk()
912 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a_idxrxgain[gp]); in _iqk_nbrxk()
913 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a_idxattc2[gp]); in _iqk_nbrxk()
916 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXG, _rxk_a6_idxrxgain[gp]); in _iqk_nbrxk()
917 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_IATT, _rxk_a6_idxattc2[gp]); in _iqk_nbrxk()
921 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_nbrxk()
922 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x0); in _iqk_nbrxk()
923 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP_V1, gp); in _iqk_nbrxk()
924 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); in _iqk_nbrxk()
926 if (path == RF_PATH_B) in _iqk_nbrxk()
927 rtw89_write_rf(rtwdev, path, RR_IQKPLL, RR_IQKPLL_MOD, 0x0); in _iqk_nbrxk()
929 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_NBW, bkrf0); in _iqk_nbrxk()
932 iqk_info->nb_rxcfir[path] = in _iqk_nbrxk()
933 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), in _iqk_nbrxk()
936 iqk_info->nb_rxcfir[path] = 0x40000002; in _iqk_nbrxk()
938 iqk_info->is_wb_rxiqk[path] = false; in _iqk_nbrxk()
943 enum rtw89_phy_idx phy_idx, u8 path) in _txk_group_sel() argument
950 switch (iqk_info->iqk_band[path]) { in _txk_group_sel()
952 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
954 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
956 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
959 R_KIP_IQP + (path << 8), in _txk_group_sel()
963 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
965 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
967 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
970 R_KIP_IQP + (path << 8), in _txk_group_sel()
974 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, in _txk_group_sel()
976 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, in _txk_group_sel()
978 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, in _txk_group_sel()
981 R_KIP_IQP + (path << 8), in _txk_group_sel()
987 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
989 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
991 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
993 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), in _txk_group_sel()
997 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); in _txk_group_sel()
1001 iqk_info->nb_txcfir[path] = 0x40000002; in _txk_group_sel()
1002 iqk_info->is_wb_txiqk[path] = false; in _txk_group_sel()
1004 iqk_info->nb_txcfir[path] = 0x40000000; in _txk_group_sel()
1005 iqk_info->is_wb_txiqk[path] = true; in _txk_group_sel()
1012 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_nbtxk() argument
1018 switch (iqk_info->iqk_band[path]) { in _iqk_nbtxk()
1020 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_g_power_range[gp]); in _iqk_nbtxk()
1021 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_g_track_range[gp]); in _iqk_nbtxk()
1022 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_g_gain_bb[gp]); in _iqk_nbtxk()
1023 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1027 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a_power_range[gp]); in _iqk_nbtxk()
1028 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a_track_range[gp]); in _iqk_nbtxk()
1029 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a_gain_bb[gp]); in _iqk_nbtxk()
1030 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1034 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, _txk_a6_power_range[gp]); in _iqk_nbtxk()
1035 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, _txk_a6_track_range[gp]); in _iqk_nbtxk()
1036 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, _txk_a6_gain_bb[gp]); in _iqk_nbtxk()
1037 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_nbtxk()
1044 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); in _iqk_nbtxk()
1045 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x1); in _iqk_nbtxk()
1046 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G2, 0x0); in _iqk_nbtxk()
1047 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp + 1); in _iqk_nbtxk()
1050 fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); in _iqk_nbtxk()
1053 iqk_info->nb_txcfir[path] = in _iqk_nbtxk()
1054 rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), in _iqk_nbtxk()
1057 iqk_info->nb_txcfir[path] = 0x40000002; in _iqk_nbtxk()
1059 iqk_info->is_wb_txiqk[path] = false; in _iqk_nbtxk()
1064 static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) in _lok_finetune_check() argument
1077 val = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); in _lok_finetune_check()
1086 iqk_info->lok_idac[idx][path] = val; in _lok_finetune_check()
1088 val = rtw89_read_rf(rtwdev, path, RR_LOKVB, RFREG_MASK); in _lok_finetune_check()
1097 iqk_info->lok_vbuf[idx][path] = val; in _lok_finetune_check()
1103 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_lok() argument
1114 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1116 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1117 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1122 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1123 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1128 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1129 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1136 tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id); in _iqk_lok()
1137 iqk_info->lok_cor_fail[0][path] = tmp; in _iqk_lok()
1140 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1142 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1143 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1147 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1148 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1152 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1153 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1159 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); in _iqk_lok()
1162 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1164 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1165 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1170 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1171 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1176 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x6); in _iqk_lok()
1177 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1184 tmp = _iqk_one_shot(rtwdev, phy_idx, path, tmp_id); in _iqk_lok()
1185 iqk_info->lok_fin_fail[0][path] = tmp; in _iqk_lok()
1188 switch (iqk_info->iqk_band[path]) { in _iqk_lok()
1191 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1192 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1196 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1197 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1201 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); in _iqk_lok()
1202 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), in _iqk_lok()
1206 tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); in _iqk_lok()
1207 fail = _lok_finetune_check(rtwdev, path); in _iqk_lok()
1212 static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) in _iqk_txk_setting() argument
1216 switch (iqk_info->iqk_band[path]) { in _iqk_txk_setting()
1219 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); in _iqk_txk_setting()
1220 rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x0); in _iqk_txk_setting()
1221 rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); in _iqk_txk_setting()
1222 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1223 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1224 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1225 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1228 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1229 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1232 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0); in _iqk_txk_setting()
1233 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1); in _iqk_txk_setting()
1234 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1235 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1236 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1237 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1240 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1241 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1244 rtw89_write_rf(rtwdev, path, RR_TXATANK, RR_TXATANK_LBSW2, 0x0); in _iqk_txk_setting()
1245 rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXAS, 0x1); in _iqk_txk_setting()
1246 rtw89_write_rf(rtwdev, path, RR_TXA2, RR_TXA2_LDO, 0xf); in _iqk_txk_setting()
1247 rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); in _iqk_txk_setting()
1248 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); in _iqk_txk_setting()
1249 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _iqk_txk_setting()
1252 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _iqk_txk_setting()
1253 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); in _iqk_txk_setting()
1259 u8 path) in _iqk_info_iqk() argument
1265 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %lu\n", path, in _iqk_info_iqk()
1266 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path])); in _iqk_info_iqk()
1267 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, in _iqk_info_iqk()
1268 iqk_info->lok_cor_fail[0][path]); in _iqk_info_iqk()
1269 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, in _iqk_info_iqk()
1270 iqk_info->lok_fin_fail[0][path]); in _iqk_info_iqk()
1271 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_TXIQK_fail = %d\n", path, in _iqk_info_iqk()
1272 iqk_info->iqk_tx_fail[0][path]); in _iqk_info_iqk()
1273 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_RXIQK_fail= %d,\n", path, in _iqk_info_iqk()
1274 iqk_info->iqk_rx_fail[0][path]); in _iqk_info_iqk()
1276 flag = iqk_info->lok_cor_fail[0][path]; in _iqk_info_iqk()
1277 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag); in _iqk_info_iqk()
1278 flag = iqk_info->lok_fin_fail[0][path]; in _iqk_info_iqk()
1279 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FFIN << (path * 4), flag); in _iqk_info_iqk()
1280 flag = iqk_info->iqk_tx_fail[0][path]; in _iqk_info_iqk()
1281 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FTX << (path * 4), flag); in _iqk_info_iqk()
1282 flag = iqk_info->iqk_rx_fail[0][path]; in _iqk_info_iqk()
1283 rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_F_RX << (path * 4), flag); in _iqk_info_iqk()
1285 tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); in _iqk_info_iqk()
1286 iqk_info->bp_iqkenable[path] = tmp; in _iqk_info_iqk()
1287 tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1288 iqk_info->bp_txkresult[path] = tmp; in _iqk_info_iqk()
1289 tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); in _iqk_info_iqk()
1290 iqk_info->bp_rxkresult[path] = tmp; in _iqk_info_iqk()
1295 tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, B_IQKINF_FAIL << (path * 4)); in _iqk_info_iqk()
1298 rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_FCNT << (path * 4), in _iqk_info_iqk()
1302 static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) in _iqk_by_path() argument
1306 _iqk_txk_setting(rtwdev, path); in _iqk_by_path()
1307 iqk_info->lok_fail[path] = _iqk_lok(rtwdev, phy_idx, path); in _iqk_by_path()
1310 iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); in _iqk_by_path()
1312 iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1314 _iqk_rxk_setting(rtwdev, path); in _iqk_by_path()
1316 iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); in _iqk_by_path()
1318 iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); in _iqk_by_path()
1320 _iqk_info_iqk(rtwdev, phy_idx, path); in _iqk_by_path()
1324 enum rtw89_phy_idx phy, u8 path) in _iqk_get_ch_info() argument
1331 iqk_info->iqk_band[path] = chan->band_type; in _iqk_get_ch_info()
1332 iqk_info->iqk_bw[path] = chan->band_width; in _iqk_get_ch_info()
1333 iqk_info->iqk_ch[path] = chan->channel; in _iqk_get_ch_info()
1336 "[IQK]iqk_info->iqk_band[%x] = 0x%x\n", path, in _iqk_get_ch_info()
1337 iqk_info->iqk_band[path]); in _iqk_get_ch_info()
1339 path, iqk_info->iqk_bw[path]); in _iqk_get_ch_info()
1341 path, iqk_info->iqk_ch[path]); in _iqk_get_ch_info()
1343 "[IQK]S%d (PHY%d): / DBCC %s/ %s/ CH%d/ %s\n", path, phy, in _iqk_get_ch_info()
1345 iqk_info->iqk_band[path] == 0 ? "2G" : in _iqk_get_ch_info()
1346 iqk_info->iqk_band[path] == 1 ? "5G" : "6G", in _iqk_get_ch_info()
1347 iqk_info->iqk_ch[path], in _iqk_get_ch_info()
1348 iqk_info->iqk_bw[path] == 0 ? "20M" : in _iqk_get_ch_info()
1349 iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); in _iqk_get_ch_info()
1356 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BAND << (path * 16), in _iqk_get_ch_info()
1357 iqk_info->iqk_band[path]); in _iqk_get_ch_info()
1358 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BW << (path * 16), in _iqk_get_ch_info()
1359 iqk_info->iqk_bw[path]); in _iqk_get_ch_info()
1360 rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_CH << (path * 16), in _iqk_get_ch_info()
1361 iqk_info->iqk_ch[path]); in _iqk_get_ch_info()
1367 u8 path) in _iqk_start_iqk() argument
1369 _iqk_by_path(rtwdev, phy_idx, path); in _iqk_start_iqk()
1372 static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) in _iqk_restore() argument
1377 rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1378 iqk_info->nb_txcfir[path]); in _iqk_restore()
1379 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, in _iqk_restore()
1380 iqk_info->nb_rxcfir[path]); in _iqk_restore()
1382 0x00001219 + (path << 4)); in _iqk_restore()
1384 fail = _iqk_check_cal(rtwdev, path, 0x12); in _iqk_restore()
1391 rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); in _iqk_restore()
1392 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _iqk_restore()
1393 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _iqk_restore()
1397 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_afebb_restore() argument
1399 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _iqk_afebb_restore()
1403 rtw8852c_disable_rxagc(rtwdev, path, 0x1); in _iqk_afebb_restore()
1406 static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) in _iqk_preset() argument
1412 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); in _iqk_preset()
1413 rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); in _iqk_preset()
1414 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _iqk_preset()
1420 enum rtw89_phy_idx phy_idx, u8 path) in _iqk_macbb_setting() argument
1425 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _iqk_macbb_setting()
1426 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _iqk_macbb_setting()
1427 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _iqk_macbb_setting()
1428 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _iqk_macbb_setting()
1429 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _iqk_macbb_setting()
1432 rtw8852c_disable_rxagc(rtwdev, path, 0x0); in _iqk_macbb_setting()
1433 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), MASKDWORD, 0xf801fffd); in _iqk_macbb_setting()
1434 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_DIS, 0x1); in _iqk_macbb_setting()
1435 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DAC_VAL, 0x1); in _iqk_macbb_setting()
1437 rtw8852c_txck_force(rtwdev, path, true, DAC_960M); in _iqk_macbb_setting()
1438 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_DPD_GDIS, 0x1); in _iqk_macbb_setting()
1440 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _iqk_macbb_setting()
1441 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_ACK_VAL, 0x2); in _iqk_macbb_setting()
1443 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW | (path << 13), B_P0_NRBW_DBG, 0x1); in _iqk_macbb_setting()
1448 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1); in _iqk_macbb_setting()
1449 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1); in _iqk_macbb_setting()
1452 static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _rck() argument
1458 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); in _rck()
1460 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rck()
1462 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rck()
1463 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rck()
1466 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _rck()
1469 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); in _rck()
1472 false, rtwdev, path, 0x1c, BIT(3)); in _rck()
1476 rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); in _rck()
1477 rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); in _rck()
1479 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rck()
1483 rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK), in _rck()
1484 rtw89_read_rf(rtwdev, path, RR_RCKS, RFREG_MASK)); in _rck()
1490 u8 ch, path; in _iqk_init() local
1507 for (path = 0; path < RTW8852C_IQK_SS; path++) { in _iqk_init()
1508 iqk_info->lok_cor_fail[ch][path] = false; in _iqk_init()
1509 iqk_info->lok_fin_fail[ch][path] = false; in _iqk_init()
1510 iqk_info->iqk_tx_fail[ch][path] = false; in _iqk_init()
1511 iqk_info->iqk_rx_fail[ch][path] = false; in _iqk_init()
1512 iqk_info->iqk_mcc_ch[ch][path] = 0x0; in _iqk_init()
1513 iqk_info->iqk_table_idx[path] = 0x0; in _iqk_init()
1519 enum rtw89_phy_idx phy_idx, u8 path) in _doiqk() argument
1534 _iqk_get_ch_info(rtwdev, phy_idx, path); in _doiqk()
1536 _rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path); in _doiqk()
1537 _iqk_macbb_setting(rtwdev, phy_idx, path); in _doiqk()
1538 _iqk_preset(rtwdev, path); in _doiqk()
1539 _iqk_start_iqk(rtwdev, phy_idx, path); in _doiqk()
1540 _iqk_restore(rtwdev, path); in _doiqk()
1541 _iqk_afebb_restore(rtwdev, phy_idx, path); in _doiqk()
1543 _rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path); in _doiqk()
1565 static void _rx_dck_value_rewrite(struct rtw89_dev *rtwdev, u8 path, u8 addr, in _rx_dck_value_rewrite() argument
1577 rtw89_write_rf(rtwdev, path, RR_LUTPLL, RR_CAL_RW, 0x1); in _rx_dck_value_rewrite()
1578 rtw89_write_rf(rtwdev, path, RR_RFC, RR_WCAL, 0x1); in _rx_dck_value_rewrite()
1579 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x1); in _rx_dck_value_rewrite()
1580 rtw89_write_rf(rtwdev, path, RR_LUTWA, MASKBYTE0, addr); in _rx_dck_value_rewrite()
1581 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ofst_val); in _rx_dck_value_rewrite()
1582 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ofst_val); in _rx_dck_value_rewrite()
1583 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); in _rx_dck_value_rewrite()
1584 rtw89_write_rf(rtwdev, path, RR_RFC, RR_WCAL, 0x0); in _rx_dck_value_rewrite()
1585 rtw89_write_rf(rtwdev, path, RR_LUTPLL, RR_CAL_RW, 0x0); in _rx_dck_value_rewrite()
1592 static bool _rx_dck_rek_check(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_rek_check() argument
1602 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i]); in _rx_dck_rek_check()
1603 i_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1604 q_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1609 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i]); in _rx_dck_rek_check()
1610 i_even = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1611 q_even = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1619 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i] + 1); in _rx_dck_rek_check()
1620 i_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1621 q_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1626 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i] + 1); in _rx_dck_rek_check()
1627 i_odd = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_rek_check()
1628 q_odd = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_rek_check()
1640 static void _rx_dck_fix_if_need(struct rtw89_dev *rtwdev, u8 path, u8 addr, in _rx_dck_fix_if_need() argument
1662 _rx_dck_value_rewrite(rtwdev, path, addr, val_i, val_q); in _rx_dck_fix_if_need()
1665 static void _rx_dck_recover(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_recover() argument
1676 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i]); in _rx_dck_recover()
1677 i_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1678 q_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1680 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i] + 1); in _rx_dck_recover()
1681 i_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1682 q_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1688 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i]); in _rx_dck_recover()
1689 i_even = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1690 q_even = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1695 _rx_dck_fix_if_need(rtwdev, path, _dck_addr[i], in _rx_dck_recover()
1702 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i] + 1); in _rx_dck_recover()
1703 i_odd = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); in _rx_dck_recover()
1704 q_odd = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); in _rx_dck_recover()
1709 _rx_dck_fix_if_need(rtwdev, path, _dck_addr[i] + 1, in _rx_dck_recover()
1714 static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path) in _rx_dck_toggle() argument
1719 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _rx_dck_toggle()
1720 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); in _rx_dck_toggle()
1723 2, 2000, false, rtwdev, path, in _rx_dck_toggle()
1726 rtw89_warn(rtwdev, "[RX_DCK] S%d RXDCK timeout\n", path); in _rx_dck_toggle()
1728 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] S%d RXDCK finish\n", path); in _rx_dck_toggle()
1730 rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); in _rx_dck_toggle()
1733 static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path, in _set_rx_dck() argument
1738 rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_CLR, 0x0); in _set_rx_dck()
1740 _rx_dck_toggle(rtwdev, path); in _set_rx_dck()
1741 if (rtw89_read_rf(rtwdev, path, RR_DCKC, RR_DCKC_CHK) == 0) in _set_rx_dck()
1743 res = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_DONE); in _set_rx_dck()
1745 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, res); in _set_rx_dck()
1746 _rx_dck_toggle(rtwdev, path); in _set_rx_dck()
1747 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_IDAC, 0x1); in _set_rx_dck()
1830 enum rtw89_rf_path path, bool is_bybb) in _rf_direct_cntrl() argument
1833 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); in _rf_direct_cntrl()
1835 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rf_direct_cntrl()
1839 enum rtw89_rf_path path, bool off);
1842 u32 reg_bkup[][RTW8852C_DPK_KIP_REG_NUM], u8 path) in _dpk_bkup_kip() argument
1847 reg_bkup[path][i] = in _dpk_bkup_kip()
1848 rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); in _dpk_bkup_kip()
1851 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_bkup_kip()
1856 u32 reg_bkup[][RTW8852C_DPK_KIP_REG_NUM], u8 path) in _dpk_reload_kip() argument
1861 rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), in _dpk_reload_kip()
1862 MASKDWORD, reg_bkup[path][i]); in _dpk_reload_kip()
1864 reg[i] + (path << 8), reg_bkup[path][i]); in _dpk_reload_kip()
1869 enum rtw89_rf_path path, enum rtw8852c_dpk_id id) in _dpk_one_shot() argument
1875 dpk_cmd = (u16)((id << 8) | (0x19 + path * 0x12)); in _dpk_one_shot()
1904 enum rtw89_rf_path path) in _dpk_information() argument
1909 u8 kidx = dpk->cur_idx[path]; in _dpk_information()
1911 dpk->bp[path][kidx].band = chan->band_type; in _dpk_information()
1912 dpk->bp[path][kidx].ch = chan->channel; in _dpk_information()
1913 dpk->bp[path][kidx].bw = chan->band_width; in _dpk_information()
1917 path, dpk->cur_idx[path], phy, in _dpk_information()
1918 rtwdev->is_tssi_mode[path] ? "on" : "off", in _dpk_information()
1920 dpk->bp[path][kidx].band == 0 ? "2G" : in _dpk_information()
1921 dpk->bp[path][kidx].band == 1 ? "5G" : "6G", in _dpk_information()
1922 dpk->bp[path][kidx].ch, in _dpk_information()
1923 dpk->bp[path][kidx].bw == 0 ? "20M" : in _dpk_information()
1924 dpk->bp[path][kidx].bw == 1 ? "40M" : "80M"); in _dpk_information()
1929 enum rtw89_rf_path path, u8 kpath) in _dpk_bb_afe_setting() argument
1932 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _dpk_bb_afe_setting()
1933 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _dpk_bb_afe_setting()
1934 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _dpk_bb_afe_setting()
1935 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _dpk_bb_afe_setting()
1938 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd); in _dpk_bb_afe_setting()
1941 rtw8852c_txck_force(rtwdev, path, true, DAC_960M); in _dpk_bb_afe_setting()
1944 rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); in _dpk_bb_afe_setting()
1945 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), in _dpk_bb_afe_setting()
1953 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x1); in _dpk_bb_afe_setting()
1954 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x1); in _dpk_bb_afe_setting()
1956 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path); in _dpk_bb_afe_setting()
1959 static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, u8 path) in _dpk_bb_afe_restore() argument
1961 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), in _dpk_bb_afe_restore()
1963 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x1); in _dpk_bb_afe_restore()
1964 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A1 << path, 0x0); in _dpk_bb_afe_restore()
1965 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x1); in _dpk_bb_afe_restore()
1966 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A3 << path, 0x0); in _dpk_bb_afe_restore()
1967 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000); in _dpk_bb_afe_restore()
1968 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); in _dpk_bb_afe_restore()
1969 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A0 << path, 0x0); in _dpk_bb_afe_restore()
1970 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_A2 << path, 0x0); in _dpk_bb_afe_restore()
1972 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path); in _dpk_bb_afe_restore()
1976 enum rtw89_rf_path path, bool is_pause) in _dpk_tssi_pause() argument
1978 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _dpk_tssi_pause()
1981 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, in _dpk_tssi_pause()
1985 static void _dpk_kip_control_rfc(struct rtw89_dev *rtwdev, u8 path, bool ctrl_by_kip) in _dpk_kip_control_rfc() argument
1987 rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_IQK_RFC_ON, ctrl_by_kip); in _dpk_kip_control_rfc()
1992 static void _dpk_txpwr_bb_force(struct rtw89_dev *rtwdev, u8 path, bool force) in _dpk_txpwr_bb_force() argument
1994 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force); in _dpk_txpwr_bb_force()
1995 rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force); in _dpk_txpwr_bb_force()
1998 path, force ? "on" : "off"); in _dpk_txpwr_bb_force()
2002 enum rtw89_rf_path path) in _dpk_kip_restore() argument
2004 _dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE); in _dpk_kip_restore()
2005 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_restore()
2006 _dpk_txpwr_bb_force(rtwdev, path, false); in _dpk_kip_restore()
2007 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); in _dpk_kip_restore()
2012 enum rtw89_rf_path path) in _dpk_lbk_rxiqk() argument
2018 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_lbk_rxiqk()
2021 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2023 cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_lbk_rxiqk()
2024 rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK); in _dpk_lbk_rxiqk()
2025 reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8), in _dpk_lbk_rxiqk()
2028 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); in _dpk_lbk_rxiqk()
2029 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3); in _dpk_lbk_rxiqk()
2030 rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd); in _dpk_lbk_rxiqk()
2031 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, 0x1f); in _dpk_lbk_rxiqk()
2033 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12); in _dpk_lbk_rxiqk()
2034 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3); in _dpk_lbk_rxiqk()
2036 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2040 _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); in _dpk_lbk_rxiqk()
2042 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, in _dpk_lbk_rxiqk()
2043 rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD)); in _dpk_lbk_rxiqk()
2045 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_lbk_rxiqk()
2047 rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11); in _dpk_lbk_rxiqk()
2048 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, cur_rxbb); in _dpk_lbk_rxiqk()
2049 rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc); in _dpk_lbk_rxiqk()
2053 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); in _dpk_lbk_rxiqk()
2055 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_lbk_rxiqk()
2059 enum rtw89_rf_path path, u8 kidx) in _dpk_rf_setting() argument
2063 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { in _dpk_rf_setting()
2064 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
2066 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2067 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x2); in _dpk_rf_setting()
2068 rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x4); in _dpk_rf_setting()
2069 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); in _dpk_rf_setting()
2070 rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); in _dpk_rf_setting()
2074 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), in _dpk_rf_setting()
2075 rtw89_read_rf(rtwdev, path, RR_RXBB, RFREG_MASK), in _dpk_rf_setting()
2076 rtw89_read_rf(rtwdev, path, RR_TIA, RFREG_MASK), in _dpk_rf_setting()
2077 rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK), in _dpk_rf_setting()
2078 rtw89_read_rf(rtwdev, path, RR_LUTDBG, RFREG_MASK), in _dpk_rf_setting()
2079 rtw89_read_rf(rtwdev, path, 0x1001a, RFREG_MASK)); in _dpk_rf_setting()
2081 rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, in _dpk_rf_setting()
2083 rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); in _dpk_rf_setting()
2085 if (dpk->bp[path][kidx].band == RTW89_BAND_6G && dpk->bp[path][kidx].ch >= 161) in _dpk_rf_setting()
2086 rtw89_write_rf(rtwdev, path, RR_IQGEN, RR_IQGEN_BIAS, 0x8); in _dpk_rf_setting()
2088 rtw89_write_rf(rtwdev, path, RR_LOGEN, RR_LOGEN_RPT, 0xd); in _dpk_rf_setting()
2089 rtw89_write_rf(rtwdev, path, RR_TXAC, RR_TXAC_IQG, 0x8); in _dpk_rf_setting()
2091 rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_ATT, 0x0); in _dpk_rf_setting()
2092 rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT2, 0x3); in _dpk_rf_setting()
2093 rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); in _dpk_rf_setting()
2094 rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); in _dpk_rf_setting()
2096 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) in _dpk_rf_setting()
2097 rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0); in _dpk_rf_setting()
2101 static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_tpg_sel() argument
2105 if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160) { in _dpk_tpg_sel()
2108 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) { in _dpk_tpg_sel()
2111 } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) { in _dpk_tpg_sel()
2119 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_160 ? "160M" : in _dpk_tpg_sel()
2120 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : in _dpk_tpg_sel()
2121 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); in _dpk_tpg_sel()
2124 static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_sync_check() argument
2139 dpk->corr_idx[path][kidx] = corr_idx; in _dpk_sync_check()
2140 dpk->corr_val[path][kidx] = corr_val; in _dpk_sync_check()
2152 path, corr_idx, corr_val, dc_i, dc_q); in _dpk_sync_check()
2154 dpk->dc_i[path][kidx] = dc_i; in _dpk_sync_check()
2155 dpk->dc_q[path][kidx] = dc_q; in _dpk_sync_check()
2165 path, rxbb, in _dpk_sync_check()
2203 static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_kset_query() argument
2207 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10); in _dpk_kset_query()
2209 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), 0xE0000000) - 1; in _dpk_kset_query()
2213 enum rtw89_rf_path path, u8 dbm, bool set_from_bb) in _dpk_kip_set_txagc() argument
2217 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] set S%d txagc to %ddBm\n", path, dbm); in _dpk_kip_set_txagc()
2218 rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_VAL, dbm << 2); in _dpk_kip_set_txagc()
2220 _dpk_one_shot(rtwdev, phy, path, D_TXAGC); in _dpk_kip_set_txagc()
2221 _dpk_kset_query(rtwdev, path); in _dpk_kip_set_txagc()
2225 enum rtw89_rf_path path, u8 kidx) in _dpk_gainloss() argument
2227 _dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS); in _dpk_gainloss()
2228 _dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false); in _dpk_gainloss()
2230 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0x0); in _dpk_gainloss()
2231 rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0); in _dpk_gainloss()
2282 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_set_rxagc() argument
2284 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_kip_set_rxagc()
2286 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_set_rxagc()
2287 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_set_rxagc()
2289 _dpk_one_shot(rtwdev, phy, path, D_RXAGC); in _dpk_kip_set_rxagc()
2291 return _dpk_sync_check(rtwdev, path, kidx); in _dpk_kip_set_rxagc()
2310 static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) in _dpk_bypass_rxiqc() argument
2312 rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); in _dpk_bypass_rxiqc()
2313 rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002); in _dpk_bypass_rxiqc()
2319 enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only) in _dpk_agc() argument
2334 is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx); in _dpk_agc()
2347 _dpk_one_shot(rtwdev, phy, path, D_SYNC); in _dpk_agc()
2352 if (dpk->bp[path][kidx].band == RTW89_BAND_2G) in _dpk_agc()
2353 _dpk_bypass_rxiqc(rtwdev, path); in _dpk_agc()
2355 _dpk_lbk_rxiqk(rtwdev, phy, path); in _dpk_agc()
2361 tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); in _dpk_agc()
2382 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2394 _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); in _dpk_agc()
2401 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_agc()
2402 tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB); in _dpk_agc()
2408 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_M_RXBB, tmp_rxbb); in _dpk_agc()
2411 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_agc()
2449 enum rtw89_rf_path path, u8 kidx) in _dpk_idl_mpa() argument
2464 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_5 || in _dpk_idl_mpa()
2465 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_10 || in _dpk_idl_mpa()
2466 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_20) in _dpk_idl_mpa()
2468 else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 || in _dpk_idl_mpa()
2469 dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) in _dpk_idl_mpa()
2477 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2486 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2493 _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); in _dpk_idl_mpa()
2498 enum rtw89_rf_path path) in _dpk_reload_check() argument
2509 if (cur_band != dpk->bp[path][idx].band || in _dpk_reload_check()
2510 cur_ch != dpk->bp[path][idx].ch) in _dpk_reload_check()
2513 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), in _dpk_reload_check()
2515 dpk->cur_idx[path] = idx; in _dpk_reload_check()
2518 "[DPK] reload S%d[%d] success\n", path, idx); in _dpk_reload_check()
2531 enum rtw89_rf_path path, u8 kidx) in _dpk_kip_preset_8852c() argument
2534 rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); in _dpk_kip_preset_8852c()
2538 R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset_8852c()
2542 R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_kip_preset_8852c()
2545 _dpk_kip_control_rfc(rtwdev, path, true); in _dpk_kip_preset_8852c()
2546 rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_MDPD, kidx); in _dpk_kip_preset_8852c()
2548 _dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET); in _dpk_kip_preset_8852c()
2551 static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) in _dpk_para_query() argument
2558 para = rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_para_query()
2561 dpk->bp[path][kidx].txagc_dpk = FIELD_GET(_DPK_PARA_TXAGC, para); in _dpk_para_query()
2562 dpk->bp[path][kidx].ther_dpk = FIELD_GET(_DPK_PARA_THER, para); in _dpk_para_query()
2565 dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, dpk->bp[path][kidx].txagc_dpk); in _dpk_para_query()
2569 enum rtw89_rf_path path, u8 kidx, bool is_execute) in _dpk_gain_normalize_8852c() argument
2574 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_AG, 0x200); in _dpk_gain_normalize_8852c()
2575 rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), B_DPK_GN_EN, 0x3); in _dpk_gain_normalize_8852c()
2577 _dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM); in _dpk_gain_normalize_8852c()
2579 rtw89_phy_write32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_gain_normalize_8852c()
2582 dpk->bp[path][kidx].gs = in _dpk_gain_normalize_8852c()
2583 rtw89_phy_read32_mask(rtwdev, dpk_par_regs[kidx][dpk->cur_k_set] + (path << 8), in _dpk_gain_normalize_8852c()
2616 enum rtw89_rf_path path, u8 kidx) in _dpk_on() argument
2620 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); in _dpk_on()
2621 rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); in _dpk_on()
2622 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2625 dpk->bp[path][kidx].mdpd_en = BIT(dpk->cur_k_set); in _dpk_on()
2626 dpk->bp[path][kidx].path_ok = true; in _dpk_on()
2629 path, kidx, dpk->bp[path][kidx].mdpd_en); in _dpk_on()
2631 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_on()
2632 B_DPD_MEN, dpk->bp[path][kidx].mdpd_en); in _dpk_on()
2634 _dpk_gain_normalize_8852c(rtwdev, phy, path, kidx, false); in _dpk_on()
2638 enum rtw89_rf_path path, u8 gain) in _dpk_main() argument
2641 u8 kidx = dpk->cur_idx[path]; in _dpk_main()
2646 "[DPK] ========= S%d[%d] DPK Start =========\n", path, kidx); in _dpk_main()
2647 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2648 _rf_direct_cntrl(rtwdev, path, false); in _dpk_main()
2649 rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd); in _dpk_main()
2650 _dpk_rf_setting(rtwdev, gain, path, kidx); in _dpk_main()
2651 _set_rx_dck(rtwdev, phy, path, false); in _dpk_main()
2653 _dpk_kip_preset_8852c(rtwdev, phy, path, kidx); in _dpk_main()
2654 _dpk_txpwr_bb_force(rtwdev, path, true); in _dpk_main()
2655 _dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true); in _dpk_main()
2656 _dpk_tpg_sel(rtwdev, path, kidx); in _dpk_main()
2658 is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false); in _dpk_main()
2662 _dpk_idl_mpa(rtwdev, phy, path, kidx); in _dpk_main()
2663 _dpk_para_query(rtwdev, path, kidx); in _dpk_main()
2664 _dpk_on(rtwdev, phy, path, kidx); in _dpk_main()
2667 _dpk_kip_control_rfc(rtwdev, path, false); in _dpk_main()
2668 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); in _dpk_main()
2669 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx, in _dpk_main()
2675 static void _dpk_init(struct rtw89_dev *rtwdev, u8 path) in _dpk_init() argument
2678 u8 kidx = dpk->cur_idx[path]; in _dpk_init()
2680 dpk->bp[path][kidx].path_ok = false; in _dpk_init()
2683 static void _dpk_drf_direct_cntrl(struct rtw89_dev *rtwdev, u8 path, bool is_bybb) in _dpk_drf_direct_cntrl() argument
2686 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); in _dpk_drf_direct_cntrl()
2688 rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); in _dpk_drf_direct_cntrl()
2698 u8 path; in _dpk_cal_select() local
2704 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2705 if (!(kpath & BIT(path))) in _dpk_cal_select()
2708 reloaded[path] = _dpk_reload_check(rtwdev, phy, path); in _dpk_cal_select()
2709 if (!reloaded[path] && dpk->bp[path][0].ch != 0) in _dpk_cal_select()
2710 dpk->cur_idx[path] = !dpk->cur_idx[path]; in _dpk_cal_select()
2712 _dpk_onoff(rtwdev, path, false); in _dpk_cal_select()
2715 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in _dpk_cal_select()
2716 dpk->cur_idx[path] = 0; in _dpk_cal_select()
2719 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2722 path, dpk->cur_idx[path]); in _dpk_cal_select()
2723 _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2724 _rfk_backup_rf_reg(rtwdev, backup_rf_val[path], path); in _dpk_cal_select()
2725 _dpk_information(rtwdev, phy, path); in _dpk_cal_select()
2726 _dpk_init(rtwdev, path); in _dpk_cal_select()
2727 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2728 _dpk_tssi_pause(rtwdev, path, true); in _dpk_cal_select()
2731 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2734 path, dpk->cur_idx[path]); in _dpk_cal_select()
2735 rtw8852c_disable_rxagc(rtwdev, path, 0x0); in _dpk_cal_select()
2736 _dpk_drf_direct_cntrl(rtwdev, path, false); in _dpk_cal_select()
2737 _dpk_bb_afe_setting(rtwdev, phy, path, kpath); in _dpk_cal_select()
2738 is_fail = _dpk_main(rtwdev, phy, path, 1); in _dpk_cal_select()
2739 _dpk_onoff(rtwdev, path, is_fail); in _dpk_cal_select()
2742 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_cal_select()
2745 path, dpk->cur_idx[path]); in _dpk_cal_select()
2746 _dpk_kip_restore(rtwdev, phy, path); in _dpk_cal_select()
2747 _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); in _dpk_cal_select()
2748 _rfk_restore_rf_reg(rtwdev, backup_rf_val[path], path); in _dpk_cal_select()
2749 _dpk_bb_afe_restore(rtwdev, path); in _dpk_cal_select()
2750 rtw8852c_disable_rxagc(rtwdev, path, 0x1); in _dpk_cal_select()
2751 if (rtwdev->is_tssi_mode[path]) in _dpk_cal_select()
2752 _dpk_tssi_pause(rtwdev, path, false); in _dpk_cal_select()
2783 u8 path, kpath; in _dpk_force_bypass() local
2787 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_force_bypass()
2788 if (kpath & BIT(path)) in _dpk_force_bypass()
2789 _dpk_onoff(rtwdev, path, true); in _dpk_force_bypass()
2810 enum rtw89_rf_path path, bool off) in _dpk_onoff() argument
2813 u8 val, kidx = dpk->cur_idx[path]; in _dpk_onoff()
2815 val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok ? in _dpk_onoff()
2816 dpk->bp[path][kidx].mdpd_en : 0; in _dpk_onoff()
2818 rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), in _dpk_onoff()
2821 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, in _dpk_onoff()
2828 u8 path, kidx; in _dpk_track() local
2835 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { in _dpk_track()
2836 kidx = dpk->cur_idx[path]; in _dpk_track()
2839 path, kidx, dpk->bp[path][kidx].ch); in _dpk_track()
2842 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), 0x0000003f); in _dpk_track()
2844 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), MASKBYTE2); in _dpk_track()
2846 rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), B_TXAGC_BTP); in _dpk_track()
2849 rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0xf); in _dpk_track()
2851 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TH); in _dpk_track()
2853 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_OF); in _dpk_track()
2855 rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_TSSI); in _dpk_track()
2858 cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _dpk_track()
2863 if (dpk->bp[path][kidx].ch != 0 && cur_ther != 0) in _dpk_track()
2864 delta_ther = dpk->bp[path][kidx].ther_dpk - cur_ther; in _dpk_track()
2870 delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk); in _dpk_track()
2873 txagc_rf - dpk->bp[path][kidx].txagc_dpk, txagc_rf, in _dpk_track()
2874 dpk->bp[path][kidx].txagc_dpk); in _dpk_track()
2887 rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), in _dpk_track()
2894 enum rtw89_rf_path path) in _tssi_set_sys() argument
2915 if (path == RF_PATH_A) { in _tssi_set_sys()
2931 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb() argument
2933 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb()
2940 enum rtw89_rf_path path) in _tssi_ini_txpwr_ctrl_bb_he_tb() argument
2942 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_ini_txpwr_ctrl_bb_he_tb()
2948 enum rtw89_rf_path path) in _tssi_set_dck() argument
2953 if (path == RF_PATH_A) { in _tssi_set_dck()
2967 enum rtw89_rf_path path) in _tssi_set_bbgain_split() argument
2969 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_bbgain_split()
2975 enum rtw89_rf_path path) in _tssi_set_tmeter_tbl() argument
3057 if (path == RF_PATH_A) { in _tssi_set_tmeter_tbl()
3161 enum rtw89_rf_path path) in _tssi_slope_cal_org() argument
3166 if (path == RF_PATH_A) { in _tssi_slope_cal_org()
3178 enum rtw89_rf_path path) in _tssi_set_aligk_default() argument
3184 if (path == RF_PATH_A) { in _tssi_set_aligk_default()
3204 enum rtw89_rf_path path) in _tssi_set_slope() argument
3206 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_slope()
3212 enum rtw89_rf_path path) in _tssi_run_slope() argument
3214 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_run_slope()
3220 enum rtw89_rf_path path) in _tssi_set_track() argument
3222 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_track()
3229 enum rtw89_rf_path path) in _tssi_set_txagc_offset_mv_avg() argument
3231 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, in _tssi_set_txagc_offset_mv_avg()
3239 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_enable() local
3243 path = RF_PATH_A; in _tssi_enable()
3246 path = RF_PATH_B; in _tssi_enable()
3251 for (i = path; i < path_max; i++) { in _tssi_enable()
3267 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_disable() local
3271 path = RF_PATH_A; in _tssi_disable()
3274 path = RF_PATH_B; in _tssi_disable()
3279 for (i = path; i < path_max; i++) { in _tssi_disable()
3589 enum rtw89_rf_path path) in _tssi_get_ofdm_de() argument
3604 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", in _tssi_get_ofdm_de()
3605 path, gidx); in _tssi_get_ofdm_de()
3610 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3611 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3615 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3616 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3618 val = tssi_info->tssi_mcs[path][gidx]; in _tssi_get_ofdm_de()
3621 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3627 "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", in _tssi_get_ofdm_de()
3628 path, gidx); in _tssi_get_ofdm_de()
3633 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in _tssi_get_ofdm_de()
3634 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in _tssi_get_ofdm_de()
3638 "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_de()
3639 path, val, de_1st, de_2nd); in _tssi_get_ofdm_de()
3641 val = tssi_info->tssi_6g_mcs[path][gidx]; in _tssi_get_ofdm_de()
3644 "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); in _tssi_get_ofdm_de()
3653 enum rtw89_rf_path path) in _tssi_get_ofdm_trim_de() argument
3668 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3669 path, tgidx); in _tssi_get_ofdm_trim_de()
3674 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3675 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3679 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3680 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3682 val = tssi_info->tssi_trim[path][tgidx]; in _tssi_get_ofdm_trim_de()
3685 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3686 path, val); in _tssi_get_ofdm_trim_de()
3692 "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", in _tssi_get_ofdm_trim_de()
3693 path, tgidx); in _tssi_get_ofdm_trim_de()
3698 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in _tssi_get_ofdm_trim_de()
3699 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in _tssi_get_ofdm_trim_de()
3703 "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", in _tssi_get_ofdm_trim_de()
3704 path, val, tde_1st, tde_2nd); in _tssi_get_ofdm_trim_de()
3706 val = tssi_info->tssi_trim_6g[path][tgidx]; in _tssi_get_ofdm_trim_de()
3709 "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", in _tssi_get_ofdm_trim_de()
3710 path, val); in _tssi_get_ofdm_trim_de()
3727 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in _tssi_set_efuse_to_de() local
3734 path = RF_PATH_A; in _tssi_set_efuse_to_de()
3737 path = RF_PATH_B; in _tssi_set_efuse_to_de()
3742 for (i = path; i < path_max; i++) { in _tssi_set_efuse_to_de()
3748 "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3765 "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", in _tssi_set_efuse_to_de()
3784 enum rtw89_rf_path path) in rtw8852c_tssi_cont_en() argument
3790 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x0); in rtw8852c_tssi_cont_en()
3791 rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x0); in rtw8852c_tssi_cont_en()
3792 if (rtwdev->dbcc_en && path == RF_PATH_B) in rtw8852c_tssi_cont_en()
3797 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], BIT(30), 0x1); in rtw8852c_tssi_cont_en()
3798 rtw89_phy_write32_mask(rtwdev, tssi_en[path], BIT(31), 0x1); in rtw8852c_tssi_cont_en()
3815 static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _bw_setting() argument
3827 rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK); in _bw_setting()
3835 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3); in _bw_setting()
3836 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf); in _bw_setting()
3840 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x3); in _bw_setting()
3841 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xf); in _bw_setting()
3845 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x2); in _bw_setting()
3846 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xd); in _bw_setting()
3850 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1); in _bw_setting()
3851 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb); in _bw_setting()
3857 rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18); in _bw_setting()
3864 u8 kpath, path; in _ctrl_bw() local
3870 for (path = 0; path < 2; path++) { in _ctrl_bw()
3871 if (!(kpath & BIT(path))) in _ctrl_bw()
3875 _bw_setting(rtwdev, path, bw, is_dav); in _ctrl_bw()
3877 _bw_setting(rtwdev, path, bw, is_dav); in _ctrl_bw()
3881 if (path == RF_PATH_B && rtwdev->hal.cv == CHIP_CAV) { in _ctrl_bw()
3892 static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, in _ch_setting() argument
3904 rf_reg18 = rtw89_read_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK); in _ch_setting()
3924 rtw89_write_rf(rtwdev, path, reg_reg18_addr, RFREG_MASK, rf_reg18); in _ch_setting()
3931 u8 kpath, path; in _ctrl_ch() local
3946 for (path = 0; path < 2; path++) { in _ctrl_ch()
3947 if (kpath & BIT(path)) { in _ctrl_ch()
3948 _ch_setting(rtwdev, path, central_ch, band, true); in _ctrl_ch()
3949 _ch_setting(rtwdev, path, central_ch, band, false); in _ctrl_ch()
3958 u8 path; in _rxbb_bw() local
3962 for (path = 0; path < 2; path++) { in _rxbb_bw()
3963 if (!(kpath & BIT(path))) in _rxbb_bw()
3966 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); in _rxbb_bw()
3967 rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0xa); in _rxbb_bw()
3983 rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, val); in _rxbb_bw()
3984 rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); in _rxbb_bw()
3991 int path; in _lck_keep_thermal() local
3993 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in _lck_keep_thermal()
3994 lck->thermal[path] = in _lck_keep_thermal()
3995 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _lck_keep_thermal()
3997 "[LCK] path=%d thermal=0x%x", path, lck->thermal[path]); in _lck_keep_thermal()
4004 int path = rtwdev->dbcc_en ? 2 : 1; in _lck() local
4012 for (i = 0; i < path; i++) { in _lck()
4028 int path; in rtw8852c_lck_track() local
4030 for (path = 0; path < rtwdev->chip->rf_path_num; path++) { in rtw8852c_lck_track()
4032 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_lck_track()
4033 delta = abs((int)cur_thermal - lck->thermal[path]); in rtw8852c_lck_track()
4036 "[LCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8852c_lck_track()
4037 path, cur_thermal, delta); in rtw8852c_lck_track()
4123 u8 path; in rtw8852c_rck() local
4125 for (path = 0; path < 2; path++) in rtw8852c_rck()
4126 _rck(rtwdev, path); in rtw8852c_rck()
4160 u8 path, kpath; in _rx_dck() local
4170 for (path = 0; path < 2; path++) { in _rx_dck()
4171 rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); in _rx_dck()
4172 if (!(kpath & BIT(path))) in _rx_dck()
4175 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
4176 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _rx_dck()
4178 rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); in _rx_dck()
4179 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); in _rx_dck()
4180 rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_LO_SEL, rtwdev->dbcc_en); in _rx_dck()
4183 _set_rx_dck(rtwdev, phy, path, is_afe); in _rx_dck()
4189 _rx_dck_recover(rtwdev, path); in _rx_dck()
4193 is_fail = _rx_dck_rek_check(rtwdev, path); in _rx_dck()
4199 path, rek_cnt); in _rx_dck()
4201 rx_dck->thermal[path] = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in _rx_dck()
4202 rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); in _rx_dck()
4204 if (rtwdev->is_tssi_mode[path]) in _rx_dck()
4205 rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), in _rx_dck()
4227 int path; in rtw8852c_rx_dck_track() local
4235 for (path = 0; path < RF_PATH_NUM_8852C; path++) { in rtw8852c_rx_dck_track()
4237 ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); in rtw8852c_rx_dck_track()
4238 delta = abs((int)cur_thermal - rx_dck->thermal[path]); in rtw8852c_rx_dck_track()
4241 "[RX_DCK] path=%d current thermal=0x%x delta=0x%x\n", in rtw8852c_rx_dck_track()
4242 path, cur_thermal, delta); in rtw8852c_rx_dck_track()
4254 for (path = 0; path < RF_PATH_NUM_8852C; path++) { in rtw8852c_rx_dck_track()
4261 for (path = 0; path < RF_PATH_NUM_8852C; path++) in rtw8852c_rx_dck_track()
4298 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in rtw8852c_tssi() local
4304 path = RF_PATH_A; in rtw8852c_tssi()
4307 path = RF_PATH_B; in rtw8852c_tssi()
4314 for (i = path; i < path_max; i++) { in rtw8852c_tssi()
4333 u32 i, path = RF_PATH_A, path_max = RF_PATH_NUM_8852C; in rtw8852c_tssi_scan() local
4345 path = RF_PATH_A; in rtw8852c_tssi_scan()
4348 path = RF_PATH_B; in rtw8852c_tssi_scan()
4355 for (i = path; i < path_max; i++) { in rtw8852c_tssi_scan()
4427 u8 path; in rtw8852c_rfk_chanctx_cb() local
4432 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in rtw8852c_rfk_chanctx_cb()
4433 _dpk_onoff(rtwdev, path, false); in rtw8852c_rfk_chanctx_cb()
4437 for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) in rtw8852c_rfk_chanctx_cb()
4438 _dpk_onoff(rtwdev, path, false); in rtw8852c_rfk_chanctx_cb()