Lines Matching +full:ignore +full:- +full:power +full:- +full:on +full:- +full:sel
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
41 u32 val, enum rtw89_mac_mem_sel sel) in rtw89_mac_mem_write() argument
43 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_write()
44 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_write()
46 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_write()
47 rtw89_write32(rtwdev, mac->indir_access_addr, val); in rtw89_mac_mem_write()
51 enum rtw89_mac_mem_sel sel) in rtw89_mac_mem_read() argument
53 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_read()
54 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_read()
56 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_read()
57 return rtw89_read32(rtwdev, mac->indir_access_addr); in rtw89_mac_mem_read()
61 enum rtw89_mac_hwmod_sel sel) in rtw89_mac_check_mac_en_ax() argument
65 if (sel == RTW89_DMAC_SEL) { in rtw89_mac_check_mac_en_ax()
68 } else if (sel == RTW89_CMAC_SEL && mac_idx == 0) { in rtw89_mac_check_mac_en_ax()
71 } else if (sel == RTW89_CMAC_SEL && mac_idx == 1) { in rtw89_mac_check_mac_en_ax()
75 return -EINVAL; in rtw89_mac_check_mac_en_ax()
79 return -EFAULT; in rtw89_mac_check_mac_en_ax()
122 switch (ctrl->type) { in rtw89_mac_dle_dfi_cfg()
126 ctrl_data = FIELD_PREP(B_AX_WDE_DFI_TRGSEL_MASK, ctrl->target) | in rtw89_mac_dle_dfi_cfg()
127 FIELD_PREP(B_AX_WDE_DFI_ADDR_MASK, ctrl->addr) | in rtw89_mac_dle_dfi_cfg()
133 ctrl_data = FIELD_PREP(B_AX_PLE_DFI_TRGSEL_MASK, ctrl->target) | in rtw89_mac_dle_dfi_cfg()
134 FIELD_PREP(B_AX_PLE_DFI_ADDR_MASK, ctrl->addr) | in rtw89_mac_dle_dfi_cfg()
138 rtw89_warn(rtwdev, "[ERR] dfi ctrl type %d\n", ctrl->type); in rtw89_mac_dle_dfi_cfg()
139 return -EINVAL; in rtw89_mac_dle_dfi_cfg()
152 ctrl->out_data = rtw89_read32(rtwdev, data_reg); in rtw89_mac_dle_dfi_cfg()
162 ctrl.type = quota->dle_type; in rtw89_mac_dle_dfi_quota_cfg()
164 ctrl.addr = quota->qtaid; in rtw89_mac_dle_dfi_quota_cfg()
171 quota->rsv_pgnum = FIELD_GET(B_AX_DLE_RSV_PGNUM, ctrl.out_data); in rtw89_mac_dle_dfi_quota_cfg()
172 quota->use_pgnum = FIELD_GET(B_AX_DLE_USE_PGNUM, ctrl.out_data); in rtw89_mac_dle_dfi_quota_cfg()
182 ctrl.type = qempty->dle_type; in rtw89_mac_dle_dfi_qempty_cfg()
184 ctrl.addr = qempty->grpsel; in rtw89_mac_dle_dfi_qempty_cfg()
191 qempty->qempty = FIELD_GET(B_AX_DLE_QEMPTY_GRP, ctrl.out_data); in rtw89_mac_dle_dfi_qempty_cfg()
305 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dump_l0_to_l1()
314 mac->dump_qta_lost(rtwdev); in rtw89_mac_dump_l0_to_l1()
323 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_dump_dmac_err_status()
343 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
360 if (chip->chip_id == RTL8852C) in rtw89_mac_dump_dmac_err_status()
369 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
398 rtw89_info(rtwdev, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
401 } else if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
452 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
477 if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
515 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
529 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
555 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
585 if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
610 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
619 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
624 } else if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
659 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_dump_cmac_err_status_ax()
699 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_cmac_err_status_ax()
711 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_cmac_err_status_ax()
730 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_cmac_err_status_ax()
757 rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); in rtw89_mac_dump_err_status_ax()
771 rtwdev->hci.ops->dump_err_status(rtwdev); in rtw89_mac_dump_err_status_ax()
776 rtw89_info(rtwdev, "<---\n"); in rtw89_mac_dump_err_status_ax()
781 struct rtw89_ser *ser = &rtwdev->ser; in rtw89_mac_suppress_log()
785 if (rtwdev->chip->chip_id == RTL8852C) { in rtw89_mac_suppress_log()
797 set_bit(RTW89_SER_SUPPRESS_LOG, ser->flags); in rtw89_mac_suppress_log()
801 if (test_bit(RTW89_SER_SUPPRESS_LOG, ser->flags)) in rtw89_mac_suppress_log()
804 if (test_and_clear_bit(RTW89_SER_SUPPRESS_LOG, ser->flags)) in rtw89_mac_suppress_log()
814 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_get_err_status()
840 mac->dump_err_status(rtwdev, err); in rtw89_mac_get_err_status()
848 struct rtw89_ser *ser = &rtwdev->ser; in rtw89_mac_set_err_status()
853 rtw89_err(rtwdev, "Bad set-err-status value 0x%08x\n", err); in rtw89_mac_set_err_status()
854 return -EINVAL; in rtw89_mac_set_err_status()
861 return -EFAULT; in rtw89_mac_set_err_status()
866 if (ser->prehandle_l1 && in rtw89_mac_set_err_status()
878 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_reset_param()
880 u8 qta_mode = rtwdev->mac.dle_info.qta_mode; in hfc_reset_param()
882 switch (rtwdev->hci.type) { in hfc_reset_param()
884 param_ini = rtwdev->chip->hfc_param_ini[qta_mode]; in hfc_reset_param()
885 param->en = 0; in hfc_reset_param()
888 return -EINVAL; in hfc_reset_param()
892 param->pub_cfg = *param_ini.pub_cfg; in hfc_reset_param()
895 param->prec_cfg = *param_ini.prec_cfg; in hfc_reset_param()
898 param->ch_cfg = param_ini.ch_cfg; in hfc_reset_param()
900 memset(¶m->ch_info, 0, sizeof(param->ch_info)); in hfc_reset_param()
901 memset(¶m->pub_info, 0, sizeof(param->pub_info)); in hfc_reset_param()
902 param->mode = param_ini.mode; in hfc_reset_param()
909 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_ch_cfg_chk()
910 const struct rtw89_hfc_ch_cfg *ch_cfg = param->ch_cfg; in hfc_ch_cfg_chk()
911 const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_ch_cfg_chk()
912 const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_ch_cfg_chk()
915 return -EINVAL; in hfc_ch_cfg_chk()
917 if ((ch_cfg[ch].min && ch_cfg[ch].min < prec_cfg->ch011_prec) || in hfc_ch_cfg_chk()
918 ch_cfg[ch].max > pub_cfg->pub_max) in hfc_ch_cfg_chk()
919 return -EINVAL; in hfc_ch_cfg_chk()
921 return -EINVAL; in hfc_ch_cfg_chk()
928 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_pub_info_chk()
929 const struct rtw89_hfc_pub_cfg *cfg = ¶m->pub_cfg; in hfc_pub_info_chk()
930 struct rtw89_hfc_pub_info *info = ¶m->pub_info; in hfc_pub_info_chk()
932 if (info->g0_used + info->g1_used + info->pub_aval != cfg->pub_max) { in hfc_pub_info_chk()
933 if (rtwdev->chip->chip_id == RTL8852A) in hfc_pub_info_chk()
936 return -EFAULT; in hfc_pub_info_chk()
944 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_pub_cfg_chk()
945 const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_pub_cfg_chk()
947 if (pub_cfg->grp0 + pub_cfg->grp1 != pub_cfg->pub_max) in hfc_pub_cfg_chk()
948 return -EFAULT; in hfc_pub_cfg_chk()
955 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_ch_ctrl()
956 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_ch_ctrl()
957 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_ch_ctrl()
958 const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; in hfc_ch_ctrl()
971 return -EINVAL; in hfc_ch_ctrl()
976 rtw89_write32(rtwdev, regs->ach_page_ctrl + ch * 4, val); in hfc_ch_ctrl()
983 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_upd_ch_info()
984 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_upd_ch_info()
985 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_upd_ch_info()
986 struct rtw89_hfc_ch_info *info = param->ch_info; in hfc_upd_ch_info()
987 const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; in hfc_upd_ch_info()
996 return -EINVAL; in hfc_upd_ch_info()
998 val = rtw89_read32(rtwdev, regs->ach_page_info + ch * 4); in hfc_upd_ch_info()
1003 info[ch].used = cfg[ch].min - info[ch].aval; in hfc_upd_ch_info()
1010 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_pub_ctrl()
1011 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_pub_ctrl()
1012 const struct rtw89_hfc_pub_cfg *cfg = &rtwdev->mac.hfc_param.pub_cfg; in hfc_pub_ctrl()
1024 val = u32_encode_bits(cfg->grp0, B_AX_PUBPG_G0_MASK) | in hfc_pub_ctrl()
1025 u32_encode_bits(cfg->grp1, B_AX_PUBPG_G1_MASK); in hfc_pub_ctrl()
1026 rtw89_write32(rtwdev, regs->pub_page_ctrl1, val); in hfc_pub_ctrl()
1028 val = u32_encode_bits(cfg->wp_thrd, B_AX_WP_THRD_MASK); in hfc_pub_ctrl()
1029 rtw89_write32(rtwdev, regs->wp_page_ctrl2, val); in hfc_pub_ctrl()
1036 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_get_mix_info_ax()
1037 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_get_mix_info_ax()
1038 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_get_mix_info_ax()
1039 struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_get_mix_info_ax()
1040 struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_get_mix_info_ax()
1041 struct rtw89_hfc_pub_info *info = ¶m->pub_info; in hfc_get_mix_info_ax()
1044 val = rtw89_read32(rtwdev, regs->pub_page_info1); in hfc_get_mix_info_ax()
1045 info->g0_used = u32_get_bits(val, B_AX_G0_USE_PG_MASK); in hfc_get_mix_info_ax()
1046 info->g1_used = u32_get_bits(val, B_AX_G1_USE_PG_MASK); in hfc_get_mix_info_ax()
1047 val = rtw89_read32(rtwdev, regs->pub_page_info3); in hfc_get_mix_info_ax()
1048 info->g0_aval = u32_get_bits(val, B_AX_G0_AVAL_PG_MASK); in hfc_get_mix_info_ax()
1049 info->g1_aval = u32_get_bits(val, B_AX_G1_AVAL_PG_MASK); in hfc_get_mix_info_ax()
1050 info->pub_aval = in hfc_get_mix_info_ax()
1051 u32_get_bits(rtw89_read32(rtwdev, regs->pub_page_info2), in hfc_get_mix_info_ax()
1053 info->wp_aval = in hfc_get_mix_info_ax()
1054 u32_get_bits(rtw89_read32(rtwdev, regs->wp_page_info1), in hfc_get_mix_info_ax()
1057 val = rtw89_read32(rtwdev, regs->hci_fc_ctrl); in hfc_get_mix_info_ax()
1058 param->en = val & B_AX_HCI_FC_EN ? 1 : 0; in hfc_get_mix_info_ax()
1059 param->h2c_en = val & B_AX_HCI_FC_CH12_EN ? 1 : 0; in hfc_get_mix_info_ax()
1060 param->mode = u32_get_bits(val, B_AX_HCI_FC_MODE_MASK); in hfc_get_mix_info_ax()
1061 prec_cfg->ch011_full_cond = in hfc_get_mix_info_ax()
1063 prec_cfg->h2c_full_cond = in hfc_get_mix_info_ax()
1065 prec_cfg->wp_ch07_full_cond = in hfc_get_mix_info_ax()
1067 prec_cfg->wp_ch811_full_cond = in hfc_get_mix_info_ax()
1070 val = rtw89_read32(rtwdev, regs->ch_page_ctrl); in hfc_get_mix_info_ax()
1071 prec_cfg->ch011_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH011_MASK); in hfc_get_mix_info_ax()
1072 prec_cfg->h2c_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH12_MASK); in hfc_get_mix_info_ax()
1074 val = rtw89_read32(rtwdev, regs->pub_page_ctrl2); in hfc_get_mix_info_ax()
1075 pub_cfg->pub_max = u32_get_bits(val, B_AX_PUBPG_ALL_MASK); in hfc_get_mix_info_ax()
1077 val = rtw89_read32(rtwdev, regs->wp_page_ctrl1); in hfc_get_mix_info_ax()
1078 prec_cfg->wp_ch07_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH07_MASK); in hfc_get_mix_info_ax()
1079 prec_cfg->wp_ch811_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH811_MASK); in hfc_get_mix_info_ax()
1081 val = rtw89_read32(rtwdev, regs->wp_page_ctrl2); in hfc_get_mix_info_ax()
1082 pub_cfg->wp_thrd = u32_get_bits(val, B_AX_WP_THRD_MASK); in hfc_get_mix_info_ax()
1084 val = rtw89_read32(rtwdev, regs->pub_page_ctrl1); in hfc_get_mix_info_ax()
1085 pub_cfg->grp0 = u32_get_bits(val, B_AX_PUBPG_G0_MASK); in hfc_get_mix_info_ax()
1086 pub_cfg->grp1 = u32_get_bits(val, B_AX_PUBPG_G1_MASK); in hfc_get_mix_info_ax()
1091 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in hfc_upd_mix_info()
1092 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_upd_mix_info()
1099 mac->hfc_get_mix_info(rtwdev); in hfc_upd_mix_info()
1102 if (param->en && ret) in hfc_upd_mix_info()
1110 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_h2c_cfg_ax()
1111 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_h2c_cfg_ax()
1112 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_h2c_cfg_ax()
1113 const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_h2c_cfg_ax()
1116 val = u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); in hfc_h2c_cfg_ax()
1117 rtw89_write32(rtwdev, regs->ch_page_ctrl, val); in hfc_h2c_cfg_ax()
1119 rtw89_write32_mask(rtwdev, regs->hci_fc_ctrl, in hfc_h2c_cfg_ax()
1121 prec_cfg->h2c_full_cond); in hfc_h2c_cfg_ax()
1126 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_mix_cfg_ax()
1127 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_mix_cfg_ax()
1128 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_mix_cfg_ax()
1129 const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_mix_cfg_ax()
1130 const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_mix_cfg_ax()
1133 val = u32_encode_bits(prec_cfg->ch011_prec, B_AX_PREC_PAGE_CH011_MASK) | in hfc_mix_cfg_ax()
1134 u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); in hfc_mix_cfg_ax()
1135 rtw89_write32(rtwdev, regs->ch_page_ctrl, val); in hfc_mix_cfg_ax()
1137 val = u32_encode_bits(pub_cfg->pub_max, B_AX_PUBPG_ALL_MASK); in hfc_mix_cfg_ax()
1138 rtw89_write32(rtwdev, regs->pub_page_ctrl2, val); in hfc_mix_cfg_ax()
1140 val = u32_encode_bits(prec_cfg->wp_ch07_prec, in hfc_mix_cfg_ax()
1142 u32_encode_bits(prec_cfg->wp_ch811_prec, in hfc_mix_cfg_ax()
1144 rtw89_write32(rtwdev, regs->wp_page_ctrl1, val); in hfc_mix_cfg_ax()
1146 val = u32_replace_bits(rtw89_read32(rtwdev, regs->hci_fc_ctrl), in hfc_mix_cfg_ax()
1147 param->mode, B_AX_HCI_FC_MODE_MASK); in hfc_mix_cfg_ax()
1148 val = u32_replace_bits(val, prec_cfg->ch011_full_cond, in hfc_mix_cfg_ax()
1150 val = u32_replace_bits(val, prec_cfg->h2c_full_cond, in hfc_mix_cfg_ax()
1152 val = u32_replace_bits(val, prec_cfg->wp_ch07_full_cond, in hfc_mix_cfg_ax()
1154 val = u32_replace_bits(val, prec_cfg->wp_ch811_full_cond, in hfc_mix_cfg_ax()
1156 rtw89_write32(rtwdev, regs->hci_fc_ctrl, val); in hfc_mix_cfg_ax()
1161 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_func_en_ax()
1162 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_func_en_ax()
1163 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_func_en_ax()
1166 val = rtw89_read32(rtwdev, regs->hci_fc_ctrl); in hfc_func_en_ax()
1167 param->en = en; in hfc_func_en_ax()
1168 param->h2c_en = h2c_en; in hfc_func_en_ax()
1172 rtw89_write32(rtwdev, regs->hci_fc_ctrl, val); in hfc_func_en_ax()
1177 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_hfc_init()
1178 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_hfc_init()
1179 u32 dma_ch_mask = chip->dma_ch_mask; in rtw89_mac_hfc_init()
1192 mac->hfc_func_en(rtwdev, false, false); in rtw89_mac_hfc_init()
1195 mac->hfc_h2c_cfg(rtwdev); in rtw89_mac_hfc_init()
1196 mac->hfc_func_en(rtwdev, en, h2c_en); in rtw89_mac_hfc_init()
1212 mac->hfc_mix_cfg(rtwdev); in rtw89_mac_hfc_init()
1214 mac->hfc_func_en(rtwdev, en, h2c_en); in rtw89_mac_hfc_init()
1235 u32 addr = cfg->base == PWR_INTF_MSK_SDIO ? in pwr_cmd_poll()
1236 cfg->addr | SDIO_LOCAL_BASE_ADDR : cfg->addr; in pwr_cmd_poll()
1238 ret = read_poll_timeout(rtw89_read8, val, !((val ^ cfg->val) & cfg->msk), in pwr_cmd_poll()
1245 rtw89_warn(rtwdev, "[ERR] addr: %X, %X\n", addr, cfg->addr); in pwr_cmd_poll()
1246 rtw89_warn(rtwdev, "[ERR] val: %X, %X\n", val, cfg->val); in pwr_cmd_poll()
1248 return -EBUSY; in pwr_cmd_poll()
1258 for (cur_cfg = cfg; cur_cfg->cmd != PWR_CMD_END; cur_cfg++) { in rtw89_mac_sub_pwr_seq()
1259 if (!(cur_cfg->intf_msk & intf_msk) || in rtw89_mac_sub_pwr_seq()
1260 !(cur_cfg->cv_msk & cv_msk)) in rtw89_mac_sub_pwr_seq()
1263 switch (cur_cfg->cmd) { in rtw89_mac_sub_pwr_seq()
1265 addr = cur_cfg->addr; in rtw89_mac_sub_pwr_seq()
1267 if (cur_cfg->base == PWR_BASE_SDIO) in rtw89_mac_sub_pwr_seq()
1271 val &= ~(cur_cfg->msk); in rtw89_mac_sub_pwr_seq()
1272 val |= (cur_cfg->val & cur_cfg->msk); in rtw89_mac_sub_pwr_seq()
1278 return -EBUSY; in rtw89_mac_sub_pwr_seq()
1281 if (cur_cfg->val == PWR_DELAY_US) in rtw89_mac_sub_pwr_seq()
1282 udelay(cur_cfg->addr); in rtw89_mac_sub_pwr_seq()
1284 fsleep(cur_cfg->addr * 1000); in rtw89_mac_sub_pwr_seq()
1287 return -EINVAL; in rtw89_mac_sub_pwr_seq()
1300 ret = rtw89_mac_sub_pwr_seq(rtwdev, BIT(rtwdev->hal.cv), in rtw89_mac_pwr_seq()
1303 return -EBUSY; in rtw89_mac_pwr_seq()
1314 switch (rtwdev->ps_mode) { in rtw89_mac_get_req_pwr_state()
1337 spin_lock_bh(&rtwdev->rpwm_lock); in rtw89_mac_send_rpwm()
1346 rtwdev->mac.rpwm_seq_num = (rtwdev->mac.rpwm_seq_num + 1) & in rtw89_mac_send_rpwm()
1349 rtwdev->mac.rpwm_seq_num); in rtw89_mac_send_rpwm()
1354 rtw89_write16(rtwdev, rtwdev->hci.rpwm_addr, request); in rtw89_mac_send_rpwm()
1356 spin_unlock_bh(&rtwdev->rpwm_lock); in rtw89_mac_send_rpwm()
1380 return -EPERM; in rtw89_mac_check_cpwm_state()
1385 rpwm_req_num = rtwdev->mac.rpwm_seq_num; in rtw89_mac_check_cpwm_state()
1386 cpwm_rsp_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, in rtw89_mac_check_cpwm_state()
1390 return -EPERM; in rtw89_mac_check_cpwm_state()
1392 rtwdev->mac.cpwm_seq_num = (rtwdev->mac.cpwm_seq_num + 1) & in rtw89_mac_check_cpwm_state()
1395 cpwm_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_SEQ_NUM); in rtw89_mac_check_cpwm_state()
1396 if (cpwm_seq != rtwdev->mac.cpwm_seq_num) in rtw89_mac_check_cpwm_state()
1397 return -EPERM; in rtw89_mac_check_cpwm_state()
1399 cpwm_status = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_STATE); in rtw89_mac_check_cpwm_state()
1401 return -EPERM; in rtw89_mac_check_cpwm_state()
1426 if (i == RPWM_TRY_CNT - 1) in rtw89_mac_power_mode_change()
1444 static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on) in rtw89_mac_power_switch() argument
1447 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_power_switch()
1453 if (on) { in rtw89_mac_power_switch()
1454 cfg_seq = chip->pwr_on_seq; in rtw89_mac_power_switch()
1455 cfg_func = chip->ops->pwr_on_func; in rtw89_mac_power_switch()
1457 cfg_seq = chip->pwr_off_seq; in rtw89_mac_power_switch()
1458 cfg_func = chip->ops->pwr_off_func; in rtw89_mac_power_switch()
1461 if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) in rtw89_mac_power_switch()
1465 if (on && val == PWR_ACT) { in rtw89_mac_power_switch()
1466 rtw89_err(rtwdev, "MAC has already powered on\n"); in rtw89_mac_power_switch()
1467 return -EBUSY; in rtw89_mac_power_switch()
1474 if (on) { in rtw89_mac_power_switch()
1475 set_bit(RTW89_FLAG_POWERON, rtwdev->flags); in rtw89_mac_power_switch()
1476 set_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1477 set_bit(RTW89_FLAG_CMAC0_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1480 clear_bit(RTW89_FLAG_POWERON, rtwdev->flags); in rtw89_mac_power_switch()
1481 clear_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1482 clear_bit(RTW89_FLAG_CMAC0_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1483 clear_bit(RTW89_FLAG_CMAC1_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1484 clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); in rtw89_mac_power_switch()
1546 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in dmac_func_en_ax()
1578 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in chip_func_en_ax()
1690 struct rtw89_mac_info *mac = &rtwdev->mac; in get_dle_mem_cfg()
1693 cfg = &rtwdev->chip->dle_mem[mode]; in get_dle_mem_cfg()
1697 if (cfg->mode != mode) { in get_dle_mem_cfg()
1702 mac->dle_info.rsvd_qt = cfg->rsvd_qt; in get_dle_mem_cfg()
1703 mac->dle_info.ple_pg_size = cfg->ple_size->pge_size; in get_dle_mem_cfg()
1704 mac->dle_info.ple_free_pg = cfg->ple_size->lnk_pge_num; in get_dle_mem_cfg()
1705 mac->dle_info.qta_mode = mode; in get_dle_mem_cfg()
1706 mac->dle_info.c0_rx_qta = cfg->ple_min_qt->cma0_dma; in get_dle_mem_cfg()
1707 mac->dle_info.c1_rx_qta = cfg->ple_min_qt->cma1_dma; in get_dle_mem_cfg()
1716 struct rtw89_dle_info *dle_info = &rtwdev->mac.dle_info; in rtw89_mac_get_dle_rsvd_qt_cfg()
1717 const struct rtw89_rsvd_quota *rsvd_qt = dle_info->rsvd_qt; in rtw89_mac_get_dle_rsvd_qt_cfg()
1721 cfg->pktid = dle_info->ple_free_pg; in rtw89_mac_get_dle_rsvd_qt_cfg()
1722 cfg->pg_num = rsvd_qt->mpdu_info_tbl; in rtw89_mac_get_dle_rsvd_qt_cfg()
1725 cfg->pktid = dle_info->ple_free_pg + rsvd_qt->mpdu_info_tbl; in rtw89_mac_get_dle_rsvd_qt_cfg()
1726 cfg->pg_num = rsvd_qt->b0_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1729 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1730 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1731 cfg->pg_num = rsvd_qt->b1_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1734 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1735 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1736 cfg->pg_num = rsvd_qt->b0_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1739 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1740 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi + in rtw89_mac_get_dle_rsvd_qt_cfg()
1741 rsvd_qt->b0_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1742 cfg->pg_num = rsvd_qt->b1_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1745 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1746 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi + in rtw89_mac_get_dle_rsvd_qt_cfg()
1747 rsvd_qt->b0_lmr + rsvd_qt->b1_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1748 cfg->pg_num = rsvd_qt->b0_ftm; in rtw89_mac_get_dle_rsvd_qt_cfg()
1751 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1752 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi + in rtw89_mac_get_dle_rsvd_qt_cfg()
1753 rsvd_qt->b0_lmr + rsvd_qt->b1_lmr + rsvd_qt->b0_ftm; in rtw89_mac_get_dle_rsvd_qt_cfg()
1754 cfg->pg_num = rsvd_qt->b1_ftm; in rtw89_mac_get_dle_rsvd_qt_cfg()
1757 return -EINVAL; in rtw89_mac_get_dle_rsvd_qt_cfg()
1760 cfg->size = (u32)cfg->pg_num * dle_info->ple_pg_size; in rtw89_mac_get_dle_rsvd_qt_cfg()
1771 grpnum = rtwdev->chip->wde_qempty_acq_grpnum; in mac_is_txq_empty_ax()
1790 qempty.grpsel = rtwdev->chip->wde_qempty_mgq_grpsel; in mac_is_txq_empty_ax()
1800 if (rtwdev->dbcc_en) { in mac_is_txq_empty_ax()
1821 const struct rtw89_dle_size *wde = cfg->wde_size; in dle_used_size()
1822 const struct rtw89_dle_size *ple = cfg->ple_size; in dle_used_size()
1825 used = wde->pge_size * (wde->lnk_pge_num + wde->unlnk_pge_num) + in dle_used_size()
1826 ple->pge_size * (ple->lnk_pge_num + ple->unlnk_pge_num); in dle_used_size()
1828 if (cfg->rsvd0_size && cfg->rsvd1_size) { in dle_used_size()
1829 used += cfg->rsvd0_size->size; in dle_used_size()
1830 used += cfg->rsvd1_size->size; in dle_used_size()
1839 u32 size = rtwdev->chip->fifo_size; in dle_expected_used_size()
1842 size -= rtwdev->chip->dle_scc_rsvd_size; in dle_expected_used_size()
1862 if (rtwdev->chip->chip_id == RTL8851B) in dle_clk_en_ax()
1877 size_cfg = cfg->wde_size; in dle_mix_cfg_ax()
1879 switch (size_cfg->pge_size) { in dle_mix_cfg_ax()
1891 return -EINVAL; in dle_mix_cfg_ax()
1895 val = u32_replace_bits(val, size_cfg->lnk_pge_num, in dle_mix_cfg_ax()
1900 bound = (size_cfg->lnk_pge_num + size_cfg->unlnk_pge_num) in dle_mix_cfg_ax()
1901 * size_cfg->pge_size / DLE_BOUND_UNIT; in dle_mix_cfg_ax()
1902 size_cfg = cfg->ple_size; in dle_mix_cfg_ax()
1904 switch (size_cfg->pge_size) { in dle_mix_cfg_ax()
1908 return -EINVAL; in dle_mix_cfg_ax()
1920 val = u32_replace_bits(val, size_cfg->lnk_pge_num, in dle_mix_cfg_ax()
1954 SET_QUOTA_VAL(min_cfg->_x, max_cfg->_x, _module, _idx)
1962 ext_wde_min_qt_wcpu : min_cfg->wcpu; in wde_quota_cfg_ax()
1966 SET_QUOTA_VAL(min_qt_wcpu, max_cfg->wcpu, WDE, 1); in wde_quota_cfg_ax()
1988 if (rtwdev->chip->chip_id == RTL8852C) in ple_quota_cfg_ax()
1998 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_mac_resize_ple_rx_quota()
2001 if (rtwdev->mac.qta_mode != RTW89_QTA_SCC) { in rtw89_mac_resize_ple_rx_quota()
2003 return -EINVAL; in rtw89_mac_resize_ple_rx_quota()
2012 return -EINVAL; in rtw89_mac_resize_ple_rx_quota()
2015 min_cfg = cfg->ple_min_qt; in rtw89_mac_resize_ple_rx_quota()
2016 max_cfg = cfg->ple_max_qt; in rtw89_mac_resize_ple_rx_quota()
2038 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in dle_quota_cfg()
2040 mac->wde_quota_cfg(rtwdev, cfg->wde_min_qt, cfg->wde_max_qt, ext_wde_min_qt_wcpu); in dle_quota_cfg()
2041 mac->ple_quota_cfg(rtwdev, cfg->ple_min_qt, cfg->ple_max_qt); in dle_quota_cfg()
2047 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dle_init()
2059 ret = -EINVAL; in rtw89_mac_dle_init()
2068 ret = -EINVAL; in rtw89_mac_dle_init()
2071 ext_wde_min_qt_wcpu = ext_cfg->wde_min_qt->wcpu; in rtw89_mac_dle_init()
2076 ret = -EINVAL; in rtw89_mac_dle_init()
2080 mac->dle_func_en(rtwdev, false); in rtw89_mac_dle_init()
2081 mac->dle_clk_en(rtwdev, true); in rtw89_mac_dle_init()
2083 ret = mac->dle_mix_cfg(rtwdev, cfg); in rtw89_mac_dle_init()
2090 mac->dle_func_en(rtwdev, true); in rtw89_mac_dle_init()
2092 ret = mac->chk_dle_rdy(rtwdev, true); in rtw89_mac_dle_init()
2098 ret = mac->chk_dle_rdy(rtwdev, false); in rtw89_mac_dle_init()
2106 mac->dle_func_en(rtwdev, false); in rtw89_mac_dle_init()
2138 return rtwdev->hci.type == RTW89_HCI_TYPE_PCIE; in is_qta_poh()
2144 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_preload_init()
2146 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || in rtw89_mac_preload_init()
2147 chip->chip_id == RTL8851B || !is_qta_poh(rtwdev)) in rtw89_mac_preload_init()
2181 const struct rtw89_chip_info *chip = rtwdev->chip; in _patch_ss2f_path()
2183 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || in _patch_ss2f_path()
2184 chip->chip_id == RTL8851B) in _patch_ss2f_path()
2239 const struct rtw89_chip_info *chip = rtwdev->chip; in sec_eng_init_ax()
2253 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || in sec_eng_init_ax()
2254 chip->chip_id == RTL8851B) in sec_eng_init_ax()
2265 if (chip->chip_id == RTL8852C) in sec_eng_init_ax()
2276 ret = rtw89_mac_dle_init(rtwdev, rtwdev->mac.qta_mode, RTW89_QTA_INVALID); in dmac_init_ax()
2282 ret = rtw89_mac_preload_init(rtwdev, RTW89_MAC_0, rtwdev->mac.qta_mode); in dmac_init_ax()
2353 if (rtwdev->chip->chip_id == RTL8852C) in scheduler_init_ax()
2360 if (rtwdev->chip->chip_id == RTL8852B || rtwdev->chip->chip_id == RTL8851B) { in scheduler_init_ax()
2369 if (rtwdev->chip->chip_id == RTL8852C) { in scheduler_init_ax()
2403 return -EINVAL; in rtw89_mac_typ_fltr_opt_ax()
2418 return -EINVAL; in rtw89_mac_typ_fltr_opt_ax()
2440 mac_ftlr = rtwdev->hal.rx_fltr; in rx_fltr_init_ax()
2464 switch (rtwdev->chip->chip_id) { in _patch_dis_resp_chk()
2567 const struct rtw89_chip_info *chip = rtwdev->chip; in trxptcl_init_ax()
2568 const struct rtw89_rrsr_cfgs *rrsr = chip->rrsr_cfgs; in trxptcl_init_ax()
2581 switch (rtwdev->chip->chip_id) { in trxptcl_init_ax()
2599 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx); in trxptcl_init_ax()
2600 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data); in trxptcl_init_ax()
2601 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->rsc.addr, mac_idx); in trxptcl_init_ax()
2602 rtw89_write32_mask(rtwdev, reg, rrsr->rsc.mask, rrsr->rsc.data); in trxptcl_init_ax()
2656 rx_qta = rtwdev->mac.dle_info.c0_rx_qta; in rmac_init_ax()
2658 rx_qta = rtwdev->mac.dle_info.c1_rx_qta; in rmac_init_ax()
2660 rx_max_len = rx_qta * rtwdev->mac.dle_info.ple_pg_size; in rmac_init_ax()
2665 if (rtwdev->chip->chip_id == RTL8852A && in rmac_init_ax()
2666 rtwdev->hal.cv == CHIP_CBV) { in rmac_init_ax()
2682 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in cmac_com_init_ax()
2715 return (cfg->ple_min_qt->cma1_dma && cfg->ple_max_qt->cma1_dma); in rtw89_mac_is_qta_dbcc()
2727 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { in ptcl_init_ax()
2763 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in cmac_dma_init_ax()
2867 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_read_phycap()
2871 mac->cnv_efuse_state(rtwdev, false); in rtw89_mac_read_phycap()
2880 if (c2h_info->id != RTW89_FWCMD_C2HREG_FUNC_PHY_CAP) in rtw89_mac_read_phycap()
2881 ret = -EINVAL; in rtw89_mac_read_phycap()
2884 mac->cnv_efuse_state(rtwdev, true); in rtw89_mac_read_phycap()
2891 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_mac_setup_phycap()
2892 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_mac_setup_phycap()
2893 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_setup_phycap()
2908 tx_nss = u32_get_bits(phycap->w1, RTW89_C2HREG_PHYCAP_W1_TX_NSS); in rtw89_mac_setup_phycap()
2909 rx_nss = u32_get_bits(phycap->w0, RTW89_C2HREG_PHYCAP_W0_RX_NSS); in rtw89_mac_setup_phycap()
2910 tx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_TX_NUM); in rtw89_mac_setup_phycap()
2911 rx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_RX_NUM); in rtw89_mac_setup_phycap()
2913 hal->tx_nss = tx_nss ? min_t(u8, tx_nss, chip->tx_nss) : chip->tx_nss; in rtw89_mac_setup_phycap()
2914 hal->rx_nss = rx_nss ? min_t(u8, rx_nss, chip->rx_nss) : chip->rx_nss; in rtw89_mac_setup_phycap()
2917 hal->antenna_tx = RF_B; in rtw89_mac_setup_phycap()
2919 hal->antenna_rx = RF_B; in rtw89_mac_setup_phycap()
2922 hal->antenna_tx = RF_B; in rtw89_mac_setup_phycap()
2923 hal->tx_path_diversity = true; in rtw89_mac_setup_phycap()
2926 if (chip->rf_path_num == 1) { in rtw89_mac_setup_phycap()
2927 hal->antenna_tx = RF_A; in rtw89_mac_setup_phycap()
2928 hal->antenna_rx = RF_A; in rtw89_mac_setup_phycap()
2929 if ((efuse->rfe_type % 3) == 2) in rtw89_mac_setup_phycap()
2930 hal->ant_diversity = true; in rtw89_mac_setup_phycap()
2935 hal->tx_nss, tx_nss, chip->tx_nss, in rtw89_mac_setup_phycap()
2936 hal->rx_nss, rx_nss, chip->rx_nss); in rtw89_mac_setup_phycap()
2939 tx_ant, hal->antenna_tx, rx_ant, hal->antenna_rx); in rtw89_mac_setup_phycap()
2940 rtw89_debug(rtwdev, RTW89_DBG_FW, "TX path diversity=%d\n", hal->tx_path_diversity); in rtw89_mac_setup_phycap()
2941 rtw89_debug(rtwdev, RTW89_DBG_FW, "Antenna diversity=%d\n", hal->ant_diversity); in rtw89_mac_setup_phycap()
2955 h2c_info.content_len = sizeof(*sch_tx_en) - RTW89_H2CREG_HDR_LEN; in rtw89_hw_sch_tx_en_h2c()
2957 u32p_replace_bits(&sch_tx_en->w0, tx_en_u16, RTW89_H2CREG_SCH_TX_EN_W0_EN); in rtw89_hw_sch_tx_en_h2c()
2958 u32p_replace_bits(&sch_tx_en->w1, mask_u16, RTW89_H2CREG_SCH_TX_EN_W1_MASK); in rtw89_hw_sch_tx_en_h2c()
2959 u32p_replace_bits(&sch_tx_en->w1, band, RTW89_H2CREG_SCH_TX_EN_W1_BAND); in rtw89_hw_sch_tx_en_h2c()
2966 return -EINVAL; in rtw89_hw_sch_tx_en_h2c()
2982 if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) in rtw89_set_hw_sch_tx_en()
3012 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx() argument
3019 switch (sel) { in rtw89_mac_stop_sch_tx()
3053 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx_v1() argument
3060 switch (sel) { in rtw89_mac_stop_sch_tx_v1()
3137 return -ENOENT; in dle_buf_req_ax()
3148 cmd_type = ctrl_para->cmd_type; in set_cpuio_ax()
3152 val = u32_replace_bits(val, ctrl_para->start_pktid, in set_cpuio_ax()
3154 val = u32_replace_bits(val, ctrl_para->end_pktid, in set_cpuio_ax()
3160 val = u32_replace_bits(val, ctrl_para->src_pid, in set_cpuio_ax()
3162 val = u32_replace_bits(val, ctrl_para->src_qid, in set_cpuio_ax()
3164 val = u32_replace_bits(val, ctrl_para->dst_pid, in set_cpuio_ax()
3166 val = u32_replace_bits(val, ctrl_para->dst_qid, in set_cpuio_ax()
3174 val = u32_replace_bits(val, ctrl_para->macid, in set_cpuio_ax()
3176 val = u32_replace_bits(val, ctrl_para->pkt_num, in set_cpuio_ax()
3190 ctrl_para->pktid = FIELD_GET(B_AX_WD_CPUQ_OP_PKTID_MASK, val); in set_cpuio_ax()
3197 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dle_quota_change()
3206 return -EINVAL; in rtw89_mac_dle_quota_change()
3211 return -EINVAL; in rtw89_mac_dle_quota_change()
3216 ret = mac->dle_buf_req(rtwdev, 0x20, true, &pkt_id); in rtw89_mac_dle_quota_change()
3228 ret = mac->set_cpuio(rtwdev, &ctrl_para, true); in rtw89_mac_dle_quota_change()
3231 return -EFAULT; in rtw89_mac_dle_quota_change()
3234 ret = mac->dle_buf_req(rtwdev, 0x20, false, &pkt_id); in rtw89_mac_dle_quota_change()
3246 ret = mac->set_cpuio(rtwdev, &ctrl_para, false); in rtw89_mac_dle_quota_change()
3249 return -EFAULT; in rtw89_mac_dle_quota_change()
3304 ret = rtw89_mac_dle_quota_change(rtwdev, rtwdev->mac.qta_mode); in band1_enable_ax()
3341 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_wdrls_imr_enable()
3344 rtw89_write32_set(rtwdev, R_AX_WDRLS_ERR_IMR, imr->wdrls_imr_set); in rtw89_wdrls_imr_enable()
3349 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_wsec_imr_enable()
3351 rtw89_write32_set(rtwdev, imr->wsec_imr_reg, imr->wsec_imr_set); in rtw89_wsec_imr_enable()
3356 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mpdu_trx_imr_enable()
3357 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_mpdu_trx_imr_enable()
3372 imr->mpdu_tx_imr_set); in rtw89_mpdu_trx_imr_enable()
3379 imr->mpdu_rx_imr_set); in rtw89_mpdu_trx_imr_enable()
3384 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_sta_sch_imr_enable()
3391 imr->sta_sch_imr_set); in rtw89_sta_sch_imr_enable()
3396 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_txpktctl_imr_enable()
3398 rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b0_reg, in rtw89_txpktctl_imr_enable()
3399 imr->txpktctl_imr_b0_clr); in rtw89_txpktctl_imr_enable()
3400 rtw89_write32_set(rtwdev, imr->txpktctl_imr_b0_reg, in rtw89_txpktctl_imr_enable()
3401 imr->txpktctl_imr_b0_set); in rtw89_txpktctl_imr_enable()
3402 rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b1_reg, in rtw89_txpktctl_imr_enable()
3403 imr->txpktctl_imr_b1_clr); in rtw89_txpktctl_imr_enable()
3404 rtw89_write32_set(rtwdev, imr->txpktctl_imr_b1_reg, in rtw89_txpktctl_imr_enable()
3405 imr->txpktctl_imr_b1_set); in rtw89_txpktctl_imr_enable()
3410 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_wde_imr_enable()
3412 rtw89_write32_clr(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_clr); in rtw89_wde_imr_enable()
3413 rtw89_write32_set(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_set); in rtw89_wde_imr_enable()
3418 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_ple_imr_enable()
3420 rtw89_write32_clr(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_clr); in rtw89_ple_imr_enable()
3421 rtw89_write32_set(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_set); in rtw89_ple_imr_enable()
3432 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_dispatcher_imr_enable()
3435 imr->host_disp_imr_clr); in rtw89_dispatcher_imr_enable()
3437 imr->host_disp_imr_set); in rtw89_dispatcher_imr_enable()
3439 imr->cpu_disp_imr_clr); in rtw89_dispatcher_imr_enable()
3441 imr->cpu_disp_imr_set); in rtw89_dispatcher_imr_enable()
3443 imr->other_disp_imr_clr); in rtw89_dispatcher_imr_enable()
3445 imr->other_disp_imr_set); in rtw89_dispatcher_imr_enable()
3456 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_bbrpt_imr_enable()
3458 rtw89_write32_set(rtwdev, imr->bbrpt_com_err_imr_reg, in rtw89_bbrpt_imr_enable()
3460 rtw89_write32_clr(rtwdev, imr->bbrpt_chinfo_err_imr_reg, in rtw89_bbrpt_imr_enable()
3462 rtw89_write32_set(rtwdev, imr->bbrpt_chinfo_err_imr_reg, in rtw89_bbrpt_imr_enable()
3463 imr->bbrpt_err_imr_set); in rtw89_bbrpt_imr_enable()
3464 rtw89_write32_set(rtwdev, imr->bbrpt_dfs_err_imr_reg, in rtw89_bbrpt_imr_enable()
3481 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_ptcl_imr_enable()
3485 rtw89_write32_clr(rtwdev, reg, imr->ptcl_imr_clr); in rtw89_ptcl_imr_enable()
3486 rtw89_write32_set(rtwdev, reg, imr->ptcl_imr_set); in rtw89_ptcl_imr_enable()
3491 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_cdma_imr_enable()
3492 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_cdma_imr_enable()
3495 reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_0_reg, mac_idx); in rtw89_cdma_imr_enable()
3496 rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_0_clr); in rtw89_cdma_imr_enable()
3497 rtw89_write32_set(rtwdev, reg, imr->cdma_imr_0_set); in rtw89_cdma_imr_enable()
3500 reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_1_reg, mac_idx); in rtw89_cdma_imr_enable()
3501 rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_1_clr); in rtw89_cdma_imr_enable()
3502 rtw89_write32_set(rtwdev, reg, imr->cdma_imr_1_set); in rtw89_cdma_imr_enable()
3508 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_phy_intf_imr_enable()
3511 reg = rtw89_mac_reg_by_idx(rtwdev, imr->phy_intf_imr_reg, mac_idx); in rtw89_phy_intf_imr_enable()
3512 rtw89_write32_clr(rtwdev, reg, imr->phy_intf_imr_clr); in rtw89_phy_intf_imr_enable()
3513 rtw89_write32_set(rtwdev, reg, imr->phy_intf_imr_set); in rtw89_phy_intf_imr_enable()
3518 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_rmac_imr_enable()
3521 reg = rtw89_mac_reg_by_idx(rtwdev, imr->rmac_imr_reg, mac_idx); in rtw89_rmac_imr_enable()
3522 rtw89_write32_clr(rtwdev, reg, imr->rmac_imr_clr); in rtw89_rmac_imr_enable()
3523 rtw89_write32_set(rtwdev, reg, imr->rmac_imr_set); in rtw89_rmac_imr_enable()
3528 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_tmac_imr_enable()
3531 reg = rtw89_mac_reg_by_idx(rtwdev, imr->tmac_imr_reg, mac_idx); in rtw89_tmac_imr_enable()
3532 rtw89_write32_clr(rtwdev, reg, imr->tmac_imr_clr); in rtw89_tmac_imr_enable()
3533 rtw89_write32_set(rtwdev, reg, imr->tmac_imr_set); in rtw89_tmac_imr_enable()
3537 enum rtw89_mac_hwmod_sel sel) in enable_imr_ax() argument
3541 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, sel); in enable_imr_ax()
3544 sel, mac_idx); in enable_imr_ax()
3548 if (sel == RTW89_DMAC_SEL) { in enable_imr_ax()
3560 } else if (sel == RTW89_CMAC_SEL) { in enable_imr_ax()
3568 return -EINVAL; in enable_imr_ax()
3576 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in err_imr_ctrl_ax()
3582 if (chip_id != RTL8852B && rtwdev->mac.dle_info.c1_rx_qta) in err_imr_ctrl_ax()
3605 return -EINVAL; in dbcc_enable_ax()
3613 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { in set_host_rpr_ax()
3633 enum rtw89_qta_mode qta_mode = rtwdev->mac.qta_mode; in trx_init_ax()
3681 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_disable_fw_watchdog()
3701 clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); in rtw89_mac_disable_cpu_ax()
3721 return -EFAULT; in rtw89_mac_enable_cpu_ax()
3742 if (rtwdev->chip->chip_id == RTL8852B) in rtw89_mac_enable_cpu_ax()
3763 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mac_hci_func_en_ax()
3777 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mac_dmac_func_pre_en_ax()
3806 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dmac_pre_init()
3809 mac->hci_func_en(rtwdev); in rtw89_mac_dmac_pre_init()
3810 mac->dmac_func_pre_en(rtwdev); in rtw89_mac_dmac_pre_init()
3812 ret = rtw89_mac_dle_init(rtwdev, RTW89_QTA_DLFW, rtwdev->mac.qta_mode); in rtw89_mac_dmac_pre_init()
3869 if (rtwdev->dbcc_en) in rtw89_mac_partial_init()
3877 if (rtwdev->hci.ops->mac_pre_init) { in rtw89_mac_partial_init()
3878 ret = rtwdev->hci.ops->mac_pre_init(rtwdev); in rtw89_mac_partial_init()
3892 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_init()
3893 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_init()
3894 bool include_bb = !!chip->bbmcu_nr; in rtw89_mac_init()
3905 ret = mac->sys_init(rtwdev); in rtw89_mac_init()
3909 ret = mac->trx_init(rtwdev); in rtw89_mac_init()
3913 if (rtwdev->hci.ops->mac_post_init) { in rtw89_mac_init()
3914 ret = rtwdev->hci.ops->mac_post_init(rtwdev); in rtw89_mac_init()
3933 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX) in rtw89_mac_dmac_tbl_init()
3945 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX) in rtw89_mac_cmac_tbl_init()
3967 * be power-off, so ignore this operation. in rtw89_mac_set_macid_pause()
3969 if (test_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags) && in rtw89_mac_set_macid_pause()
3970 !test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) in rtw89_mac_set_macid_pause()
4011 u8 mask = B_AX_PTCL_DBG_INFO_MASK_BY_PORT(rtwvif->port); in rtw89_mac_check_packet_ctrl()
4016 reg_info = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_DBG_INFO, rtwvif->mac_idx); in rtw89_mac_check_packet_ctrl()
4017 reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_DBG, rtwvif->mac_idx); in rtw89_mac_check_packet_ctrl()
4031 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_bcn_drop()
4032 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_bcn_drop()
4034 rtw89_write32_set(rtwdev, R_AX_BCN_DROP_ALL0, BIT(rtwvif->port)); in rtw89_mac_bcn_drop()
4035 rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_SETUP_MASK, 1); in rtw89_mac_bcn_drop()
4036 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_area, B_AX_BCN_MSK_AREA_MASK, 0); in rtw89_mac_bcn_drop()
4037 rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK, 0); in rtw89_mac_bcn_drop()
4038 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_early, B_AX_BCNERLY_MASK, 2); in rtw89_mac_bcn_drop()
4039 rtw89_write16_port_mask(rtwdev, rtwvif, p->tbtt_early, B_AX_TBTTERLY_MASK, 1); in rtw89_mac_bcn_drop()
4040 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_space, B_AX_BCN_SPACE_MASK, 1); in rtw89_mac_bcn_drop()
4041 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_BCNTX_EN); in rtw89_mac_bcn_drop()
4044 if (rtwvif->port == RTW89_PORT_0) in rtw89_mac_bcn_drop()
4047 rtw89_write32_clr(rtwdev, R_AX_BCN_DROP_ALL0, BIT(rtwvif->port)); in rtw89_mac_bcn_drop()
4048 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_TBTT_PROHIB_EN); in rtw89_mac_bcn_drop()
4064 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_func_sw()
4065 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_func_sw()
4067 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_port_cfg_func_sw()
4071 if (!rtw89_read32_port_mask(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN)) in rtw89_mac_port_cfg_func_sw()
4074 if (chip->chip_id == RTL8852A && rtwvif->port != RTW89_PORT_0) { in rtw89_mac_port_cfg_func_sw()
4076 backup_val = rtw89_read32_port(rtwdev, rtwvif, p->tbtt_prohib); in rtw89_mac_port_cfg_func_sw()
4079 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_port_cfg_func_sw()
4082 if (chip->chip_id == RTL8852A) { in rtw89_mac_port_cfg_func_sw()
4083 rtw89_write32_port_clr(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_SETUP_MASK); in rtw89_mac_port_cfg_func_sw()
4084 rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK, 1); in rtw89_mac_port_cfg_func_sw()
4085 rtw89_write16_port_clr(rtwdev, rtwvif, p->tbtt_early, B_AX_TBTTERLY_MASK); in rtw89_mac_port_cfg_func_sw()
4086 rtw89_write16_port_clr(rtwdev, rtwvif, p->bcn_early, B_AX_BCNERLY_MASK); in rtw89_mac_port_cfg_func_sw()
4089 msleep(vif->bss_conf.beacon_int + 1); in rtw89_mac_port_cfg_func_sw()
4090 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN | in rtw89_mac_port_cfg_func_sw()
4092 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_TSFTR_RST); in rtw89_mac_port_cfg_func_sw()
4093 rtw89_write32_port(rtwdev, rtwvif, p->bcn_cnt_tmr, 0); in rtw89_mac_port_cfg_func_sw()
4096 rtw89_write32_port(rtwdev, rtwvif, p->tbtt_prohib, backup_val); in rtw89_mac_port_cfg_func_sw()
4102 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tx_rpt()
4103 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tx_rpt()
4106 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_TXBCN_RPT_EN); in rtw89_mac_port_cfg_tx_rpt()
4108 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_TXBCN_RPT_EN); in rtw89_mac_port_cfg_tx_rpt()
4114 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_rx_rpt()
4115 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_rpt()
4118 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_RXBCN_RPT_EN); in rtw89_mac_port_cfg_rx_rpt()
4120 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_RXBCN_RPT_EN); in rtw89_mac_port_cfg_rx_rpt()
4126 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_net_type()
4127 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_net_type()
4129 rtw89_write32_port_mask(rtwdev, rtwvif, p->port_cfg, B_AX_NET_TYPE_MASK, in rtw89_mac_port_cfg_net_type()
4130 rtwvif->net_type); in rtw89_mac_port_cfg_net_type()
4136 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_prct()
4137 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_prct()
4138 bool en = rtwvif->net_type != RTW89_NET_TYPE_NO_LINK; in rtw89_mac_port_cfg_bcn_prct()
4142 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, bits); in rtw89_mac_port_cfg_bcn_prct()
4144 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, bits); in rtw89_mac_port_cfg_bcn_prct()
4150 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_rx_sw()
4151 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_sw()
4152 bool en = rtwvif->net_type == RTW89_NET_TYPE_INFRA || in rtw89_mac_port_cfg_rx_sw()
4153 rtwvif->net_type == RTW89_NET_TYPE_AD_HOC; in rtw89_mac_port_cfg_rx_sw()
4157 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, bit); in rtw89_mac_port_cfg_rx_sw()
4159 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, bit); in rtw89_mac_port_cfg_rx_sw()
4165 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_rx_sync()
4166 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_sync()
4167 bool en = rtwvif->net_type == RTW89_NET_TYPE_INFRA || in rtw89_mac_port_cfg_rx_sync()
4168 rtwvif->net_type == RTW89_NET_TYPE_AD_HOC; in rtw89_mac_port_cfg_rx_sync()
4171 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_TSF_UDT_EN); in rtw89_mac_port_cfg_rx_sync()
4173 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_TSF_UDT_EN); in rtw89_mac_port_cfg_rx_sync()
4179 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tx_sw()
4180 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tx_sw()
4183 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_BCNTX_EN); in rtw89_mac_port_cfg_tx_sw()
4185 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, B_AX_BCNTX_EN); in rtw89_mac_port_cfg_tx_sw()
4191 bool en = rtwvif->net_type == RTW89_NET_TYPE_AP_MODE || in rtw89_mac_port_cfg_tx_sw_by_nettype()
4192 rtwvif->net_type == RTW89_NET_TYPE_AD_HOC; in rtw89_mac_port_cfg_tx_sw_by_nettype()
4202 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_enable_beacon_for_ap_vifs()
4209 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_intv()
4210 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_intv()
4212 u16 bcn_int = vif->bss_conf.beacon_int ? vif->bss_conf.beacon_int : BCN_INTERVAL; in rtw89_mac_port_cfg_bcn_intv()
4214 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_space, B_AX_BCN_SPACE_MASK, in rtw89_mac_port_cfg_bcn_intv()
4221 u8 win = rtwvif->net_type == RTW89_NET_TYPE_AP_MODE ? 16 : 0; in rtw89_mac_port_cfg_hiq_win()
4222 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_hiq_win()
4223 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_hiq_win()
4224 u8 port = rtwvif->port; in rtw89_mac_port_cfg_hiq_win()
4227 reg = rtw89_mac_reg_by_idx(rtwdev, p->hiq_win[port], rtwvif->mac_idx); in rtw89_mac_port_cfg_hiq_win()
4234 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_hiq_dtim()
4235 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_hiq_dtim()
4239 addr = rtw89_mac_reg_by_idx(rtwdev, p->md_tsft, rtwvif->mac_idx); in rtw89_mac_port_cfg_hiq_dtim()
4242 rtw89_write16_port_mask(rtwdev, rtwvif, p->dtim_ctrl, B_AX_DTIM_NUM_MASK, in rtw89_mac_port_cfg_hiq_dtim()
4243 vif->bss_conf.dtim_period); in rtw89_mac_port_cfg_hiq_dtim()
4249 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_setup_time()
4250 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_setup_time()
4252 rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, in rtw89_mac_port_cfg_bcn_setup_time()
4259 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_hold_time()
4260 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_hold_time()
4262 rtw89_write32_port_mask(rtwdev, rtwvif, p->tbtt_prohib, in rtw89_mac_port_cfg_bcn_hold_time()
4269 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_mask_area()
4270 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_mask_area()
4272 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_area, in rtw89_mac_port_cfg_bcn_mask_area()
4279 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tbtt_early()
4280 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tbtt_early()
4282 rtw89_write16_port_mask(rtwdev, rtwvif, p->tbtt_early, in rtw89_mac_port_cfg_tbtt_early()
4289 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bss_color()
4290 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bss_color()
4297 u8 port = rtwvif->port; in rtw89_mac_port_cfg_bss_color()
4302 bss_color = vif->bss_conf.he_bss_color.color; in rtw89_mac_port_cfg_bss_color()
4303 reg_base = port >= 4 ? p->bss_color + 4 : p->bss_color; in rtw89_mac_port_cfg_bss_color()
4304 reg = rtw89_mac_reg_by_idx(rtwdev, reg_base, rtwvif->mac_idx); in rtw89_mac_port_cfg_bss_color()
4311 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_mbssid()
4312 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_mbssid()
4313 u8 port = rtwvif->port; in rtw89_mac_port_cfg_mbssid()
4316 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_port_cfg_mbssid()
4320 reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid, rtwvif->mac_idx); in rtw89_mac_port_cfg_mbssid()
4328 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_hiq_drop()
4329 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_hiq_drop()
4330 u8 port = rtwvif->port; in rtw89_mac_port_cfg_hiq_drop()
4334 reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid_drop, rtwvif->mac_idx); in rtw89_mac_port_cfg_hiq_drop()
4345 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_func_en()
4346 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_func_en()
4349 rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, in rtw89_mac_port_cfg_func_en()
4352 rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, in rtw89_mac_port_cfg_func_en()
4359 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_early()
4360 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_early()
4362 rtw89_write32_port_mask(rtwdev, rtwvif, p->bcn_early, B_AX_BCNERLY_MASK, in rtw89_mac_port_cfg_bcn_early()
4369 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tbtt_shift()
4370 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tbtt_shift()
4373 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_mac_port_cfg_tbtt_shift()
4376 if (rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT && in rtw89_mac_port_cfg_tbtt_shift()
4377 rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_mac_port_cfg_tbtt_shift()
4383 rtw89_write16_port_mask(rtwdev, rtwvif, p->tbtt_shift, in rtw89_mac_port_cfg_tbtt_shift()
4392 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_tsf_sync()
4393 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_tsf_sync()
4397 reg = rtw89_mac_reg_by_idx(rtwdev, p->tsf_sync + rtwvif->port * 4, in rtw89_mac_port_tsf_sync()
4398 rtwvif->mac_idx); in rtw89_mac_port_tsf_sync()
4400 rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); in rtw89_mac_port_tsf_sync()
4410 if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE || rtwvif == rtwvif_src) in rtw89_mac_port_tsf_sync_rand()
4414 offset = offset - offset / 4 + get_random_u32() % (offset / 2); in rtw89_mac_port_tsf_sync_rand()
4428 if (!src || tmp->net_type == RTW89_NET_TYPE_INFRA) in rtw89_mac_port_tsf_resync_all()
4430 if (tmp->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_port_tsf_resync_all()
4451 rtw89_mac_dmac_tbl_init(rtwdev, rtwvif->mac_id); in rtw89_mac_vif_init()
4452 rtw89_mac_cmac_tbl_init(rtwdev, rtwvif->mac_id); in rtw89_mac_vif_init()
4454 ret = rtw89_mac_set_macid_pause(rtwdev, rtwvif->mac_id, false); in rtw89_mac_vif_init()
4500 u8 port = rtwvif->port; in rtw89_mac_port_update()
4503 return -EINVAL; in rtw89_mac_port_update()
4535 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_get_tsf()
4536 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_get_tsf()
4540 ret = rtw89_mac_check_mac_en(rtwdev, rtwvif->mac_idx, RTW89_CMAC_SEL); in rtw89_mac_port_get_tsf()
4544 tsf_low = rtw89_read32_port(rtwdev, rtwvif, p->tsftr_l); in rtw89_mac_port_get_tsf()
4545 tsf_high = rtw89_read32_port(rtwdev, rtwvif, p->tsftr_h); in rtw89_mac_port_get_tsf()
4560 ies = rcu_dereference(bss->ies); in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4561 elem = cfg80211_find_elem(WLAN_EID_EXT_CAPABILITY, ies->data, in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4562 ies->len); in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4564 if (!elem || elem->datalen < 10 || in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4565 !(elem->data[10] & WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT)) in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4573 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_mac_set_he_obss_narrow_bw_ru()
4574 struct ieee80211_hw *hw = rtwdev->hw; in rtw89_mac_set_he_obss_narrow_bw_ru()
4578 if (!vif->bss_conf.he_support || vif->type != NL80211_IFTYPE_STATION) in rtw89_mac_set_he_obss_narrow_bw_ru()
4581 if (!(vif->bss_conf.chandef.chan->flags & IEEE80211_CHAN_RADAR)) in rtw89_mac_set_he_obss_narrow_bw_ru()
4584 cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chandef, in rtw89_mac_set_he_obss_narrow_bw_ru()
4588 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RXTRIG_TEST_USER_2, rtwvif->mac_idx); in rtw89_mac_set_he_obss_narrow_bw_ru()
4604 rtwvif->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map, in rtw89_mac_add_vif()
4606 if (rtwvif->mac_id == RTW89_MAX_MAC_ID_NUM) in rtw89_mac_add_vif()
4607 return -ENOSPC; in rtw89_mac_add_vif()
4616 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwvif->mac_id); in rtw89_mac_add_vif()
4626 rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwvif->mac_id); in rtw89_mac_remove_vif()
4638 const struct rtw89_chan *op = &rtwdev->scan_info.op_chan; in rtw89_is_op_chan()
4640 return band == op->band_type && channel == op->primary_channel; in rtw89_is_op_chan()
4647 struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; in rtw89_mac_c2h_scanofld_rsp()
4651 u32 last_chan = rtwdev->scan_info.last_chan_idx; in rtw89_mac_c2h_scanofld_rsp()
4658 tx_fail = RTW89_GET_MAC_C2H_SCANOFLD_TX_FAIL(c2h->data); in rtw89_mac_c2h_scanofld_rsp()
4659 status = RTW89_GET_MAC_C2H_SCANOFLD_STATUS(c2h->data); in rtw89_mac_c2h_scanofld_rsp()
4660 chan = RTW89_GET_MAC_C2H_SCANOFLD_PRI_CH(c2h->data); in rtw89_mac_c2h_scanofld_rsp()
4661 reason = RTW89_GET_MAC_C2H_SCANOFLD_RSP(c2h->data); in rtw89_mac_c2h_scanofld_rsp()
4662 band = RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h->data); in rtw89_mac_c2h_scanofld_rsp()
4663 actual_period = RTW89_GET_MAC_C2H_ACTUAL_PERIOD(c2h->data); in rtw89_mac_c2h_scanofld_rsp()
4665 if (!(rtwdev->chip->support_bands & BIT(NL80211_BAND_6GHZ))) in rtw89_mac_c2h_scanofld_rsp()
4676 ieee80211_stop_queues(rtwdev->hw); in rtw89_mac_c2h_scanofld_rsp()
4680 if (rtwvif && rtwvif->scan_req && in rtw89_mac_c2h_scanofld_rsp()
4681 last_chan < rtwvif->scan_req->n_channels) { in rtw89_mac_c2h_scanofld_rsp()
4693 rtw89_assign_entity_chan(rtwdev, rtwvif->sub_entity_idx, in rtw89_mac_c2h_scanofld_rsp()
4694 &rtwdev->scan_info.op_chan); in rtw89_mac_c2h_scanofld_rsp()
4696 ieee80211_wake_queues(rtwdev->hw); in rtw89_mac_c2h_scanofld_rsp()
4700 rtw89_assign_entity_chan(rtwdev, rtwvif->sub_entity_idx, in rtw89_mac_c2h_scanofld_rsp()
4716 (const struct rtw89_c2h_mac_bcnfltr_rpt *)skb->data; in rtw89_mac_bcn_fltr_rpt()
4720 type = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_TYPE); in rtw89_mac_bcn_fltr_rpt()
4721 sig = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MA) - MAX_RSSI; in rtw89_mac_bcn_fltr_rpt()
4722 event = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_EVENT); in rtw89_mac_bcn_fltr_rpt()
4723 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MACID); in rtw89_mac_bcn_fltr_rpt()
4725 if (mac_id != rtwvif->mac_id) in rtw89_mac_bcn_fltr_rpt()
4734 if (!rtwdev->scanning && !rtwvif->offchan) in rtw89_mac_bcn_fltr_rpt()
4774 RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h->data), in rtw89_mac_c2h_rec_ack()
4775 RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h->data), in rtw89_mac_c2h_rec_ack()
4776 RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h->data), in rtw89_mac_c2h_rec_ack()
4777 RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h->data)); in rtw89_mac_c2h_rec_ack()
4784 struct rtw89_wait_info *fw_ofld_wait = &rtwdev->mac.fw_ofld_wait; in rtw89_mac_c2h_done_ack()
4786 (const struct rtw89_c2h_done_ack *)skb_c2h->data; in rtw89_mac_c2h_done_ack()
4787 u8 h2c_cat = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CAT); in rtw89_mac_c2h_done_ack()
4788 u8 h2c_class = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CLASS); in rtw89_mac_c2h_done_ack()
4789 u8 h2c_func = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_FUNC); in rtw89_mac_c2h_done_ack()
4790 u8 h2c_return = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_RETURN); in rtw89_mac_c2h_done_ack()
4791 u8 h2c_seq = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_SEQ); in rtw89_mac_c2h_done_ack()
4824 rtw89_fw_log_dump(rtwdev, c2h->data, len); in rtw89_mac_c2h_log()
4836 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; in rtw89_mac_c2h_pkt_ofld_rsp()
4838 (const struct rtw89_c2h_pkt_ofld_rsp *)skb_c2h->data; in rtw89_mac_c2h_pkt_ofld_rsp()
4839 u16 pkt_len = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_LEN); in rtw89_mac_c2h_pkt_ofld_rsp()
4840 u8 pkt_id = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_ID); in rtw89_mac_c2h_pkt_ofld_rsp()
4841 u8 pkt_op = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_OP); in rtw89_mac_c2h_pkt_ofld_rsp()
4864 u8 group = RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h->data); in rtw89_mac_c2h_mcc_rcv_ack()
4865 u8 func = RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h->data); in rtw89_mac_c2h_mcc_rcv_ack()
4891 u8 group = RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h->data); in rtw89_mac_c2h_mcc_req_ack()
4892 u8 func = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h->data); in rtw89_mac_c2h_mcc_req_ack()
4893 u8 retcode = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h->data); in rtw89_mac_c2h_mcc_req_ack()
4926 rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); in rtw89_mac_c2h_mcc_req_ack()
4932 u8 group = RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4938 rpt->macid_x = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4939 rpt->macid_y = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4940 rpt->tsf_x_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4941 rpt->tsf_x_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4942 rpt->tsf_y_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4943 rpt->tsf_y_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
4947 rpt->macid_x, (u64)rpt->tsf_x_high << 32 | rpt->tsf_x_low, in rtw89_mac_c2h_mcc_tsf_rpt()
4948 rpt->macid_y, (u64)rpt->tsf_y_high << 32 | rpt->tsf_y_low); in rtw89_mac_c2h_mcc_tsf_rpt()
4951 rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); in rtw89_mac_c2h_mcc_tsf_rpt()
4957 u8 group = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
4958 u8 macid = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
4959 u8 status = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
4960 u32 tsf_low = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
4961 u32 tsf_high = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
5021 rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); in rtw89_mac_c2h_mcc_status_rpt()
5118 const struct rtw89_dle_mem *dle_mem = rtwdev->chip->dle_mem; in rtw89_mac_get_txpwr_cr_ax()
5119 enum rtw89_qta_mode mode = dle_mem->mode; in rtw89_mac_get_txpwr_cr_ax()
5179 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_update_rts_threshold()
5180 struct ieee80211_hw *hw = rtwdev->hw; in rtw89_mac_update_rts_threshold()
5181 u32 rts_threshold = hw->wiphy->rts_threshold; in rtw89_mac_update_rts_threshold()
5185 if (rts_threshold == (u32)-1) { in rtw89_mac_update_rts_threshold()
5196 reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_len_ht, mac_idx); in rtw89_mac_update_rts_threshold()
5206 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) in rtw89_mac_flush_txq()
5211 if (ret && !drop && (rtwdev->total_sta_assoc || rtwdev->scanning)) in rtw89_mac_flush_txq()
5223 if (rtwdev->chip->chip_id != RTL8851B) in rtw89_mac_coex_init()
5228 if (rtwdev->chip->chip_id != RTL8851B) in rtw89_mac_coex_init()
5247 switch (coex->pta_mode) { in rtw89_mac_coex_init()
5281 return -EINVAL; in rtw89_mac_coex_init()
5284 switch (coex->direction) { in rtw89_mac_coex_init()
5301 return -EINVAL; in rtw89_mac_coex_init()
5317 switch (coex->pta_mode) { in rtw89_mac_coex_init_v1()
5329 return -EINVAL; in rtw89_mac_coex_init_v1()
5341 if (gnt_cfg->band[0].gnt_bt) in rtw89_mac_cfg_gnt()
5344 if (gnt_cfg->band[0].gnt_bt_sw_en) in rtw89_mac_cfg_gnt()
5347 if (gnt_cfg->band[0].gnt_wl) in rtw89_mac_cfg_gnt()
5350 if (gnt_cfg->band[0].gnt_wl_sw_en) in rtw89_mac_cfg_gnt()
5353 if (gnt_cfg->band[1].gnt_bt) in rtw89_mac_cfg_gnt()
5356 if (gnt_cfg->band[1].gnt_bt_sw_en) in rtw89_mac_cfg_gnt()
5359 if (gnt_cfg->band[1].gnt_wl) in rtw89_mac_cfg_gnt()
5362 if (gnt_cfg->band[1].gnt_wl_sw_en) in rtw89_mac_cfg_gnt()
5380 if (gnt_cfg->band[0].gnt_bt) in rtw89_mac_cfg_gnt_v1()
5386 if (gnt_cfg->band[0].gnt_bt_sw_en) in rtw89_mac_cfg_gnt_v1()
5390 if (gnt_cfg->band[0].gnt_wl) in rtw89_mac_cfg_gnt_v1()
5394 if (gnt_cfg->band[0].gnt_wl_sw_en) in rtw89_mac_cfg_gnt_v1()
5398 if (gnt_cfg->band[1].gnt_bt) in rtw89_mac_cfg_gnt_v1()
5404 if (gnt_cfg->band[1].gnt_bt_sw_en) in rtw89_mac_cfg_gnt_v1()
5408 if (gnt_cfg->band[1].gnt_wl) in rtw89_mac_cfg_gnt_v1()
5412 if (gnt_cfg->band[1].gnt_wl_sw_en) in rtw89_mac_cfg_gnt_v1()
5428 ret = rtw89_mac_check_mac_en(rtwdev, plt->band, RTW89_CMAC_SEL); in rtw89_mac_cfg_plt()
5432 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BT_PLT, plt->band); in rtw89_mac_cfg_plt()
5433 val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) | in rtw89_mac_cfg_plt()
5434 (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) | in rtw89_mac_cfg_plt()
5435 (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) | in rtw89_mac_cfg_plt()
5436 (plt->tx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_TX_PLT_GNT_WL : 0) | in rtw89_mac_cfg_plt()
5437 (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) | in rtw89_mac_cfg_plt()
5438 (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) | in rtw89_mac_cfg_plt()
5439 (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) | in rtw89_mac_cfg_plt()
5440 (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0) | in rtw89_mac_cfg_plt()
5454 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) in rtw89_mac_cfg_sb()
5484 struct rtw89_btc *btc = &rtwdev->btc; in rtw89_mac_cfg_ctrl_path_v1()
5485 struct rtw89_btc_dm *dm = &btc->dm; in rtw89_mac_cfg_ctrl_path_v1()
5486 struct rtw89_mac_ax_gnt *g = dm->gnt.band; in rtw89_mac_cfg_ctrl_path_v1()
5499 return rtw89_mac_cfg_gnt_v1(rtwdev, &dm->gnt); in rtw89_mac_cfg_ctrl_path_v1()
5505 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_get_ctrl_path()
5508 if (chip->chip_id == RTL8852C) in rtw89_mac_get_ctrl_path()
5510 else if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || in rtw89_mac_get_ctrl_path()
5511 chip->chip_id == RTL8851B) in rtw89_mac_get_ctrl_path()
5535 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX) in rtw89_mac_bfee_standby_timer()
5541 set_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); in rtw89_mac_bfee_standby_timer()
5545 clear_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); in rtw89_mac_bfee_standby_timer()
5553 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_bfee_ctrl()
5555 u32 mask = mac->bfee_ctrl.mask; in rtw89_mac_bfee_ctrl()
5558 reg = rtw89_mac_reg_by_idx(rtwdev, mac->bfee_ctrl.addr, mac_idx); in rtw89_mac_bfee_ctrl()
5560 set_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); in rtw89_mac_bfee_ctrl()
5563 clear_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); in rtw89_mac_bfee_ctrl()
5614 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_mac_set_csi_para_reg_ax()
5615 u8 mac_idx = rtwvif->mac_idx; in rtw89_mac_set_csi_para_reg_ax()
5617 u8 port_sel = rtwvif->port; in rtw89_mac_set_csi_para_reg_ax()
5619 u8 *phy_cap = sta->deflink.he_cap.he_cap_elem.phy_cap_info; in rtw89_mac_set_csi_para_reg_ax()
5636 if ((sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) || in rtw89_mac_set_csi_para_reg_ax()
5637 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) { in rtw89_mac_set_csi_para_reg_ax()
5638 ldpc_en &= !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); in rtw89_mac_set_csi_para_reg_ax()
5639 stbc_en &= !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK); in rtw89_mac_set_csi_para_reg_ax()
5641 sta->deflink.vht_cap.cap); in rtw89_mac_set_csi_para_reg_ax()
5672 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_mac_csi_rrsc_ax()
5675 u8 mac_idx = rtwvif->mac_idx; in rtw89_mac_csi_rrsc_ax()
5682 if (sta->deflink.he_cap.has_he) { in rtw89_mac_csi_rrsc_ax()
5687 if (sta->deflink.vht_cap.vht_supported) { in rtw89_mac_csi_rrsc_ax()
5692 if (sta->deflink.ht_cap.ht_supported) { in rtw89_mac_csi_rrsc_ax()
5711 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_mac_bf_assoc_ax()
5716 rtw89_mac_init_bfee_ax(rtwdev, rtwvif->mac_idx); in rtw89_mac_bf_assoc_ax()
5725 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_mac_bf_disassoc()
5727 rtw89_mac_bfee_ctrl(rtwdev, rtwvif->mac_idx, false); in rtw89_mac_bf_disassoc()
5733 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; in rtw89_mac_bf_set_gid_table()
5734 u8 mac_idx = rtwvif->mac_idx; in rtw89_mac_bf_set_gid_table()
5739 p = (__le32 *)conf->mu_group.membership; in rtw89_mac_bf_set_gid_table()
5747 p = (__le32 *)conf->mu_group.position; in rtw89_mac_bf_set_gid_table()
5769 struct ieee80211_sta *down_sta = iter_data->down_sta; in rtw89_mac_bf_monitor_calc_iter()
5770 int *count = &iter_data->count; in rtw89_mac_bf_monitor_calc_iter()
5787 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_mac_bf_monitor_calc()
5793 set_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags); in rtw89_mac_bf_monitor_calc()
5795 clear_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags); in rtw89_mac_bf_monitor_calc()
5800 struct rtw89_traffic_stats *stats = &rtwdev->stats; in _rtw89_mac_bf_monitor_track()
5802 bool en = stats->tx_tfc_lv <= stats->rx_tfc_lv; in _rtw89_mac_bf_monitor_track()
5803 bool old = test_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); in _rtw89_mac_bf_monitor_track()
5807 old_keep_timer = test_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); in _rtw89_mac_bf_monitor_track()
5809 if (stats->tx_tfc_lv <= RTW89_TFC_LOW && stats->rx_tfc_lv <= RTW89_TFC_LOW) in _rtw89_mac_bf_monitor_track()
5814 rtw89_mac_bfee_standby_timer(rtwdev, rtwvif->mac_idx, in _rtw89_mac_bf_monitor_track()
5822 rtw89_mac_bfee_ctrl(rtwdev, rtwvif->mac_idx, en); in _rtw89_mac_bf_monitor_track()
5830 u8 mac_idx = rtwsta->rtwvif->mac_idx; in __rtw89_mac_set_tx_time()
5835 if (rtwsta->cctl_tx_time) { in __rtw89_mac_set_tx_time()
5836 rtwsta->ampdu_max_time = (max_tx_time - 512) >> 9; in __rtw89_mac_set_tx_time()
5859 rtwsta->cctl_tx_time = true; in rtw89_mac_set_tx_time()
5863 rtwsta->cctl_tx_time = false; in rtw89_mac_set_tx_time()
5872 u8 mac_idx = rtwsta->rtwvif->mac_idx; in rtw89_mac_get_tx_time()
5876 if (rtwsta->cctl_tx_time) { in rtw89_mac_get_tx_time()
5877 *tx_time = (rtwsta->ampdu_max_time + 1) << 9; in rtw89_mac_get_tx_time()
5898 rtwsta->data_tx_cnt_lmt = tx_retry; in rtw89_mac_set_tx_retry_limit()
5901 rtwsta->cctl_tx_retry_limit = true; in rtw89_mac_set_tx_retry_limit()
5905 rtwsta->cctl_tx_retry_limit = false; in rtw89_mac_set_tx_retry_limit()
5914 u8 mac_idx = rtwsta->rtwvif->mac_idx; in rtw89_mac_get_tx_retry_limit()
5918 if (rtwsta->cctl_tx_retry_limit) { in rtw89_mac_get_tx_retry_limit()
5919 *tx_retry = rtwsta->data_tx_cnt_lmt; in rtw89_mac_get_tx_retry_limit()
5937 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_set_hw_muedca_ctrl()
5938 u8 mac_idx = rtwvif->mac_idx; in rtw89_mac_set_hw_muedca_ctrl()
5939 u16 set = mac->muedca_ctrl.mask; in rtw89_mac_set_hw_muedca_ctrl()
5947 reg = rtw89_mac_reg_by_idx(rtwdev, mac->muedca_ctrl.addr, mac_idx); in rtw89_mac_set_hw_muedca_ctrl()
6014 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_mac_pkt_drop_sta()
6019 params.macid = rtwsta->mac_id; in rtw89_mac_pkt_drop_sta()
6020 params.port = rtwvif->port; in rtw89_mac_pkt_drop_sta()
6022 params.tf_trs = rtwvif->trigger; in rtw89_mac_pkt_drop_sta()
6025 params.sel = sels[i]; in rtw89_mac_pkt_drop_sta()
6032 struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; in rtw89_mac_pkt_drop_vif_iter()
6033 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_mac_pkt_drop_vif_iter()
6034 struct rtw89_dev *rtwdev = rtwvif->rtwdev; in rtw89_mac_pkt_drop_vif_iter()
6045 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_mac_pkt_drop_vif()
6053 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_ptk_drop_by_band_and_wait()
6059 params.sel = RTW89_PKT_DROP_SEL_BAND_ONCE; in rtw89_mac_ptk_drop_by_band_and_wait()
6062 ret = read_poll_timeout(mac->is_txq_empty, empty, empty, 50, in rtw89_mac_ptk_drop_by_band_and_wait()
6064 if (ret && !RTW89_CHK_FW_FEATURE(NO_PACKET_DROP, &rtwdev->fw)) in rtw89_mac_ptk_drop_by_band_and_wait()