Lines Matching +full:enum +full:- +full:name

1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2018-2019 Realtek Corporation
22 u32 rtw_phy_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
24 u32 rtw_phy_read_rf_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
26 bool rtw_phy_write_rf_reg_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
28 bool rtw_phy_write_rf_reg(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
30 bool rtw_phy_write_rf_reg_mix(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
47 enum rtw_bandwidth bw, u8 channel, u8 regd);
86 #define RTW_DECL_TABLE_PHY_COND_CORE(name, cfg, path) \ argument
87 const struct rtw_table name ## _tbl = { \
88 .data = name, \
89 .size = ARRAY_SIZE(name), \
95 #define RTW_DECL_TABLE_PHY_COND(name, cfg) \ argument
96 RTW_DECL_TABLE_PHY_COND_CORE(name, cfg, 0)
98 #define RTW_DECL_TABLE_RF_RADIO(name, path) \ argument
99 RTW_DECL_TABLE_PHY_COND_CORE(name, rtw_phy_cfg_rf, RF_PATH_ ## path)
101 #define RTW_DECL_TABLE_BB_PG(name) \ argument
102 const struct rtw_table name ## _tbl = { \
103 .data = name, \
104 .size = ARRAY_SIZE(name), \
108 #define RTW_DECL_TABLE_TXPWR_LMT(name) \ argument
109 const struct rtw_table name ## _tbl = { \
110 .data = name, \
111 .size = ARRAY_SIZE(name), \
117 const struct rtw_chip_info *chip = rtwdev->chip; in rtw_get_rfe_def()
118 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_get_rfe_def()
121 if (chip->rfe_defs_size == 0) in rtw_get_rfe_def()
124 if (efuse->rfe_option < chip->rfe_defs_size) in rtw_get_rfe_def()
125 rfe_def = &chip->rfe_defs[efuse->rfe_option]; in rtw_get_rfe_def()
127 rtw_dbg(rtwdev, RTW_DBG_PHY, "use rfe_def[%d]\n", efuse->rfe_option); in rtw_get_rfe_def()
135 if (!rfe_def || !rfe_def->phy_pg_tbl || !rfe_def->txpwr_lmt_tbl) { in rtw_check_supported_rfe()
137 rtwdev->efuse.rfe_option); in rtw_check_supported_rfe()
138 return -ENODEV; in rtw_check_supported_rfe()
159 enum rtw_phy_cck_pd_lv {