realtek/rtlwifi/wifi.h

1755 struct rtl_dm {  struct
1757 	long entry_min_undec_sm_pwdb;
1758 	long undec_sm_cck;
1759 	long undec_sm_pwdb;	/*out dm */
1760 	long entry_max_undec_sm_pwdb;
1761 	s32 ofdm_pkt_cnt;
1762 	bool dm_initialgain_enable;
1763 	bool dynamic_txpower_enable;
1764 	bool current_turbo_edca;
1765 	bool is_any_nonbepkts;	/*out dm */
1766 	bool is_cur_rdlstate;
1767 	bool txpower_trackinginit;
1768 	bool disable_framebursting;
1769 	bool cck_inch14;
1770 	bool txpower_tracking;
1771 	bool useramask;
1772 	bool rfpath_rxenable[4];
1773 	bool inform_fw_driverctrldm;
1774 	bool current_mrc_switch;
1775 	u8 txpowercount;
1776 	u8 powerindex_backup[6];
1778 	u8 thermalvalue_rxgain;
1779 	u8 thermalvalue_iqk;
1780 	u8 thermalvalue_lck;
1781 	u8 thermalvalue;
1782 	u8 last_dtp_lvl;
1783 	u8 thermalvalue_avg[AVG_THERMAL_NUM];
1784 	u8 thermalvalue_avg_index;
1785 	u8 tm_trigger;
1786 	bool done_txpower;
1787 	u8 dynamic_txhighpower_lvl;	/*Tx high power level */
1788 	u8 dm_flag;		/*Indicate each dynamic mechanism's status. */
1789 	u8 dm_flag_tmp;
1790 	u8 dm_type;
1791 	u8 dm_rssi_sel;
1792 	u8 txpower_track_control;
1793 	bool interrupt_migration;
1794 	bool disable_tx_int;
1795 	s8 ofdm_index[MAX_RF_PATH];
1796 	u8 default_ofdm_index;
1797 	u8 default_cck_index;
1798 	s8 cck_index;
1799 	s8 delta_power_index[MAX_RF_PATH];
1800 	s8 delta_power_index_last[MAX_RF_PATH];
1801 	s8 power_index_offset[MAX_RF_PATH];
1802 	s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
1803 	s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
1804 	s8 remnant_cck_idx;
1805 	bool modify_txagc_flag_path_a;
1806 	bool modify_txagc_flag_path_b;
1808 	bool one_entry_only;
1809 	struct dm_phy_dbg_info dbginfo;
1812 	bool atc_status;
1813 	bool large_cfo_hit;
1814 	bool is_freeze;
1815 	int cfo_tail[2];
1816 	int cfo_ave_pre;
1817 	int crystal_cap;
1818 	u8 cfo_threshold;
1819 	u32 packet_count;
1820 	u32 packet_count_pre;
1821 	u8 tx_rate;
1824 	u8	swing_idx_ofdm[MAX_RF_PATH];
1825 	u8	swing_idx_ofdm_cur;
1826 	u8	swing_idx_ofdm_base[MAX_RF_PATH];
1827 	bool	swing_flag_ofdm;
1828 	u8	swing_idx_cck;
1829 	u8	swing_idx_cck_cur;
1830 	u8	swing_idx_cck_base;
1831 	bool	swing_flag_cck;
1833 	s8	swing_diff_2g;
1834 	s8	swing_diff_5g;
1837 	bool supp_phymode_switch;
1840 	struct fast_ant_training fat_table;
1842 	u8	resp_tx_path;
1843 	u8	path_sel;
1844 	u32	patha_sum;
1845 	u32	pathb_sum;
1846 	u32	patha_cnt;
1847 	u32	pathb_cnt;
1849 	u8 pre_channel;
1850 	u8 *p_channel;
1851 	u8 linked_interval;
1853 	u64 last_tx_ok_cnt;
1854 	u64 last_rx_ok_cnt;
2861 #define rtl_dm(rtlpriv)		(&((rtlpriv)->dm))  macro