Lines Matching +full:rx +full:- +full:threshold

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
36 * Default offset is required for RSSI <-> dBm conversion.
128 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.
129 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.
130 * UART1_IDLE_TRESHOLD: UART1 IDLE over threshold.
132 * UART1_RX_BUFF_ERROR: UART1 RX buffer error.
133 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.
134 * UART2_RX_TRESHOLD: UART2 RX reaches threshold.
135 * UART2_IDLE_TRESHOLD: UART2 IDLE over threshold.
137 * UART2_RX_BUFF_ERROR: UART2 RX buffer error.
175 * UART1_TX_TRESHOLD: UART1 TX reaches threshold.
176 * UART1_RX_TRESHOLD: UART1 RX reaches threshold.
177 * UART1_IDLE_TRESHOLD: UART1 IDLE over threshold.
179 * UART1_RX_BUFF_ERROR: UART1 RX buffer error.
180 * UART2_TX_TRESHOLD: UART2 TX reaches threshold.
181 * UART2_RX_TRESHOLD: UART2 RX reaches threshold.
182 * UART2_IDLE_TRESHOLD: UART2 IDLE over threshold.
184 * UART2_RX_BUFF_ERROR: UART2 RX buffer error.
218 * KICK_DECRYPT: Kick decryption engine, self-clear.
228 * CSR11: Back-off control register.
229 * CWMIN: CWmin. Default cwmin is 31 (2^5 - 1).
230 * CWMAX: CWmax. Default cwmax is 1023 (2^10 - 1).
267 * TSF_SYNC: Tsf sync, 0: disable, 1: infra, 2: ad-hoc/master mode.
287 * CFP: ASIC is in contention-free period.
466 * RXCSR0: RX Control Register.
467 * DISABLE_RX: Disable rx engine.
496 * RXCSR1: RX descriptor configuration register.
497 * RXD_SIZE: Rx descriptor size, default is 32b.
498 * NUM_RXD: Number of rx entries in ring.
505 * RXCSR2: RX Ring base address register.
511 * RXCSR3: BBP ID register for Rx operation.
545 * RX_TRESHOLD: Rx threshold in dw to start pci access
547 * TX_TRESHOLD: Tx threshold in dw to start pci access
550 * ENABLE_CLK: Enable clk_run, pci clock can't going down to non-operational.
588 * CNT4: Rx FIFO overflow count.
647 * KICK_RX: Kick one-shot rx in one-shot rx mode.
648 * ONESHOT_RXMODE: Enable one-shot rx mode for debugging.
649 * BBPRX_RESET_MODE: Ralink bbp rx reset mode.
651 * AUTO_RXBBP: Auto rx logic access bbp control register.
665 * RALINKCSR: Ralink Rx auto-reset BBCR.
750 * RXPTR: Current RX ring address.
768 * ACKCNT1: RX ACK timeout count.
803 * FIFOCSR1: RX FIFO pointer.
818 * MACCSR2: TX_PE to RX_PE turn-around time control register
891 * KICK_ENCRYPT: Kick encryption engine, self-clear.
946 * UARTCSR1: UART1 RX register.
950 * UART2CSR1: UART2 RX register.
975 * R14: RX antenna control
1023 * LED_MODE: 0: default, 1: TX/RX activity,2: Single (ignore link), 3: rsvd.
1072 * RSSI <-> dBm offset calibration
1136 * Word6-9: Key
1150 * RX descriptor format for RX Ring.
1198 * Word6-9: Key