Lines Matching +full:wed +full:- +full:pcie
1 // SPDX-License-Identifier: ISC
95 { 0x74030000, 0x10000, 0x1000 }, /* PCIe MAC */
143 dev->reg_l1_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L1); in mt7996_reg_map_l1()
144 dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L1, in mt7996_reg_map_l1()
148 dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L1); in mt7996_reg_map_l1()
158 dev->reg_l2_backup = dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L2); in mt7996_reg_map_l2()
159 dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2, in mt7996_reg_map_l2()
163 dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L2); in mt7996_reg_map_l2()
171 if (unlikely(dev->reg_l1_backup)) { in mt7996_reg_remap_restore()
172 dev->bus_ops->wr(&dev->mt76, MT_HIF_REMAP_L1, dev->reg_l1_backup); in mt7996_reg_remap_restore()
173 dev->reg_l1_backup = 0; in mt7996_reg_remap_restore()
176 if (dev->reg_l2_backup) { in mt7996_reg_remap_restore()
177 dev->bus_ops->wr(&dev->mt76, MT_HIF_REMAP_L2, dev->reg_l2_backup); in mt7996_reg_remap_restore()
178 dev->reg_l2_backup = 0; in mt7996_reg_remap_restore()
191 for (i = 0; i < dev->reg.map_size; i++) { in __mt7996_reg_addr()
194 if (addr < dev->reg.map[i].phys) in __mt7996_reg_addr()
197 ofs = addr - dev->reg.map[i].phys; in __mt7996_reg_addr()
198 if (ofs > dev->reg.map[i].size) in __mt7996_reg_addr()
201 return dev->reg.map[i].mapped + ofs; in __mt7996_reg_addr()
209 if (dev_is_pci(dev->mt76.dev) && in __mt7996_reg_addr()
216 addr = addr - MT_INFRA_MCU_START + MT_INFRA_BASE; in __mt7996_reg_addr()
228 memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); in mt7996_memcpy_fromio()
235 return dev->bus_ops->rr(mdev, __mt7996_reg_addr(dev, offset)); in mt7996_rr()
242 dev->bus_ops->wr(mdev, __mt7996_reg_addr(dev, offset), val); in mt7996_wr()
249 return dev->bus_ops->rmw(mdev, __mt7996_reg_addr(dev, offset), mask, val); in mt7996_rmw()
253 static int mt7996_mmio_wed_reset(struct mtk_wed_device *wed) in mt7996_mmio_wed_reset() argument
255 struct mt76_dev *mdev = container_of(wed, struct mt76_dev, mmio.wed); in mt7996_mmio_wed_reset()
257 struct mt76_phy *mphy = &dev->mphy; in mt7996_mmio_wed_reset()
262 if (test_and_set_bit(MT76_STATE_WED_RESET, &mphy->state)) in mt7996_mmio_wed_reset()
263 return -EBUSY; in mt7996_mmio_wed_reset()
266 mphy->band_idx); in mt7996_mmio_wed_reset()
271 if (!wait_for_completion_timeout(&mdev->mmio.wed_reset, 20 * HZ)) { in mt7996_mmio_wed_reset()
272 dev_err(mdev->dev, "wed reset timeout\n"); in mt7996_mmio_wed_reset()
273 ret = -ETIMEDOUT; in mt7996_mmio_wed_reset()
277 clear_bit(MT76_STATE_WED_RESET, &mphy->state); in mt7996_mmio_wed_reset()
287 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; in mt7996_mmio_wed_init() local
294 dev->has_rro = true; in mt7996_mmio_wed_init()
296 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); in mt7996_mmio_wed_init()
299 wed = &dev->mt76.mmio.wed_hif2; in mt7996_mmio_wed_init()
301 wed->wlan.pci_dev = pci_dev; in mt7996_mmio_wed_init()
302 wed->wlan.bus_type = MTK_WED_BUS_PCIE; in mt7996_mmio_wed_init()
304 wed->wlan.base = devm_ioremap(dev->mt76.dev, in mt7996_mmio_wed_init()
307 wed->wlan.phy_base = pci_resource_start(pci_dev, 0); in mt7996_mmio_wed_init()
310 wed->wlan.wpdma_int = wed->wlan.phy_base + in mt7996_mmio_wed_init()
312 wed->wlan.wpdma_mask = wed->wlan.phy_base + in mt7996_mmio_wed_init()
314 wed->wlan.wpdma_tx = wed->wlan.phy_base + hif1_ofs + in mt7996_mmio_wed_init()
317 if (dev->has_rro) { in mt7996_mmio_wed_init()
318 wed->wlan.wpdma_txfree = wed->wlan.phy_base + hif1_ofs + in mt7996_mmio_wed_init()
321 wed->wlan.txfree_tbit = ffs(MT_INT_RX_TXFREE_EXT) - 1; in mt7996_mmio_wed_init()
323 wed->wlan.wpdma_txfree = wed->wlan.phy_base + hif1_ofs + in mt7996_mmio_wed_init()
326 wed->wlan.txfree_tbit = ffs(MT_INT_RX_DONE_WA_TRI) - 1; in mt7996_mmio_wed_init()
329 wed->wlan.wpdma_rx_glo = wed->wlan.phy_base + hif1_ofs + MT_WFDMA0_GLO_CFG; in mt7996_mmio_wed_init()
330 wed->wlan.wpdma_rx = wed->wlan.phy_base + hif1_ofs + in mt7996_mmio_wed_init()
334 wed->wlan.id = 0x7991; in mt7996_mmio_wed_init()
335 wed->wlan.tx_tbit[0] = ffs(MT_INT_TX_DONE_BAND2) - 1; in mt7996_mmio_wed_init()
337 wed->wlan.hw_rro = dev->has_rro; /* default on */ in mt7996_mmio_wed_init()
338 wed->wlan.wpdma_int = wed->wlan.phy_base + MT_INT_SOURCE_CSR; in mt7996_mmio_wed_init()
339 wed->wlan.wpdma_mask = wed->wlan.phy_base + MT_INT_MASK_CSR; in mt7996_mmio_wed_init()
340 wed->wlan.wpdma_tx = wed->wlan.phy_base + MT_TXQ_RING_BASE(0) + in mt7996_mmio_wed_init()
343 wed->wlan.wpdma_rx_glo = wed->wlan.phy_base + MT_WFDMA0_GLO_CFG; in mt7996_mmio_wed_init()
345 wed->wlan.wpdma_rx = wed->wlan.phy_base + in mt7996_mmio_wed_init()
349 wed->wlan.wpdma_rx_rro[0] = wed->wlan.phy_base + in mt7996_mmio_wed_init()
352 wed->wlan.wpdma_rx_rro[1] = wed->wlan.phy_base + hif1_ofs + in mt7996_mmio_wed_init()
355 wed->wlan.wpdma_rx_pg = wed->wlan.phy_base + in mt7996_mmio_wed_init()
359 wed->wlan.rx_nbuf = 65536; in mt7996_mmio_wed_init()
360 wed->wlan.rx_npkt = dev->hif2 ? 32768 : 24576; in mt7996_mmio_wed_init()
361 wed->wlan.rx_size = SKB_WITH_OVERHEAD(MT_RX_BUF_SIZE); in mt7996_mmio_wed_init()
363 wed->wlan.rx_tbit[0] = ffs(MT_INT_RX_DONE_BAND0) - 1; in mt7996_mmio_wed_init()
364 wed->wlan.rx_tbit[1] = ffs(MT_INT_RX_DONE_BAND2) - 1; in mt7996_mmio_wed_init()
366 wed->wlan.rro_rx_tbit[0] = ffs(MT_INT_RX_DONE_RRO_BAND0) - 1; in mt7996_mmio_wed_init()
367 wed->wlan.rro_rx_tbit[1] = ffs(MT_INT_RX_DONE_RRO_BAND2) - 1; in mt7996_mmio_wed_init()
369 wed->wlan.rx_pg_tbit[0] = ffs(MT_INT_RX_DONE_MSDU_PG_BAND0) - 1; in mt7996_mmio_wed_init()
370 wed->wlan.rx_pg_tbit[1] = ffs(MT_INT_RX_DONE_MSDU_PG_BAND1) - 1; in mt7996_mmio_wed_init()
371 wed->wlan.rx_pg_tbit[2] = ffs(MT_INT_RX_DONE_MSDU_PG_BAND2) - 1; in mt7996_mmio_wed_init()
373 wed->wlan.tx_tbit[0] = ffs(MT_INT_TX_DONE_BAND0) - 1; in mt7996_mmio_wed_init()
374 wed->wlan.tx_tbit[1] = ffs(MT_INT_TX_DONE_BAND1) - 1; in mt7996_mmio_wed_init()
375 if (dev->has_rro) { in mt7996_mmio_wed_init()
376 wed->wlan.wpdma_txfree = wed->wlan.phy_base + MT_RXQ_RING_BASE(0) + in mt7996_mmio_wed_init()
378 wed->wlan.txfree_tbit = ffs(MT_INT_RX_TXFREE_MAIN) - 1; in mt7996_mmio_wed_init()
380 wed->wlan.txfree_tbit = ffs(MT_INT_RX_DONE_WA_MAIN) - 1; in mt7996_mmio_wed_init()
381 wed->wlan.wpdma_txfree = wed->wlan.phy_base + MT_RXQ_RING_BASE(0) + in mt7996_mmio_wed_init()
384 dev->mt76.rx_token_size = MT7996_TOKEN_SIZE + wed->wlan.rx_npkt; in mt7996_mmio_wed_init()
387 wed->wlan.nbuf = MT7996_HW_TOKEN_SIZE; in mt7996_mmio_wed_init()
388 wed->wlan.token_start = MT7996_TOKEN_SIZE - wed->wlan.nbuf; in mt7996_mmio_wed_init()
390 wed->wlan.amsdu_max_subframes = 8; in mt7996_mmio_wed_init()
391 wed->wlan.amsdu_max_len = 1536; in mt7996_mmio_wed_init()
393 wed->wlan.init_buf = mt7996_wed_init_buf; in mt7996_mmio_wed_init()
394 wed->wlan.init_rx_buf = mt76_mmio_wed_init_rx_buf; in mt7996_mmio_wed_init()
395 wed->wlan.release_rx_buf = mt76_mmio_wed_release_rx_buf; in mt7996_mmio_wed_init()
396 wed->wlan.offload_enable = mt76_mmio_wed_offload_enable; in mt7996_mmio_wed_init()
397 wed->wlan.offload_disable = mt76_mmio_wed_offload_disable; in mt7996_mmio_wed_init()
399 wed->wlan.reset = mt7996_mmio_wed_reset; in mt7996_mmio_wed_init()
400 wed->wlan.reset_complete = mt76_mmio_wed_reset_complete; in mt7996_mmio_wed_init()
403 if (mtk_wed_device_attach(wed)) in mt7996_mmio_wed_init()
406 *irq = wed->irq; in mt7996_mmio_wed_init()
407 dev->mt76.dma_dev = wed->dev; in mt7996_mmio_wed_init()
423 mt76_mmio_init(&dev->mt76, mem_base); in mt7996_mmio_init()
427 dev->reg.base = mt7996_reg_base; in mt7996_mmio_init()
428 dev->reg.offs_rev = mt7996_offs; in mt7996_mmio_init()
429 dev->reg.map = mt7996_reg_map; in mt7996_mmio_init()
430 dev->reg.map_size = ARRAY_SIZE(mt7996_reg_map); in mt7996_mmio_init()
433 dev->reg.base = mt7996_reg_base; in mt7996_mmio_init()
434 dev->reg.offs_rev = mt7992_offs; in mt7996_mmio_init()
435 dev->reg.map = mt7996_reg_map; in mt7996_mmio_init()
436 dev->reg.map_size = ARRAY_SIZE(mt7996_reg_map); in mt7996_mmio_init()
439 return -EINVAL; in mt7996_mmio_init()
442 dev->bus_ops = dev->mt76.bus; in mt7996_mmio_init()
443 bus_ops = devm_kmemdup(dev->mt76.dev, dev->bus_ops, sizeof(*bus_ops), in mt7996_mmio_init()
446 return -ENOMEM; in mt7996_mmio_init()
448 bus_ops->rr = mt7996_rr; in mt7996_mmio_init()
449 bus_ops->wr = mt7996_wr; in mt7996_mmio_init()
450 bus_ops->rmw = mt7996_rmw; in mt7996_mmio_init()
451 dev->mt76.bus = bus_ops; in mt7996_mmio_init()
453 mdev->rev = (device_id << 16) | (mt76_rr(dev, MT_HW_REV) & 0xff); in mt7996_mmio_init()
455 dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); in mt7996_mmio_init()
463 struct mt76_dev *mdev = &dev->mt76; in mt7996_dual_hif_set_irq_mask()
466 spin_lock_irqsave(&mdev->mmio.irq_lock, flags); in mt7996_dual_hif_set_irq_mask()
468 mdev->mmio.irqmask &= ~clear; in mt7996_dual_hif_set_irq_mask()
469 mdev->mmio.irqmask |= set; in mt7996_dual_hif_set_irq_mask()
472 if (mtk_wed_device_active(&mdev->mmio.wed)) { in mt7996_dual_hif_set_irq_mask()
473 mtk_wed_device_irq_set_mask(&mdev->mmio.wed, in mt7996_dual_hif_set_irq_mask()
474 mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
475 if (mtk_wed_device_active(&mdev->mmio.wed_hif2)) { in mt7996_dual_hif_set_irq_mask()
476 mtk_wed_device_irq_set_mask(&mdev->mmio.wed_hif2, in mt7996_dual_hif_set_irq_mask()
477 mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
480 mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
481 mt76_wr(dev, MT_INT1_MASK_CSR, mdev->mmio.irqmask); in mt7996_dual_hif_set_irq_mask()
485 spin_unlock_irqrestore(&mdev->mmio.irq_lock, flags); in mt7996_dual_hif_set_irq_mask()
496 /* TODO: support 2/4/6/8 MSI-X vectors */
500 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; in mt7996_irq_tasklet() local
501 struct mtk_wed_device *wed_hif2 = &dev->mt76.mmio.wed_hif2; in mt7996_irq_tasklet()
504 if (dev->hif2 && mtk_wed_device_active(wed_hif2)) { in mt7996_irq_tasklet()
507 dev->mt76.mmio.irqmask); in mt7996_irq_tasklet()
509 napi_schedule(&dev->mt76.napi[MT_RXQ_TXFREE_BAND2]); in mt7996_irq_tasklet()
512 if (mtk_wed_device_active(wed)) { in mt7996_irq_tasklet()
513 mtk_wed_device_irq_set_mask(wed, 0); in mt7996_irq_tasklet()
514 intr = mtk_wed_device_irq_get(wed, dev->mt76.mmio.irqmask); in mt7996_irq_tasklet()
518 if (dev->hif2) in mt7996_irq_tasklet()
522 intr &= dev->mt76.mmio.irqmask; in mt7996_irq_tasklet()
524 if (dev->hif2) { in mt7996_irq_tasklet()
526 intr1 &= dev->mt76.mmio.irqmask; in mt7996_irq_tasklet()
532 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); in mt7996_irq_tasklet()
540 napi_schedule(&dev->mt76.tx_napi); in mt7996_irq_tasklet()
544 napi_schedule(&dev->mt76.napi[i]); in mt7996_irq_tasklet()
552 dev->recovery.state = val; in mt7996_irq_tasklet()
562 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) in mt7996_irq_handler()
563 mtk_wed_device_irq_set_mask(&dev->mt76.mmio.wed, 0); in mt7996_irq_handler()
567 if (dev->hif2) { in mt7996_irq_handler()
568 if (mtk_wed_device_active(&dev->mt76.mmio.wed_hif2)) in mt7996_irq_handler()
569 mtk_wed_device_irq_set_mask(&dev->mt76.mmio.wed_hif2, 0); in mt7996_irq_handler()
574 if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) in mt7996_irq_handler()
577 tasklet_schedule(&dev->mt76.irq_tasklet); in mt7996_irq_handler()
610 return ERR_PTR(-ENOMEM); in mt7996_mmio_probe()
618 tasklet_setup(&mdev->irq_tasklet, mt7996_irq_tasklet); in mt7996_mmio_probe()
625 mt76_free_device(&dev->mt76); in mt7996_mmio_probe()