Lines Matching full:dp
28 /* TODO: Any other peer specific DP cleanup */ in ath12k_dp_peer_cleanup()
53 reo_dest = ar->dp.mac_id + 1; in ath12k_dp_peer_setup()
186 ret = ath12k_hif_get_user_msi_vector(ab, "DP", in ath12k_dp_srng_msi_setup()
298 ath12k_warn(ab, "Not a valid ring type in dp :%d\n", type); in ath12k_dp_srng_setup()
354 struct ath12k_dp *dp) in ath12k_dp_tx_get_bank_profile() argument
364 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
366 for (i = 0; i < dp->num_bank_profiles; i++) { in ath12k_dp_tx_get_bank_profile()
367 if (dp->bank_profiles[i].is_configured && in ath12k_dp_tx_get_bank_profile()
368 (dp->bank_profiles[i].bank_config ^ bank_config) == 0) { in ath12k_dp_tx_get_bank_profile()
372 if (!dp->bank_profiles[i].is_configured || in ath12k_dp_tx_get_bank_profile()
373 !dp->bank_profiles[i].num_users) { in ath12k_dp_tx_get_bank_profile()
380 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
386 dp->bank_profiles[bank_id].is_configured = true; in ath12k_dp_tx_get_bank_profile()
387 dp->bank_profiles[bank_id].bank_config = bank_config; in ath12k_dp_tx_get_bank_profile()
390 dp->bank_profiles[bank_id].num_users++; in ath12k_dp_tx_get_bank_profile()
391 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
397 bank_id, bank_config, dp->bank_profiles[bank_id].bank_config, in ath12k_dp_tx_get_bank_profile()
398 dp->bank_profiles[bank_id].num_users); in ath12k_dp_tx_get_bank_profile()
403 void ath12k_dp_tx_put_bank_profile(struct ath12k_dp *dp, u8 bank_id) in ath12k_dp_tx_put_bank_profile() argument
405 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
406 dp->bank_profiles[bank_id].num_users--; in ath12k_dp_tx_put_bank_profile()
407 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
412 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_deinit_bank_profiles() local
414 kfree(dp->bank_profiles); in ath12k_dp_deinit_bank_profiles()
415 dp->bank_profiles = NULL; in ath12k_dp_deinit_bank_profiles()
420 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_init_bank_profiles() local
424 dp->num_bank_profiles = num_tcl_banks; in ath12k_dp_init_bank_profiles()
425 dp->bank_profiles = kmalloc_array(num_tcl_banks, in ath12k_dp_init_bank_profiles()
428 if (!dp->bank_profiles) in ath12k_dp_init_bank_profiles()
431 spin_lock_init(&dp->tx_bank_lock); in ath12k_dp_init_bank_profiles()
434 dp->bank_profiles[i].is_configured = false; in ath12k_dp_init_bank_profiles()
435 dp->bank_profiles[i].num_users = 0; in ath12k_dp_init_bank_profiles()
443 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_cleanup() local
446 ath12k_dp_srng_cleanup(ab, &dp->reo_status_ring); in ath12k_dp_srng_common_cleanup()
447 ath12k_dp_srng_cleanup(ab, &dp->reo_cmd_ring); in ath12k_dp_srng_common_cleanup()
448 ath12k_dp_srng_cleanup(ab, &dp->reo_except_ring); in ath12k_dp_srng_common_cleanup()
449 ath12k_dp_srng_cleanup(ab, &dp->rx_rel_ring); in ath12k_dp_srng_common_cleanup()
450 ath12k_dp_srng_cleanup(ab, &dp->reo_reinject_ring); in ath12k_dp_srng_common_cleanup()
452 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_comp_ring); in ath12k_dp_srng_common_cleanup()
453 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_data_ring); in ath12k_dp_srng_common_cleanup()
455 ath12k_dp_srng_cleanup(ab, &dp->tcl_status_ring); in ath12k_dp_srng_common_cleanup()
456 ath12k_dp_srng_cleanup(ab, &dp->tcl_cmd_ring); in ath12k_dp_srng_common_cleanup()
457 ath12k_dp_srng_cleanup(ab, &dp->wbm_desc_rel_ring); in ath12k_dp_srng_common_cleanup()
462 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_setup() local
468 ret = ath12k_dp_srng_setup(ab, &dp->wbm_desc_rel_ring, in ath12k_dp_srng_common_setup()
477 ret = ath12k_dp_srng_setup(ab, &dp->tcl_cmd_ring, HAL_TCL_CMD, 0, 0, in ath12k_dp_srng_common_setup()
484 ret = ath12k_dp_srng_setup(ab, &dp->tcl_status_ring, HAL_TCL_STATUS, in ath12k_dp_srng_common_setup()
495 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_data_ring, in ath12k_dp_srng_common_setup()
504 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_comp_ring, in ath12k_dp_srng_common_setup()
514 ret = ath12k_dp_srng_setup(ab, &dp->reo_reinject_ring, HAL_REO_REINJECT, in ath12k_dp_srng_common_setup()
522 ret = ath12k_dp_srng_setup(ab, &dp->rx_rel_ring, HAL_WBM2SW_RELEASE, in ath12k_dp_srng_common_setup()
530 ret = ath12k_dp_srng_setup(ab, &dp->reo_except_ring, HAL_REO_EXCEPTION, in ath12k_dp_srng_common_setup()
538 ret = ath12k_dp_srng_setup(ab, &dp->reo_cmd_ring, HAL_REO_CMD, in ath12k_dp_srng_common_setup()
545 srng = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; in ath12k_dp_srng_common_setup()
548 ret = ath12k_dp_srng_setup(ab, &dp->reo_status_ring, HAL_REO_STATUS, in ath12k_dp_srng_common_setup()
582 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_cleanup() local
583 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_cleanup()
602 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_setup() local
603 struct dp_link_desc_bank *link_desc_banks = dp->link_desc_banks; in ath12k_dp_scatter_idle_link_desc_setup()
604 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_setup()
694 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_link_desc_bank_alloc() local
723 ath12k_dp_link_desc_bank_free(ab, dp->link_desc_banks); in ath12k_dp_link_desc_bank_alloc()
742 struct ath12k_dp *dp = &ab->dp; in ath12k_wbm_idle_ring_setup() local
767 ret = ath12k_dp_srng_setup(ab, &dp->wbm_idle_ring, in ath12k_wbm_idle_ring_setup()
961 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_service_srng() local
962 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring; in ath12k_dp_service_srng()
986 struct ath12k_pdev_dp *dp; in ath12k_dp_pdev_pre_alloc() local
991 dp = &ar->dp; in ath12k_dp_pdev_pre_alloc()
992 dp->mac_id = i; in ath12k_dp_pdev_pre_alloc()
993 atomic_set(&dp->num_tx_pending, 0); in ath12k_dp_pdev_pre_alloc()
994 init_waitqueue_head(&dp->tx_empty_waitq); in ath12k_dp_pdev_pre_alloc()
1056 int ath12k_dp_htt_connect(struct ath12k_dp *dp) in ath12k_dp_htt_connect() argument
1068 status = ath12k_htc_connect_service(&dp->ab->htc, &conn_req, in ath12k_dp_htt_connect()
1074 dp->eid = conn_resp.eid; in ath12k_dp_htt_connect()
1115 arvif->bank_id = ath12k_dp_tx_get_bank_profile(ab, arvif, &ab->dp); in ath12k_dp_vdev_tx_attach()
1119 ath12k_err(ar->ab, "Failed to initialize DP TX Banks"); in ath12k_dp_vdev_tx_attach()
1128 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_cleanup() local
1133 if (!dp->spt_info) in ath12k_dp_cc_cleanup()
1137 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1139 list_for_each_entry_safe(desc_info, tmp, &dp->rx_desc_used_list, list) { in ath12k_dp_cc_cleanup()
1152 if (!dp->spt_info->rxbaddr[i]) in ath12k_dp_cc_cleanup()
1155 kfree(dp->spt_info->rxbaddr[i]); in ath12k_dp_cc_cleanup()
1156 dp->spt_info->rxbaddr[i] = NULL; in ath12k_dp_cc_cleanup()
1159 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1163 spin_lock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1165 list_for_each_entry_safe(tx_desc_info, tmp1, &dp->tx_desc_used_list[i], in ath12k_dp_cc_cleanup()
1178 spin_unlock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1182 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1186 if (!dp->spt_info->txbaddr[tx_spt_page]) in ath12k_dp_cc_cleanup()
1189 kfree(dp->spt_info->txbaddr[tx_spt_page]); in ath12k_dp_cc_cleanup()
1190 dp->spt_info->txbaddr[tx_spt_page] = NULL; in ath12k_dp_cc_cleanup()
1193 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1197 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_cleanup()
1198 if (!dp->spt_info[i].vaddr) in ath12k_dp_cc_cleanup()
1202 dp->spt_info[i].vaddr, dp->spt_info[i].paddr); in ath12k_dp_cc_cleanup()
1203 dp->spt_info[i].vaddr = NULL; in ath12k_dp_cc_cleanup()
1206 kfree(dp->spt_info); in ath12k_dp_cc_cleanup()
1211 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_cleanup() local
1216 if (!dp->reoq_lut.vaddr) in ath12k_dp_reoq_lut_cleanup()
1220 dp->reoq_lut.vaddr, dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_cleanup()
1221 dp->reoq_lut.vaddr = NULL; in ath12k_dp_reoq_lut_cleanup()
1229 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_free() local
1232 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_free()
1233 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_free()
1243 kfree(dp->tx_ring[i].tx_status); in ath12k_dp_free()
1307 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_get_desc_addr_ptr() local
1309 return dp->spt_info[ppt_idx].vaddr + spt_idx; in ath12k_dp_cc_get_desc_addr_ptr()
1340 ppt_idx > ab->dp.num_spt_pages || in ath12k_dp_get_tx_desc()
1351 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_desc_init() local
1357 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1365 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1369 dp->spt_info->rxbaddr[i] = &rx_descs[0]; in ath12k_dp_cc_desc_init()
1374 list_add_tail(&rx_descs[j].list, &dp->rx_desc_free_list); in ath12k_dp_cc_desc_init()
1382 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1385 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1391 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1397 dp->spt_info->txbaddr[tx_spt_page] = &tx_descs[0]; in ath12k_dp_cc_desc_init()
1404 &dp->tx_desc_free_list[pool_id]); in ath12k_dp_cc_desc_init()
1412 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1419 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_init() local
1423 INIT_LIST_HEAD(&dp->rx_desc_free_list); in ath12k_dp_cc_init()
1424 INIT_LIST_HEAD(&dp->rx_desc_used_list); in ath12k_dp_cc_init()
1425 spin_lock_init(&dp->rx_desc_lock); in ath12k_dp_cc_init()
1428 INIT_LIST_HEAD(&dp->tx_desc_free_list[i]); in ath12k_dp_cc_init()
1429 INIT_LIST_HEAD(&dp->tx_desc_used_list[i]); in ath12k_dp_cc_init()
1430 spin_lock_init(&dp->tx_desc_lock[i]); in ath12k_dp_cc_init()
1433 dp->num_spt_pages = ATH12K_NUM_SPT_PAGES; in ath12k_dp_cc_init()
1434 if (dp->num_spt_pages > ATH12K_MAX_PPT_ENTRIES) in ath12k_dp_cc_init()
1435 dp->num_spt_pages = ATH12K_MAX_PPT_ENTRIES; in ath12k_dp_cc_init()
1437 dp->spt_info = kcalloc(dp->num_spt_pages, sizeof(struct ath12k_spt_info), in ath12k_dp_cc_init()
1440 if (!dp->spt_info) { in ath12k_dp_cc_init()
1447 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_init()
1448 dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_cc_init()
1450 &dp->spt_info[i].paddr, in ath12k_dp_cc_init()
1453 if (!dp->spt_info[i].vaddr) { in ath12k_dp_cc_init()
1458 if (dp->spt_info[i].paddr & ATH12K_SPT_4K_ALIGN_CHECK) { in ath12k_dp_cc_init()
1466 dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET); in ath12k_dp_cc_init()
1483 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_setup() local
1488 dp->reoq_lut.vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_reoq_lut_setup()
1490 &dp->reoq_lut.paddr, in ath12k_dp_reoq_lut_setup()
1492 if (!dp->reoq_lut.vaddr) { in ath12k_dp_reoq_lut_setup()
1498 dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_setup()
1504 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_alloc() local
1511 dp->ab = ab; in ath12k_dp_alloc()
1513 INIT_LIST_HEAD(&dp->reo_cmd_list); in ath12k_dp_alloc()
1514 INIT_LIST_HEAD(&dp->reo_cmd_cache_flush_list); in ath12k_dp_alloc()
1515 spin_lock_init(&dp->reo_cmd_lock); in ath12k_dp_alloc()
1517 dp->reo_cmd_cache_flush_count = 0; in ath12k_dp_alloc()
1525 srng = &ab->hal.srng_list[dp->wbm_idle_ring.ring_id]; in ath12k_dp_alloc()
1527 ret = ath12k_dp_link_desc_setup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1559 dp->tx_ring[i].tcl_data_ring_id = i; in ath12k_dp_alloc()
1561 dp->tx_ring[i].tx_status_head = 0; in ath12k_dp_alloc()
1562 dp->tx_ring[i].tx_status_tail = DP_TX_COMP_RING_SIZE - 1; in ath12k_dp_alloc()
1563 dp->tx_ring[i].tx_status = kmalloc(size, GFP_KERNEL); in ath12k_dp_alloc()
1564 if (!dp->tx_ring[i].tx_status) { in ath12k_dp_alloc()
1580 /* Init any SOC level resource for DP */ in ath12k_dp_alloc()
1600 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1601 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_alloc()