Lines Matching defs:ath10k_hw_params

516 struct ath10k_hw_params {  struct
517 	u32 id;
518 	u16 dev_id;
519 	enum ath10k_bus bus;
520 	const char *name;
521 	u32 patch_load_addr;
522 	int uart_pin;
523 	u32 otp_exe_param;
528 	enum ath10k_hw_cc_wraparound_type cc_wraparound_type;
554 	struct ath10k_hw_params_fw {  argument
561 	} fw;
566 	bool sw_decrypt_mcast_mgmt;
569 	const struct ath10k_htt_rx_desc_ops *rx_desc_ops;
571 	const struct ath10k_hw_ops *hw_ops;
574 	int decap_align_bytes;
577 	const struct ath10k_hw_clk_params *hw_clk;
578 	int target_cpu_freq;
581 	int spectral_bin_discard;
586 	int vht160_mcs_rx_highest;
587 	int vht160_mcs_tx_highest;
590 	int n_cipher_suites;
592 	u32 num_peers;
593 	u32 ast_skid_limit;
594 	u32 num_wds_entries;
597 	bool target_64bit;
600 	u32 rx_ring_fill_level;
603 	bool shadow_reg_support;
606 	bool rri_on_ddr;
609 	int spectral_bin_offset;
614 	bool hw_filter_reset_required;
617 	bool fw_diag_ce_download;
620 	bool bmi_large_size_download;
625 	bool uart_pin_workaround;
628 	bool credit_size_workaround;
631 	bool tx_stats_over_pktlog;
634 	bool supports_peer_stats_info;
636 	bool dynamic_sar_support;
638 	bool hw_restart_disconnect;
640 	bool use_fw_tx_credits;
642 	bool delay_unmap_buffer;
645 	bool mcast_frame_registration;