Lines Matching full:phydev
306 static int mtk_socphy_read_page(struct phy_device *phydev) in mtk_socphy_read_page() argument
308 return __phy_read(phydev, MTK_EXT_PAGE_ACCESS); in mtk_socphy_read_page()
311 static int mtk_socphy_write_page(struct phy_device *phydev, int page) in mtk_socphy_write_page() argument
313 return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page); in mtk_socphy_write_page()
322 static int cal_cycle(struct phy_device *phydev, int devad, in cal_cycle() argument
328 phy_modify_mmd(phydev, devad, regnum, in cal_cycle()
330 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
333 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in cal_cycle()
338 phydev_err(phydev, "Calibration cycle timeout\n"); in cal_cycle()
342 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
344 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CAL_COMP) >> in cal_cycle()
346 phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret); in cal_cycle()
351 static int rext_fill_result(struct phy_device *phydev, u16 *buf) in rext_fill_result() argument
353 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG5, in rext_fill_result()
355 phy_modify_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_RG_BG_RASEL, in rext_fill_result()
361 static int rext_cal_efuse(struct phy_device *phydev, u32 *buf) in rext_cal_efuse() argument
367 rext_fill_result(phydev, rext_cal_val); in rext_cal_efuse()
372 static int tx_offset_fill_result(struct phy_device *phydev, u16 *buf) in tx_offset_fill_result() argument
374 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_A_B, in tx_offset_fill_result()
376 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_A_B, in tx_offset_fill_result()
378 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_C_D, in tx_offset_fill_result()
380 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_CR_TX_AMP_OFFSET_C_D, in tx_offset_fill_result()
386 static int tx_offset_cal_efuse(struct phy_device *phydev, u32 *buf) in tx_offset_cal_efuse() argument
395 tx_offset_fill_result(phydev, tx_offset_cal_val); in tx_offset_cal_efuse()
400 static int tx_amp_fill_result(struct phy_device *phydev, u16 *buf) in tx_amp_fill_result() argument
412 switch (phydev->drv->phy_id) { in tx_amp_fill_result()
433 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG, in tx_amp_fill_result()
435 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG, in tx_amp_fill_result()
437 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_A2, in tx_amp_fill_result()
439 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_A2, in tx_amp_fill_result()
442 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B1, in tx_amp_fill_result()
444 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B1, in tx_amp_fill_result()
446 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B2, in tx_amp_fill_result()
448 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B2, in tx_amp_fill_result()
451 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C1, in tx_amp_fill_result()
453 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C1, in tx_amp_fill_result()
455 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C2, in tx_amp_fill_result()
457 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C2, in tx_amp_fill_result()
460 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D1, in tx_amp_fill_result()
462 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D1, in tx_amp_fill_result()
464 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D2, in tx_amp_fill_result()
466 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D2, in tx_amp_fill_result()
472 static int tx_amp_cal_efuse(struct phy_device *phydev, u32 *buf) in tx_amp_cal_efuse() argument
480 tx_amp_fill_result(phydev, tx_amp_cal_val); in tx_amp_cal_efuse()
485 static int tx_r50_fill_result(struct phy_device *phydev, u16 tx_r50_cal_val, in tx_r50_fill_result() argument
491 if (phydev->drv->phy_id == MTK_GPHY_ID_MT7988) in tx_r50_fill_result()
513 phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, val | val << 8); in tx_r50_fill_result()
518 static int tx_r50_cal_efuse(struct phy_device *phydev, u32 *buf, in tx_r50_cal_efuse() argument
539 tx_r50_fill_result(phydev, tx_r50_cal_val, txg_calen_x); in tx_r50_cal_efuse()
544 static int tx_vcm_cal_sw(struct phy_device *phydev, u8 rg_txreserve_x) in tx_vcm_cal_sw() argument
550 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG0, in tx_vcm_cal_sw()
552 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG0, in tx_vcm_cal_sw()
554 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG1, in tx_vcm_cal_sw()
559 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
562 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
565 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
570 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
573 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
576 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
581 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
584 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
587 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
592 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
595 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
598 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
610 phydev_dbg(phydev, "Start TX-VCM SW cal.\n"); in tx_vcm_cal_sw()
613 ret = cal_cycle(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG9, in tx_vcm_cal_sw()
632 lower_ret = cal_cycle(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
642 upper_ret = cal_cycle(phydev, MDIO_MMD_VEND1, in tx_vcm_cal_sw()
662 cal_cycle(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG9, in tx_vcm_cal_sw()
669 phydev_dbg(phydev, "TX-VCM SW cal result: 0x%x\n", upper_idx); in tx_vcm_cal_sw()
673 cal_cycle(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG9, in tx_vcm_cal_sw()
680 phydev_warn(phydev, "TX-VCM SW cal result at low margin 0x%x\n", in tx_vcm_cal_sw()
685 phydev_warn(phydev, "TX-VCM SW cal result at high margin 0x%x\n", in tx_vcm_cal_sw()
692 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG0, in tx_vcm_cal_sw()
694 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG1, in tx_vcm_cal_sw()
696 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG0, in tx_vcm_cal_sw()
698 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_ANA_CAL_RG1, in tx_vcm_cal_sw()
705 static void mt798x_phy_common_finetune(struct phy_device *phydev) in mt798x_phy_common_finetune() argument
707 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5); in mt798x_phy_common_finetune()
709 __phy_write(phydev, 0x11, 0xc71); in mt798x_phy_common_finetune()
710 __phy_write(phydev, 0x12, 0xc); in mt798x_phy_common_finetune()
711 __phy_write(phydev, 0x10, 0x8fae); in mt798x_phy_common_finetune()
714 __phy_write(phydev, 0x11, 0x2f00); in mt798x_phy_common_finetune()
715 __phy_write(phydev, 0x12, 0xe); in mt798x_phy_common_finetune()
716 __phy_write(phydev, 0x10, 0x8fb0); in mt798x_phy_common_finetune()
719 __phy_write(phydev, 0x11, 0x55a0); in mt798x_phy_common_finetune()
720 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_common_finetune()
721 __phy_write(phydev, 0x10, 0x83aa); in mt798x_phy_common_finetune()
724 __phy_write(phydev, 0x11, 0x240); in mt798x_phy_common_finetune()
725 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_common_finetune()
726 __phy_write(phydev, 0x10, 0x9680); in mt798x_phy_common_finetune()
729 __phy_write(phydev, 0x11, 0x0); in mt798x_phy_common_finetune()
730 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_common_finetune()
731 __phy_write(phydev, 0x10, 0x9686); in mt798x_phy_common_finetune()
739 __phy_write(phydev, 0x11, 0xbaef); in mt798x_phy_common_finetune()
740 __phy_write(phydev, 0x12, 0x2e); in mt798x_phy_common_finetune()
741 __phy_write(phydev, 0x10, 0x968c); in mt798x_phy_common_finetune()
742 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); in mt798x_phy_common_finetune()
745 static void mt7981_phy_finetune(struct phy_device *phydev) in mt7981_phy_finetune() argument
760 phy_write_mmd(phydev, MDIO_MMD_VEND1, i, val[k++]); in mt7981_phy_finetune()
763 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5); in mt7981_phy_finetune()
765 __phy_write(phydev, 0x11, 0x600); in mt7981_phy_finetune()
766 __phy_write(phydev, 0x12, 0x0); in mt7981_phy_finetune()
767 __phy_write(phydev, 0x10, 0x8fc0); in mt7981_phy_finetune()
770 __phy_write(phydev, 0x11, 0x4c2a); in mt7981_phy_finetune()
771 __phy_write(phydev, 0x12, 0x3e); in mt7981_phy_finetune()
772 __phy_write(phydev, 0x10, 0x8fa4); in mt7981_phy_finetune()
777 __phy_write(phydev, 0x11, 0xd10a); in mt7981_phy_finetune()
778 __phy_write(phydev, 0x12, 0x34); in mt7981_phy_finetune()
779 __phy_write(phydev, 0x10, 0x8f82); in mt7981_phy_finetune()
782 __phy_write(phydev, 0x11, 0x5555); in mt7981_phy_finetune()
783 __phy_write(phydev, 0x12, 0x55); in mt7981_phy_finetune()
784 __phy_write(phydev, 0x10, 0x8ec0); in mt7981_phy_finetune()
785 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); in mt7981_phy_finetune()
788 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234, in mt7981_phy_finetune()
793 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LPF_CNT_VAL, 0x200); in mt7981_phy_finetune()
796 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K1_L, 0x82); in mt7981_phy_finetune()
797 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K1_U, 0x0); in mt7981_phy_finetune()
798 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K2_L, 0x103); in mt7981_phy_finetune()
799 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K2_U, 0x0); in mt7981_phy_finetune()
800 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K3_L, 0x82); in mt7981_phy_finetune()
801 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K3_U, 0x0); in mt7981_phy_finetune()
802 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K4_L, 0xd177); in mt7981_phy_finetune()
803 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K4_U, 0x3); in mt7981_phy_finetune()
804 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K5_L, 0x2c82); in mt7981_phy_finetune()
805 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LP_IIR2_K5_U, 0xe); in mt7981_phy_finetune()
808 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG27C, in mt7981_phy_finetune()
810 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG27D, in mt7981_phy_finetune()
814 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LDO_PUMP_EN_PAIRAB, 0x0); in mt7981_phy_finetune()
815 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LDO_PUMP_EN_PAIRCD, 0x0); in mt7981_phy_finetune()
817 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LDO_OUTPUT_V, 0x2222); in mt7981_phy_finetune()
820 static void mt7988_phy_finetune(struct phy_device *phydev) in mt7988_phy_finetune() argument
829 phy_write_mmd(phydev, MDIO_MMD_VEND1, i, val[i]); in mt7988_phy_finetune()
832 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_TX_FILTER, 0x5); in mt7988_phy_finetune()
834 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5); in mt7988_phy_finetune()
836 __phy_write(phydev, 0x11, 0x500); in mt7988_phy_finetune()
837 __phy_write(phydev, 0x12, 0x0); in mt7988_phy_finetune()
838 __phy_write(phydev, 0x10, 0x8fc0); in mt7988_phy_finetune()
845 __phy_write(phydev, 0x11, 0xb90a); in mt7988_phy_finetune()
846 __phy_write(phydev, 0x12, 0x6f); in mt7988_phy_finetune()
847 __phy_write(phydev, 0x10, 0x8f82); in mt7988_phy_finetune()
850 __phy_write(phydev, 0x11, 0xfbba); in mt7988_phy_finetune()
851 __phy_write(phydev, 0x12, 0xc3); in mt7988_phy_finetune()
852 __phy_write(phydev, 0x10, 0x87f8); in mt7988_phy_finetune()
854 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); in mt7988_phy_finetune()
857 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234, in mt7988_phy_finetune()
862 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LPF_CNT_VAL, 0x3ff); in mt7988_phy_finetune()
865 static void mt798x_phy_eee(struct phy_device *phydev) in mt798x_phy_eee() argument
867 phy_modify_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
874 phy_modify_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
880 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
884 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
887 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
890 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG238, in mt798x_phy_eee()
896 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG239, in mt798x_phy_eee()
900 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG2C7, in mt798x_phy_eee()
905 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG2D1, in mt798x_phy_eee()
912 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG323, in mt798x_phy_eee()
916 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG324, in mt798x_phy_eee()
921 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG326, in mt798x_phy_eee()
927 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5); in mt798x_phy_eee()
929 __phy_write(phydev, 0x11, 0xb); in mt798x_phy_eee()
930 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
931 __phy_write(phydev, 0x10, 0x9690); in mt798x_phy_eee()
934 __phy_write(phydev, 0x11, 0x114f); in mt798x_phy_eee()
935 __phy_write(phydev, 0x12, 0x2); in mt798x_phy_eee()
936 __phy_write(phydev, 0x10, 0x969a); in mt798x_phy_eee()
939 __phy_write(phydev, 0x11, 0x3028); in mt798x_phy_eee()
940 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
941 __phy_write(phydev, 0x10, 0x969e); in mt798x_phy_eee()
944 __phy_write(phydev, 0x11, 0x5010); in mt798x_phy_eee()
945 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
946 __phy_write(phydev, 0x10, 0x96a0); in mt798x_phy_eee()
949 __phy_write(phydev, 0x11, 0x24a); in mt798x_phy_eee()
950 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
951 __phy_write(phydev, 0x10, 0x96a8); in mt798x_phy_eee()
954 __phy_write(phydev, 0x11, 0x3210); in mt798x_phy_eee()
955 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
956 __phy_write(phydev, 0x10, 0x96b8); in mt798x_phy_eee()
959 __phy_write(phydev, 0x11, 0x1463); in mt798x_phy_eee()
960 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
961 __phy_write(phydev, 0x10, 0x96ca); in mt798x_phy_eee()
964 __phy_write(phydev, 0x11, 0x36); in mt798x_phy_eee()
965 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_eee()
966 __phy_write(phydev, 0x10, 0x8f80); in mt798x_phy_eee()
967 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); in mt798x_phy_eee()
969 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_3); in mt798x_phy_eee()
970 __phy_modify(phydev, MTK_PHY_LPI_REG_14, MTK_PHY_LPI_WAKE_TIMER_1000_MASK, in mt798x_phy_eee()
973 __phy_modify(phydev, MTK_PHY_LPI_REG_1c, MTK_PHY_SMI_DET_ON_THRESH_MASK, in mt798x_phy_eee()
975 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0); in mt798x_phy_eee()
977 phy_modify_mmd(phydev, MDIO_MMD_VEND1, in mt798x_phy_eee()
983 static int cal_sw(struct phy_device *phydev, enum CAL_ITEM cal_item, in cal_sw() argument
993 ret = tx_vcm_cal_sw(phydev, pair_n); in cal_sw()
1004 static int cal_efuse(struct phy_device *phydev, enum CAL_ITEM cal_item, in cal_efuse() argument
1014 ret = rext_cal_efuse(phydev, buf); in cal_efuse()
1017 ret = tx_offset_cal_efuse(phydev, buf); in cal_efuse()
1020 ret = tx_amp_cal_efuse(phydev, buf); in cal_efuse()
1023 ret = tx_r50_cal_efuse(phydev, buf, pair_n); in cal_efuse()
1035 static int start_cal(struct phy_device *phydev, enum CAL_ITEM cal_item, in start_cal() argument
1043 ret = cal_efuse(phydev, cal_item, start_pair, in start_cal()
1047 ret = cal_sw(phydev, cal_item, start_pair, end_pair); in start_cal()
1054 phydev_err(phydev, "cal %d failed\n", cal_item); in start_cal()
1061 static int mt798x_phy_calibration(struct phy_device *phydev) in mt798x_phy_calibration() argument
1068 cell = nvmem_cell_get(&phydev->mdio.dev, "phy-cal-data"); in mt798x_phy_calibration()
1081 phydev_err(phydev, "invalid efuse data\n"); in mt798x_phy_calibration()
1086 ret = start_cal(phydev, REXT, EFUSE_M, NO_PAIR, NO_PAIR, buf); in mt798x_phy_calibration()
1089 ret = start_cal(phydev, TX_OFFSET, EFUSE_M, NO_PAIR, NO_PAIR, buf); in mt798x_phy_calibration()
1092 ret = start_cal(phydev, TX_AMP, EFUSE_M, NO_PAIR, NO_PAIR, buf); in mt798x_phy_calibration()
1095 ret = start_cal(phydev, TX_R50, EFUSE_M, PAIR_A, PAIR_D, buf); in mt798x_phy_calibration()
1098 ret = start_cal(phydev, TX_VCM, SW_M, PAIR_A, PAIR_A, buf); in mt798x_phy_calibration()
1107 static int mt798x_phy_config_init(struct phy_device *phydev) in mt798x_phy_config_init() argument
1109 switch (phydev->drv->phy_id) { in mt798x_phy_config_init()
1111 mt7981_phy_finetune(phydev); in mt798x_phy_config_init()
1114 mt7988_phy_finetune(phydev); in mt798x_phy_config_init()
1118 mt798x_phy_common_finetune(phydev); in mt798x_phy_config_init()
1119 mt798x_phy_eee(phydev); in mt798x_phy_config_init()
1121 return mt798x_phy_calibration(phydev); in mt798x_phy_config_init()
1124 static int mt798x_phy_hw_led_on_set(struct phy_device *phydev, u8 index, in mt798x_phy_hw_led_on_set() argument
1128 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_hw_led_on_set()
1139 return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ? in mt798x_phy_hw_led_on_set()
1147 static int mt798x_phy_hw_led_blink_set(struct phy_device *phydev, u8 index, in mt798x_phy_hw_led_blink_set() argument
1151 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_hw_led_blink_set()
1162 return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ? in mt798x_phy_hw_led_blink_set()
1169 static int mt798x_phy_led_blink_set(struct phy_device *phydev, u8 index, in mt798x_phy_led_blink_set() argument
1185 err = mt798x_phy_hw_led_blink_set(phydev, index, blinking); in mt798x_phy_led_blink_set()
1189 return mt798x_phy_hw_led_on_set(phydev, index, false); in mt798x_phy_led_blink_set()
1192 static int mt798x_phy_led_brightness_set(struct phy_device *phydev, in mt798x_phy_led_brightness_set() argument
1197 err = mt798x_phy_hw_led_blink_set(phydev, index, false); in mt798x_phy_led_brightness_set()
1201 return mt798x_phy_hw_led_on_set(phydev, index, (value != LED_OFF)); in mt798x_phy_led_brightness_set()
1213 static int mt798x_phy_led_hw_is_supported(struct phy_device *phydev, u8 index, in mt798x_phy_led_hw_is_supported() argument
1226 static int mt798x_phy_led_hw_control_get(struct phy_device *phydev, u8 index, in mt798x_phy_led_hw_control_get() argument
1232 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_led_hw_control_get()
1238 on = phy_read_mmd(phydev, MDIO_MMD_VEND2, in mt798x_phy_led_hw_control_get()
1244 blink = phy_read_mmd(phydev, MDIO_MMD_VEND2, in mt798x_phy_led_hw_control_get()
1299 static int mt798x_phy_led_hw_control_set(struct phy_device *phydev, u8 index, in mt798x_phy_led_hw_control_set() argument
1303 struct mtk_socphy_priv *priv = phydev->priv; in mt798x_phy_led_hw_control_set()
1342 ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ? in mt798x_phy_led_hw_control_set()
1355 return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ? in mt798x_phy_led_hw_control_set()
1360 static bool mt7988_phy_led_get_polarity(struct phy_device *phydev, int led_num) in mt7988_phy_led_get_polarity() argument
1362 struct mtk_socphy_shared *priv = phydev->shared->priv; in mt7988_phy_led_get_polarity()
1370 if (polarities & BIT(phydev->mdio.addr)) in mt7988_phy_led_get_polarity()
1376 static int mt7988_phy_fix_leds_polarities(struct phy_device *phydev) in mt7988_phy_fix_leds_polarities() argument
1383 phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ? in mt7988_phy_fix_leds_polarities()
1386 mt7988_phy_led_get_polarity(phydev, index) ? in mt7988_phy_fix_leds_polarities()
1390 pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led"); in mt7988_phy_fix_leds_polarities()
1392 dev_err(&phydev->mdio.bus->dev, "Failed to setup PHY LED pinctrl\n"); in mt7988_phy_fix_leds_polarities()
1397 static int mt7988_phy_probe_shared(struct phy_device *phydev) in mt7988_phy_probe_shared() argument
1399 struct device_node *np = dev_of_node(&phydev->mdio.bus->dev); in mt7988_phy_probe_shared()
1400 struct mtk_socphy_shared *shared = phydev->shared->priv; in mt7988_phy_probe_shared()
1431 static void mt798x_phy_leds_state_init(struct phy_device *phydev) in mt798x_phy_leds_state_init() argument
1436 mt798x_phy_led_hw_control_get(phydev, i, NULL); in mt798x_phy_leds_state_init()
1439 static int mt7988_phy_probe(struct phy_device *phydev) in mt7988_phy_probe() argument
1445 if (phydev->mdio.addr > 3) in mt7988_phy_probe()
1448 err = devm_phy_package_join(&phydev->mdio.dev, phydev, 0, in mt7988_phy_probe()
1453 if (phy_package_probe_once(phydev)) { in mt7988_phy_probe()
1454 err = mt7988_phy_probe_shared(phydev); in mt7988_phy_probe()
1459 shared = phydev->shared->priv; in mt7988_phy_probe()
1460 priv = &shared->priv[phydev->mdio.addr]; in mt7988_phy_probe()
1462 phydev->priv = priv; in mt7988_phy_probe()
1464 mt798x_phy_leds_state_init(phydev); in mt7988_phy_probe()
1466 err = mt7988_phy_fix_leds_polarities(phydev); in mt7988_phy_probe()
1474 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG7, in mt7988_phy_probe()
1477 return mt798x_phy_calibration(phydev); in mt7988_phy_probe()
1480 static int mt7981_phy_probe(struct phy_device *phydev) in mt7981_phy_probe() argument
1484 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(struct mtk_socphy_priv), in mt7981_phy_probe()
1489 phydev->priv = priv; in mt7981_phy_probe()
1491 mt798x_phy_leds_state_init(phydev); in mt7981_phy_probe()
1493 return mt798x_phy_calibration(phydev); in mt7981_phy_probe()