Lines Matching +full:sgmii +full:- +full:enable +full:- +full:pll
1 // SPDX-License-Identifier: GPL-2.0+
23 #include <dt-bindings/net/qca-ar803x.h>
103 #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
130 /* AT803x supports either the XTAL input pad, an internal PLL or the
132 * is only used for 25 MHz output, all other frequencies need the PLL.
136 * By default the PLL is only enabled if there is a link. Otherwise
137 * the PHY will go into low power state and disabled the PLL. You can
138 * set the PLL_ON bit (see debug register 0x1f) to keep the PLL always
153 * but doesn't support choosing between XTAL/PLL and DSP.
191 /* don't turn off internal PLL */
456 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
457 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
458 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
459 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
460 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
461 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
468 phy_write(phydev, MII_BMCR, context->bmcr); in at803x_context_restore()
469 phy_write(phydev, MII_ADVERTISE, context->advertise); in at803x_context_restore()
470 phy_write(phydev, MII_CTRL1000, context->control1000); in at803x_context_restore()
471 phy_write(phydev, AT803X_INTR_ENABLE, context->int_enable); in at803x_context_restore()
472 phy_write(phydev, AT803X_SMART_SPEED, context->smart_speed); in at803x_context_restore()
473 phy_write(phydev, AT803X_LED_CONTROL, context->led_control); in at803x_context_restore()
481 if (wol->wolopts & WAKE_MAGIC) { in at803x_set_wol()
482 struct net_device *ndev = phydev->attached_dev; in at803x_set_wol()
492 return -ENODEV; in at803x_set_wol()
494 mac = (const u8 *)ndev->dev_addr; in at803x_set_wol()
497 return -EINVAL; in at803x_set_wol()
503 /* Enable WOL interrupt */ in at803x_set_wol()
539 wol->supported = WAKE_MAGIC; in at803x_get_wol()
540 wol->wolopts = 0; in at803x_get_wol()
547 wol->wolopts |= WAKE_MAGIC; in at803x_get_wol()
568 struct at803x_priv *priv = phydev->priv; in qca83xx_get_stat()
581 priv->stats[i] += val; in qca83xx_get_stat()
582 ret = priv->stats[i]; in qca83xx_get_stat()
622 struct device_node *node = phydev->mdio.dev.of_node; in at803x_parse_dt()
623 struct at803x_priv *priv = phydev->priv; in at803x_parse_dt()
631 if (of_property_read_bool(node, "qca,disable-smarteee")) in at803x_parse_dt()
632 priv->flags |= AT803X_DISABLE_SMARTEEE; in at803x_parse_dt()
634 if (of_property_read_bool(node, "qca,disable-hibernation-mode")) in at803x_parse_dt()
635 priv->flags |= AT803X_DISABLE_HIBERNATION_MODE; in at803x_parse_dt()
637 if (!of_property_read_u32(node, "qca,smarteee-tw-us-1g", &tw)) { in at803x_parse_dt()
639 phydev_err(phydev, "invalid qca,smarteee-tw-us-1g\n"); in at803x_parse_dt()
640 return -EINVAL; in at803x_parse_dt()
642 priv->smarteee_lpi_tw_1g = tw; in at803x_parse_dt()
645 if (!of_property_read_u32(node, "qca,smarteee-tw-us-100m", &tw)) { in at803x_parse_dt()
647 phydev_err(phydev, "invalid qca,smarteee-tw-us-100m\n"); in at803x_parse_dt()
648 return -EINVAL; in at803x_parse_dt()
650 priv->smarteee_lpi_tw_100m = tw; in at803x_parse_dt()
653 ret = of_property_read_u32(node, "qca,clk-out-frequency", &freq); in at803x_parse_dt()
669 phydev_err(phydev, "invalid qca,clk-out-frequency\n"); in at803x_parse_dt()
670 return -EINVAL; in at803x_parse_dt()
673 priv->clk_25m_reg |= FIELD_PREP(AT803X_CLK_OUT_MASK, sel); in at803x_parse_dt()
674 priv->clk_25m_mask |= AT803X_CLK_OUT_MASK; in at803x_parse_dt()
677 ret = of_property_read_u32(node, "qca,clk-out-strength", &strength); in at803x_parse_dt()
679 priv->clk_25m_mask |= AT803X_CLK_OUT_STRENGTH_MASK; in at803x_parse_dt()
682 priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_FULL; in at803x_parse_dt()
685 priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_HALF; in at803x_parse_dt()
688 priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_QUARTER; in at803x_parse_dt()
691 phydev_err(phydev, "invalid qca,clk-out-strength\n"); in at803x_parse_dt()
692 return -EINVAL; in at803x_parse_dt()
701 struct device *dev = &phydev->mdio.dev; in at803x_probe()
707 return -ENOMEM; in at803x_probe()
709 phydev->priv = priv; in at803x_probe()
720 struct at803x_priv *priv = phydev->priv; in at803x_get_features()
727 if (phydev->drv->phy_id != ATH8031_PHY_ID) in at803x_get_features()
741 if (!priv->is_1000basex) in at803x_get_features()
743 phydev->supported); in at803x_get_features()
750 struct at803x_priv *priv = phydev->priv; in at803x_smarteee_config()
754 if (priv->flags & AT803X_DISABLE_SMARTEEE) in at803x_smarteee_config()
759 if (priv->smarteee_lpi_tw_1g) { in at803x_smarteee_config()
761 val |= priv->smarteee_lpi_tw_1g << 8; in at803x_smarteee_config()
763 if (priv->smarteee_lpi_tw_100m) { in at803x_smarteee_config()
765 val |= priv->smarteee_lpi_tw_100m; in at803x_smarteee_config()
782 struct at803x_priv *priv = phydev->priv; in at803x_clk_out_config()
784 if (!priv->clk_25m_mask) in at803x_clk_out_config()
788 priv->clk_25m_mask, priv->clk_25m_reg); in at803x_clk_out_config()
793 struct at803x_priv *priv = phydev->priv; in at8031_pll_config()
795 /* The default after hardware reset is PLL OFF. After a soft reset, the in at8031_pll_config()
798 if (priv->flags & AT803X_KEEP_PLL_ENABLED) in at8031_pll_config()
808 struct at803x_priv *priv = phydev->priv; in at803x_hibernation_mode_config()
813 if (!(priv->flags & AT803X_DISABLE_HIBERNATION_MODE)) in at803x_hibernation_mode_config()
829 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in at803x_config_init()
830 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) in at803x_config_init()
837 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in at803x_config_init()
838 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) in at803x_config_init()
882 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in at803x_config_intr()
942 if (phydev->state == PHY_NOLINK && phydev->mdio.reset_gpio) { in at803x_link_change_notify()
963 /* Read the AT8035 PHY-Specific Status register, which indicates the in at803x_read_specific_status()
983 phydev->speed = SPEED_10; in at803x_read_specific_status()
986 phydev->speed = SPEED_100; in at803x_read_specific_status()
989 phydev->speed = SPEED_1000; in at803x_read_specific_status()
992 phydev->speed = SPEED_2500; in at803x_read_specific_status()
996 phydev->duplex = DUPLEX_FULL; in at803x_read_specific_status()
998 phydev->duplex = DUPLEX_HALF; in at803x_read_specific_status()
1001 phydev->mdix = ETH_TP_MDI_X; in at803x_read_specific_status()
1003 phydev->mdix = ETH_TP_MDI; in at803x_read_specific_status()
1007 phydev->mdix_ctrl = ETH_TP_MDI; in at803x_read_specific_status()
1010 phydev->mdix_ctrl = ETH_TP_MDI_X; in at803x_read_specific_status()
1013 phydev->mdix_ctrl = ETH_TP_MDI_AUTO; in at803x_read_specific_status()
1024 int err, old_link = phydev->link; in at803x_read_status()
1032 if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) in at803x_read_status()
1035 phydev->speed = SPEED_UNKNOWN; in at803x_read_status()
1036 phydev->duplex = DUPLEX_UNKNOWN; in at803x_read_status()
1037 phydev->pause = 0; in at803x_read_status()
1038 phydev->asym_pause = 0; in at803x_read_status()
1050 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) in at803x_read_status()
1083 ret = at803x_config_mdix(phydev, phydev->mdix_ctrl); in at803x_prepare_config_aneg()
1102 struct at803x_priv *priv = phydev->priv; in at803x_config_aneg()
1109 if (priv->is_1000basex) in at803x_config_aneg()
1143 FIELD_PREP(AT803X_SMART_SPEED_RETRY_LIMIT_MASK, cnt - 2); in at803x_set_downshift()
1152 return -EINVAL; in at803x_set_downshift()
1170 switch (tuna->id) { in at803x_get_tunable()
1174 return -EOPNOTSUPP; in at803x_get_tunable()
1181 switch (tuna->id) { in at803x_set_tunable()
1185 return -EOPNOTSUPP; in at803x_set_tunable()
1308 * auto-negotiating. Starting the test will restart the AN in at803x_cable_test_get_status()
1313 while (pair_mask && retries--) { in at803x_cable_test_get_status()
1332 /* Enable auto-negotiation, but advertise no capabilities, no link in at803x_cable_test_autoneg()
1333 * will be established. A restart of the auto-negotiation is not in at803x_cable_test_autoneg()
1385 .of_match = of_match_ptr("vddio-regulator"),
1398 .of_match = of_match_ptr("vddh-regulator"),
1408 struct at803x_priv *priv = phydev->priv; in at8031_register_regulators()
1409 struct device *dev = &phydev->mdio.dev; in at8031_register_regulators()
1415 priv->vddio_rdev = devm_regulator_register(dev, &vddio_desc, &config); in at8031_register_regulators()
1416 if (IS_ERR(priv->vddio_rdev)) { in at8031_register_regulators()
1418 return PTR_ERR(priv->vddio_rdev); in at8031_register_regulators()
1421 priv->vddh_rdev = devm_regulator_register(dev, &vddh_desc, &config); in at8031_register_regulators()
1422 if (IS_ERR(priv->vddh_rdev)) { in at8031_register_regulators()
1424 return PTR_ERR(priv->vddh_rdev); in at8031_register_regulators()
1446 sfp_parse_support(phydev->sfp_bus, id, sfp_support, interfaces); in at8031_sfp_insert()
1448 * Mask out non-supported modes so the correct interface is picked. in at8031_sfp_insert()
1453 dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n"); in at8031_sfp_insert()
1454 return -EINVAL; in at8031_sfp_insert()
1457 iface = sfp_select_interface(phydev->sfp_bus, sfp_support); in at8031_sfp_insert()
1459 /* Only 1000Base-X is supported by AR8031/8033 as the downstream SerDes in at8031_sfp_insert()
1461 * However, some copper modules detected as having a preferred SGMII in at8031_sfp_insert()
1462 * interface do default to and function in 1000Base-X mode, so just in at8031_sfp_insert()
1467 dev_warn(&phydev->mdio.dev, "module may not function if 1000Base-X not supported\n"); in at8031_sfp_insert()
1469 return -EINVAL; in at8031_sfp_insert()
1482 struct device_node *node = phydev->mdio.dev.of_node; in at8031_parse_dt()
1483 struct at803x_priv *priv = phydev->priv; in at8031_parse_dt()
1486 if (of_property_read_bool(node, "qca,keep-pll-enabled")) in at8031_parse_dt()
1487 priv->flags |= AT803X_KEEP_PLL_ENABLED; in at8031_parse_dt()
1493 ret = devm_regulator_get_enable_optional(&phydev->mdio.dev, in at8031_parse_dt()
1500 /* Only AR8031/8033 support 1000Base-X for SFP modules */ in at8031_parse_dt()
1506 struct at803x_priv *priv = phydev->priv; in at8031_probe()
1530 priv->is_1000basex = true; in at8031_probe()
1534 priv->is_fiber = true; in at8031_probe()
1548 struct at803x_priv *priv = phydev->priv; in at8031_config_init()
1557 priv->is_fiber ? AT803X_PAGE_FIBER : in at8031_config_init()
1575 /* First setup MAC address and enable WOL interrupt */ in at8031_set_wol()
1580 if (wol->wolopts & WAKE_MAGIC) in at8031_set_wol()
1581 /* Enable WOL function for 1588 */ in at8031_set_wol()
1596 struct at803x_priv *priv = phydev->priv; in at8031_config_intr()
1599 if (phydev->interrupts == PHY_INTERRUPT_ENABLED && in at8031_config_intr()
1600 priv->is_fiber) { in at8031_config_intr()
1620 struct at803x_priv *priv = phydev->priv; in at8031_read_status()
1622 if (priv->is_1000basex) in at8031_read_status()
1653 struct at803x_priv *priv = phydev->priv; in at8035_parse_dt()
1659 if (priv->clk_25m_mask) { in at8035_parse_dt()
1671 priv->clk_25m_reg &= AT8035_CLK_OUT_MASK; in at8035_parse_dt()
1672 priv->clk_25m_mask &= AT8035_CLK_OUT_MASK; in at8035_parse_dt()
1694 switch_revision = phydev->dev_flags & QCA8K_DEVFLAGS_REVISION_MASK; in qca83xx_config_init()
1724 * Disable on init and enable only with 100m speed following in qca8327_config_init()
1736 if (phydev->state == PHY_RUNNING) { in qca83xx_link_change_notify()
1737 if (phydev->speed == SPEED_100) in qca83xx_link_change_notify()
1753 if (!phydev->suspended) in qca83xx_resume()
1763 * restart auto-negotiation. Wait for reset to complete. in qca83xx_resume()
1812 /* Enable fast retrain */ in qca808x_phy_fast_retrain_config()
1843 static int qca808x_phy_ms_seed_enable(struct phy_device *phydev, bool enable) in qca808x_phy_ms_seed_enable() argument
1847 if (!enable) in qca808x_phy_ms_seed_enable()
1860 return (phydev->master_slave_get == MASTER_SLAVE_CFG_MASTER_FORCE) || in qca808x_is_prefer_master()
1861 (phydev->master_slave_get == MASTER_SLAVE_CFG_MASTER_PREFERRED); in qca808x_is_prefer_master()
1866 return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); in qca808x_has_fast_retrain_or_slave_seed()
1897 /* Enable seed and configure lower ramdom seed to make phy in qca808x_config_init()
1921 linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->lp_advertising, in qca808x_read_status()
1935 if (phydev->link) { in qca808x_read_status()
1936 if (phydev->speed == SPEED_2500) in qca808x_read_status()
1937 phydev->interface = PHY_INTERFACE_MODE_2500BASEX; in qca808x_read_status()
1939 phydev->interface = PHY_INTERFACE_MODE_SGMII; in qca808x_read_status()
1951 if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR || in qca808x_read_status()
2042 return -EINVAL; in qca808x_cdt_fault_length()
2076 /* Force 1000base-T needs to configure PMA/PMD and MII_BMCR */ in qca808x_cable_test_start()
2077 phydev->duplex = DUPLEX_FULL; in qca808x_cable_test_start()
2078 phydev->speed = SPEED_1000; in qca808x_cable_test_start()
2118 return -EINVAL; in qca808x_cable_test_get_pair_status()
2185 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); in qca808x_get_features()
2196 linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); in qca808x_get_features()
2213 if (phydev->autoneg == AUTONEG_DISABLE) in qca808x_config_aneg()
2216 if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising)) in qca808x_config_aneg()
2229 /* Assert interface sgmii fifo on link down, deassert it on link up, in qca808x_link_change_notify()
2232 mdiobus_c45_modify_changed(phydev->mdio.bus, phydev->mdio.addr + 1, in qca808x_link_change_notify()
2235 phydev->link ? QCA8081_PHY_FIFO_RSTN : 0); in qca808x_link_change_notify()
2316 .name = "Qualcomm Atheros AR9331 built-in PHY",
2332 .name = "Qualcomm Atheros QCA9561 built-in PHY",
2361 /* QCA8327-A from switch QCA8327-AL1A */
2364 .name = "Qualcomm Atheros 8327-A internal PHY",
2377 /* QCA8327-B from switch QCA8327-BL1A */
2380 .name = "Qualcomm Atheros 8327-B internal PHY",