Lines Matching +full:5 +full:g +full:- +full:usxgmii
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/pcs/pcs-xpcs.h>
14 #include "pcs-xpcs.h"
167 const struct xpcs_compat *compat = &id->compat[i]; in xpcs_find_compat()
169 for (j = 0; j < compat->num_interfaces; j++) in xpcs_find_compat()
170 if (compat->interface[j] == interface) in xpcs_find_compat()
181 compat = xpcs_find_compat(xpcs->id, interface); in xpcs_get_an_mode()
183 return -ENODEV; in xpcs_get_an_mode()
185 return compat->an_mode; in xpcs_get_an_mode()
194 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
195 if (compat->supported[i] == linkmode) in __xpcs_linkmode_supported()
206 return mdiodev_c45_read(xpcs->mdiodev, dev, reg); in xpcs_read()
211 return mdiodev_c45_write(xpcs->mdiodev, dev, reg, val); in xpcs_write()
217 return mdiodev_c45_modify_changed(xpcs->mdiodev, dev, reg, mask, set); in xpcs_modify_changed()
259 xpcs->dev_flag = DW_DEV_TXGBE; in xpcs_dev_flag()
275 } while (ret & MDIO_CTRL1_RESET && --retries); in xpcs_poll_reset()
277 return (ret & MDIO_CTRL1_RESET) ? -ETIMEDOUT : 0; in xpcs_poll_reset()
285 switch (compat->an_mode) { in xpcs_soft_reset()
296 return -1; in xpcs_soft_reset()
308 if ((__state)->link) \
309 dev_warn(&(__xpcs)->mdiodev->dev, ##__args); \
320 return -EFAULT; in xpcs_read_fault_c73()
338 return -EFAULT; in xpcs_read_fault_c73()
354 return -EFAULT; in xpcs_read_fault_c73()
426 /* By default, in USXGMII mode XPCS operates at 10G baud and in _xpcs_config_aneg_c73()
514 phylink_clear(state->lp_advertising, Autoneg); in xpcs_read_lpa_c73()
518 phylink_set(state->lp_advertising, Autoneg); in xpcs_read_lpa_c73()
521 for (i = ARRAY_SIZE(lpa); --i >= 0; ) { in xpcs_read_lpa_c73()
529 mii_c73_mod_linkmode(state->lp_advertising, lpa); in xpcs_read_lpa_c73()
537 unsigned long *adv = state->advertising; in xpcs_get_max_xlgmii_speed()
591 state->pause = MLO_PAUSE_TX | MLO_PAUSE_RX; in xpcs_resolve_pma()
592 state->duplex = DUPLEX_FULL; in xpcs_resolve_pma()
594 switch (state->interface) { in xpcs_resolve_pma()
596 state->speed = SPEED_10000; in xpcs_resolve_pma()
599 state->speed = xpcs_get_max_xlgmii_speed(xpcs, state); in xpcs_resolve_pma()
602 state->speed = SPEED_UNKNOWN; in xpcs_resolve_pma()
616 compat = xpcs_find_compat(xpcs->id, state->interface); in xpcs_validate()
623 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in xpcs_validate()
624 set_bit(compat->supported[i], xpcs_supported); in xpcs_validate()
636 const struct xpcs_compat *compat = &xpcs->id->compat[i]; in xpcs_get_interfaces()
638 for (j = 0; j < compat->num_interfaces; j++) in xpcs_get_interfaces()
639 if (compat->interface[j] < PHY_INTERFACE_MODE_MAX) in xpcs_get_interfaces()
640 __set_bit(compat->interface[j], interfaces); in xpcs_get_interfaces()
688 if (xpcs->dev_flag == DW_DEV_TXGBE) in xpcs_config_aneg_c37_sgmii()
691 /* For AN for C37 SGMII mode, the settings are :- in xpcs_config_aneg_c37_sgmii()
699 * 5) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable SGMII AN) in xpcs_config_aneg_c37_sgmii()
705 * trigger AN restart for MAC-side SGMII. in xpcs_config_aneg_c37_sgmii()
726 if (xpcs->dev_flag == DW_DEV_TXGBE) { in xpcs_config_aneg_c37_sgmii()
748 if (xpcs->dev_flag == DW_DEV_TXGBE) in xpcs_config_aneg_c37_sgmii()
770 if (xpcs->dev_flag == DW_DEV_TXGBE) in xpcs_config_aneg_c37_1000basex()
773 /* According to Chap 7.12, to set 1000BASE-X C37 AN, AN must in xpcs_config_aneg_c37_1000basex()
774 * be disabled first:- in xpcs_config_aneg_c37_1000basex()
776 * 2) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 00b (1000BASE-X C37) in xpcs_config_aneg_c37_1000basex()
794 if (!xpcs->pcs.poll) in xpcs_config_aneg_c37_1000basex()
857 compat = xpcs_find_compat(xpcs->id, interface); in xpcs_do_config()
859 return -ENODEV; in xpcs_do_config()
861 if (xpcs->dev_flag == DW_DEV_TXGBE) { in xpcs_do_config()
867 switch (compat->an_mode) { in xpcs_do_config()
894 return -1; in xpcs_do_config()
897 if (compat->pma_config) { in xpcs_do_config()
898 ret = compat->pma_config(xpcs); in xpcs_do_config()
926 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
927 * avoid unnecessary re-reads of this register to avoid missing in xpcs_get_state_c73()
928 * a link-down event. in xpcs_get_state_c73()
932 state->link = false; in xpcs_get_state_c73()
937 state->link = !!(pcs_stat1 & MDIO_STAT1_LSTATUS); in xpcs_get_state_c73()
946 state->link = 0; in xpcs_get_state_c73()
948 return xpcs_do_config(xpcs, state->interface, NULL, in xpcs_get_state_c73()
953 if (!state->link) in xpcs_get_state_c73()
957 state->advertising); in xpcs_get_state_c73()
959 /* The link status bit is latching-low, so it is important to in xpcs_get_state_c73()
960 * avoid unnecessary re-reads of this register to avoid missing in xpcs_get_state_c73()
961 * a link-down event. in xpcs_get_state_c73()
965 state->link = false; in xpcs_get_state_c73()
969 state->an_complete = xpcs_aneg_done_c73(xpcs, state, compat, in xpcs_get_state_c73()
971 if (!state->an_complete) { in xpcs_get_state_c73()
972 state->link = false; in xpcs_get_state_c73()
978 state->link = false; in xpcs_get_state_c73()
996 state->link = false; in xpcs_get_state_c37_sgmii()
997 state->speed = SPEED_UNKNOWN; in xpcs_get_state_c37_sgmii()
998 state->duplex = DUPLEX_UNKNOWN; in xpcs_get_state_c37_sgmii()
999 state->pause = 0; in xpcs_get_state_c37_sgmii()
1011 state->link = true; in xpcs_get_state_c37_sgmii()
1016 state->speed = SPEED_1000; in xpcs_get_state_c37_sgmii()
1018 state->speed = SPEED_100; in xpcs_get_state_c37_sgmii()
1020 state->speed = SPEED_10; in xpcs_get_state_c37_sgmii()
1023 state->duplex = DUPLEX_FULL; in xpcs_get_state_c37_sgmii()
1025 state->duplex = DUPLEX_HALF; in xpcs_get_state_c37_sgmii()
1029 state->link = true; in xpcs_get_state_c37_sgmii()
1037 state->speed = SPEED_1000; in xpcs_get_state_c37_sgmii()
1039 state->speed = SPEED_100; in xpcs_get_state_c37_sgmii()
1041 state->speed = SPEED_10; in xpcs_get_state_c37_sgmii()
1048 state->duplex = DUPLEX_FULL; in xpcs_get_state_c37_sgmii()
1050 state->duplex = DUPLEX_HALF; in xpcs_get_state_c37_sgmii()
1064 state->advertising)) { in xpcs_get_state_c37_1000basex()
1066 state->link = false; in xpcs_get_state_c37_1000basex()
1077 if (!xpcs->pcs.poll) { in xpcs_get_state_c37_1000basex()
1100 state->link = 0; in xpcs_get_state_2500basex()
1104 state->link = !!(ret & DW_VR_MII_MMD_STS_LINK_STS); in xpcs_get_state_2500basex()
1105 if (!state->link) in xpcs_get_state_2500basex()
1108 state->speed = SPEED_2500; in xpcs_get_state_2500basex()
1109 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; in xpcs_get_state_2500basex()
1110 state->duplex = DUPLEX_FULL; in xpcs_get_state_2500basex()
1122 compat = xpcs_find_compat(xpcs->id, state->interface); in xpcs_get_state()
1126 switch (compat->an_mode) { in xpcs_get_state()
1128 phylink_mii_c45_pcs_get_state(xpcs->mdiodev, state); in xpcs_get_state()
1250 * we found C73 AN-type device in xpcs_get_id()
1255 /* Next, search C37 PCS using Vendor-Specific MII MMD */ in xpcs_get_id()
1266 /* If Device IDs are not all zeros, we found C37 AN-type device */ in xpcs_get_id()
1378 return ERR_PTR(-ENOMEM); in xpcs_create()
1381 xpcs->mdiodev = mdiodev; in xpcs_create()
1389 if ((xpcs_id & entry->mask) != entry->id) in xpcs_create()
1392 xpcs->id = entry; in xpcs_create()
1396 ret = -ENODEV; in xpcs_create()
1404 xpcs->pcs.ops = &xpcs_phylink_ops; in xpcs_create()
1405 xpcs->pcs.neg_mode = true; in xpcs_create()
1407 if (xpcs->dev_flag != DW_DEV_TXGBE) { in xpcs_create()
1408 xpcs->pcs.poll = true; in xpcs_create()
1418 ret = -ENODEV; in xpcs_create()
1430 mdio_device_put(xpcs->mdiodev); in xpcs_destroy()