Lines Matching +full:mdio +full:- +full:bus

1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
23 /* Wait till MDIO interface is ready to accept a new transaction.*/
33 /* Enable the MDIO MDC. Called prior to a read/write operation */
37 ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK)); in axienet_mdio_mdc_enable()
40 /* Disable the MDIO MDC. Called after a read/write operation*/
51 * axienet_mdio_read - MDIO interface read function
52 * @bus: Pointer to mii bus structure
56 * Return: The register contents on success, -ETIMEDOUT on a timeout
62 static int axienet_mdio_read(struct mii_bus *bus, int phy_id, int reg) in axienet_mdio_read() argument
66 struct axienet_local *lp = bus->priv; in axienet_mdio_read()
92 dev_dbg(lp->dev, "axienet_mdio_read(phy_id=%i, reg=%x) == %x\n", in axienet_mdio_read()
100 * axienet_mdio_write - MDIO interface write function
101 * @bus: Pointer to mii bus structure
106 * Return: 0 on success, -ETIMEDOUT on a timeout
112 static int axienet_mdio_write(struct mii_bus *bus, int phy_id, int reg, in axienet_mdio_write() argument
116 struct axienet_local *lp = bus->priv; in axienet_mdio_write()
118 dev_dbg(lp->dev, "axienet_mdio_write(phy_id=%i, reg=%x, val=%x)\n", in axienet_mdio_write()
148 * axienet_mdio_enable - MDIO hardware setup function
150 * @np: Pointer to mdio device tree node.
152 * Return: 0 on success, -ETIMEDOUT on a timeout, -EOVERFLOW on a clock
155 * Sets up the MDIO interface by initializing the MDIO clock and enabling the
156 * MDIO interface in hardware.
165 lp->mii_clk_div = 0; in axienet_mdio_enable()
167 if (lp->axi_clk) { in axienet_mdio_enable()
168 host_clock = clk_get_rate(lp->axi_clk); in axienet_mdio_enable()
173 * bus clock frequency. This only works on certain platforms. in axienet_mdio_enable()
177 netdev_warn(lp->ndev, "Could not find CPU device node.\n"); in axienet_mdio_enable()
180 int ret = of_property_read_u32(np1, "clock-frequency", in axienet_mdio_enable()
183 netdev_warn(lp->ndev, "CPU clock-frequency property not found.\n"); in axienet_mdio_enable()
188 netdev_info(lp->ndev, "Setting assumed host clock to %u\n", in axienet_mdio_enable()
193 of_property_read_u32(np, "clock-frequency", &mdio_freq); in axienet_mdio_enable()
195 netdev_info(lp->ndev, "Setting non-standard mdio bus frequency to %u Hz\n", in axienet_mdio_enable()
217 * clk_div >= (fHOST / 5000000) - 1 in axienet_mdio_enable()
220 * "clock-frequency" from the CPU in axienet_mdio_enable()
223 clk_div = (host_clock / (mdio_freq * 2)) - 1; in axienet_mdio_enable()
234 netdev_warn(lp->ndev, "MDIO clock divisor overflow\n"); in axienet_mdio_enable()
235 return -EOVERFLOW; in axienet_mdio_enable()
237 lp->mii_clk_div = (u8)clk_div; in axienet_mdio_enable()
239 netdev_dbg(lp->ndev, in axienet_mdio_enable()
240 "Setting MDIO clock divisor to %u/%u Hz host clock.\n", in axienet_mdio_enable()
241 lp->mii_clk_div, host_clock); in axienet_mdio_enable()
253 * axienet_mdio_setup - MDIO setup function
256 * Return: 0 on success, -ETIMEDOUT on a timeout, -EOVERFLOW on a clock
257 * divisor overflow, -ENOMEM when mdiobus_alloc (to allocate
258 * memory for mii bus structure) fails.
260 * Sets up the MDIO interface by initializing the MDIO clock.
261 * Register the MDIO interface.
266 struct mii_bus *bus; in axienet_mdio_setup() local
269 bus = mdiobus_alloc(); in axienet_mdio_setup()
270 if (!bus) in axienet_mdio_setup()
271 return -ENOMEM; in axienet_mdio_setup()
273 snprintf(bus->id, MII_BUS_ID_SIZE, "axienet-%.8llx", in axienet_mdio_setup()
274 (unsigned long long)lp->regs_start); in axienet_mdio_setup()
276 bus->priv = lp; in axienet_mdio_setup()
277 bus->name = "Xilinx Axi Ethernet MDIO"; in axienet_mdio_setup()
278 bus->read = axienet_mdio_read; in axienet_mdio_setup()
279 bus->write = axienet_mdio_write; in axienet_mdio_setup()
280 bus->parent = lp->dev; in axienet_mdio_setup()
281 lp->mii_bus = bus; in axienet_mdio_setup()
283 mdio_node = of_get_child_by_name(lp->dev->of_node, "mdio"); in axienet_mdio_setup()
287 ret = of_mdiobus_register(bus, mdio_node); in axienet_mdio_setup()
298 mdiobus_free(bus); in axienet_mdio_setup()
299 lp->mii_bus = NULL; in axienet_mdio_setup()
304 * axienet_mdio_teardown - MDIO remove function
307 * Unregisters the MDIO and frees any associate memory for mii bus.
311 mdiobus_unregister(lp->mii_bus); in axienet_mdio_teardown()
312 mdiobus_free(lp->mii_bus); in axienet_mdio_teardown()
313 lp->mii_bus = NULL; in axienet_mdio_teardown()