Lines Matching +full:eee +full:- +full:broken +full:- +full:100 +full:tx
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
26 #include <linux/dma-mapping.h>
38 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
39 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
40 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
41 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
42 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
43 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
44 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
45 #define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
46 #define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
47 #define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
48 #define FIRMWARE_8411_2 "rtl_nic/rtl8411-2.fw"
49 #define FIRMWARE_8106E_1 "rtl_nic/rtl8106e-1.fw"
50 #define FIRMWARE_8106E_2 "rtl_nic/rtl8106e-2.fw"
51 #define FIRMWARE_8168G_2 "rtl_nic/rtl8168g-2.fw"
52 #define FIRMWARE_8168G_3 "rtl_nic/rtl8168g-3.fw"
53 #define FIRMWARE_8168H_2 "rtl_nic/rtl8168h-2.fw"
54 #define FIRMWARE_8168FP_3 "rtl_nic/rtl8168fp-3.fw"
55 #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
56 #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
57 #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
63 #define R8169_RX_BUF_SIZE (SZ_16K - 1)
64 #define NUM_TX_DESC 256 /* Number of Tx descriptor registers */
76 #define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
77 #define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
78 #define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
79 #define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
80 #define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
81 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))
83 #define JUMBO_4K (4 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
84 #define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
85 #define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
86 #define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
98 /* PCI-E devices. */
185 #define TXCFG_AUTO_FIFO (1 << 7) /* 8111e-vl */
186 #define TXCFG_EMPTY (1 << 11) /* 8111e-vl */
392 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
411 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
600 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
602 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
603 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
607 struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
643 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
669 return &tp->pci_dev->dev; in tp_to_dev()
676 raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags); in rtl_lock_config_regs()
677 if (!--tp->cfg9346_usage_count) in rtl_lock_config_regs()
679 raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags); in rtl_lock_config_regs()
686 raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags); in rtl_unlock_config_regs()
687 if (!tp->cfg9346_usage_count++) in rtl_unlock_config_regs()
689 raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags); in rtl_unlock_config_regs()
703 raw_spin_lock_irqsave(&tp->config25_lock, flags); in rtl_mod_config2()
706 raw_spin_unlock_irqrestore(&tp->config25_lock, flags); in rtl_mod_config2()
714 raw_spin_lock_irqsave(&tp->config25_lock, flags); in rtl_mod_config5()
717 raw_spin_unlock_irqrestore(&tp->config25_lock, flags); in rtl_mod_config5()
722 return tp->mac_version >= RTL_GIGA_MAC_VER_61; in rtl_is_8125()
727 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_is_8168evl_up()
728 tp->mac_version != RTL_GIGA_MAC_VER_39 && in rtl_is_8168evl_up()
729 tp->mac_version <= RTL_GIGA_MAC_VER_53; in rtl_is_8168evl_up()
734 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_supports_eee()
735 tp->mac_version != RTL_GIGA_MAC_VER_37 && in rtl_supports_eee()
736 tp->mac_version != RTL_GIGA_MAC_VER_39; in rtl_supports_eee()
758 if (c->check(tp) == high) in rtl_loop_wait()
764 netdev_err(tp->dev, "%s == %d (loop: %d, delay: %lu).\n", in rtl_loop_wait()
765 c->msg, !high, n, usecs); in rtl_loop_wait()
802 mutex_lock(&tp->led_lock); in rtl8168_led_mod_ctrl()
804 mutex_unlock(&tp->led_lock); in rtl8168_led_mod_ctrl()
830 struct pci_dev *pdev = tp->pci_dev; in r8169_get_led_name()
834 domain = pci_domain_nr(pdev->bus); in r8169_get_led_name()
840 if (pdev->multifunction) in r8169_get_led_name()
841 snprintf(pfun, sizeof(pfun), "f%d", PCI_FUNC(pdev->devfn)); in r8169_get_led_name()
845 snprintf(buf, buf_len, "en%sp%ds%d%s-%d::lan", pdom, pdev->bus->number, in r8169_get_led_name()
846 PCI_SLOT(pdev->devfn), pfun, idx); in r8169_get_led_name()
853 (tp->mac_version == RTL_GIGA_MAC_VER_52 || in r8168fp_adjust_ocp_cmd()
854 tp->mac_version == RTL_GIGA_MAC_VER_53)) in r8168fp_adjust_ocp_cmd()
875 rtl_loop_wait_low(tp, &rtl_eriar_cond, 100, 100); in _rtl_eri_write()
891 return rtl_loop_wait_high(tp, &rtl_eriar_cond, 100, 100) ? in _rtl_eri_read()
945 (RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT; in r8168_phy_ocp_read()
960 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_write()
962 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_write()
980 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_read()
982 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_read()
993 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_modify()
996 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_modify()
1000 * PHY MCU interrupts before PHY power-down.
1004 switch (tp->mac_version) { in rtl8168g_phy_suspend_quirk()
1019 tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE; in r8168g_mdio_write()
1023 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_write()
1024 reg -= 0x10; in r8168g_mdio_write()
1026 if (tp->ocp_base == OCP_STD_PHY_BASE && reg == MII_BMCR) in r8168g_mdio_write()
1029 r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value); in r8168g_mdio_write()
1035 return tp->ocp_base == OCP_STD_PHY_BASE ? 0 : tp->ocp_base >> 4; in r8168g_mdio_read()
1037 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_read()
1038 reg -= 0x10; in r8168g_mdio_read()
1040 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2); in r8168g_mdio_read()
1046 tp->ocp_base = value << 4; in mac_mcu_write()
1050 r8168_mac_ocp_write(tp, tp->ocp_base + reg, value); in mac_mcu_write()
1055 return r8168_mac_ocp_read(tp, tp->ocp_base + reg); in mac_mcu_read()
1082 RTL_R32(tp, PHYAR) & 0xffff : -ETIMEDOUT; in r8169_mdio_read()
1138 switch (tp->mac_version) { in rtl_writephy()
1154 switch (tp->mac_version) { in rtl_readphy()
1175 rtl_loop_wait_low(tp, &rtl_ephyar_cond, 10, 100); in rtl_ephy_write()
1184 return rtl_loop_wait_high(tp, &rtl_ephyar_cond, 10, 100) ? in rtl_ephy_read()
1191 return rtl_loop_wait_high(tp, &rtl_ocpar_cond, 100, 20) ? in r8168dp_ocp_read()
1205 rtl_loop_wait_low(tp, &rtl_ocpar_cond, 100, 20); in r8168dp_ocp_write()
1228 return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10; in rtl8168_get_ocp_reg()
1273 if (tp->dash_type == RTL_DASH_DP) in rtl8168_driver_start()
1295 if (tp->dash_type == RTL_DASH_DP) in rtl8168_driver_stop()
1315 switch (tp->dash_type) { in rtl_dash_is_enabled()
1327 switch (tp->mac_version) { in rtl_get_dash_type()
1340 switch (tp->mac_version) { in rtl_set_d3_pll_down()
1370 return rtl_loop_wait_high(tp, &rtl_efusear_cond, 100, 300) ? in rtl8168d_efuse_read()
1401 RTL_W32(tp, IntrMask_8125, tp->irq_mask); in rtl_irq_enable()
1403 RTL_W16(tp, IntrMask, tp->irq_mask); in rtl_irq_enable()
1415 struct phy_device *phydev = tp->phydev; in rtl_link_chg_patch()
1417 if (tp->mac_version == RTL_GIGA_MAC_VER_34 || in rtl_link_chg_patch()
1418 tp->mac_version == RTL_GIGA_MAC_VER_38) { in rtl_link_chg_patch()
1419 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1422 } else if (phydev->speed == SPEED_100) { in rtl_link_chg_patch()
1430 } else if (tp->mac_version == RTL_GIGA_MAC_VER_35 || in rtl_link_chg_patch()
1431 tp->mac_version == RTL_GIGA_MAC_VER_36) { in rtl_link_chg_patch()
1432 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1439 } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) { in rtl_link_chg_patch()
1440 if (phydev->speed == SPEED_10) { in rtl_link_chg_patch()
1455 wol->supported = WAKE_ANY; in rtl8169_get_wol()
1456 wol->wolopts = tp->saved_wolopts; in rtl8169_get_wol()
1480 tmp--; in __rtl8169_set_wol()
1486 tmp--; in __rtl8169_set_wol()
1493 raw_spin_lock_irqsave(&tp->config25_lock, flags); in __rtl8169_set_wol()
1500 raw_spin_unlock_irqrestore(&tp->config25_lock, flags); in __rtl8169_set_wol()
1502 switch (tp->mac_version) { in __rtl8169_set_wol()
1525 if (!tp->dash_enabled) { in __rtl8169_set_wol()
1527 tp->dev->wol_enabled = wolopts ? 1 : 0; in __rtl8169_set_wol()
1535 if (wol->wolopts & ~WAKE_ANY) in rtl8169_set_wol()
1536 return -EINVAL; in rtl8169_set_wol()
1538 tp->saved_wolopts = wol->wolopts; in rtl8169_set_wol()
1539 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_set_wol()
1548 struct rtl_fw *rtl_fw = tp->rtl_fw; in rtl8169_get_drvinfo()
1550 strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); in rtl8169_get_drvinfo()
1551 strscpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info)); in rtl8169_get_drvinfo()
1552 BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); in rtl8169_get_drvinfo()
1554 strscpy(info->fw_version, rtl_fw->version, in rtl8169_get_drvinfo()
1555 sizeof(info->fw_version)); in rtl8169_get_drvinfo()
1568 if (dev->mtu > TD_MSS_MAX) in rtl8169_fix_features()
1571 if (dev->mtu > ETH_DATA_LEN && in rtl8169_fix_features()
1572 tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl8169_fix_features()
1606 tp->cp_cmd |= RxChkSum; in rtl8169_set_features()
1608 tp->cp_cmd &= ~RxChkSum; in rtl8169_set_features()
1612 tp->cp_cmd |= RxVlan; in rtl8169_set_features()
1614 tp->cp_cmd &= ~RxVlan; in rtl8169_set_features()
1617 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl8169_set_features()
1631 u32 opts2 = le32_to_cpu(desc->opts2); in rtl8169_rx_vlan_tag()
1641 u32 __iomem *data = tp->mmio_addr; in rtl8169_get_regs()
1671 return -EOPNOTSUPP; in rtl8169_get_sset_count()
1682 u32 cmd = lower_32_bits(tp->counters_phys_addr); in rtl8169_do_counters()
1684 RTL_W32(tp, CounterAddrHigh, upper_32_bits(tp->counters_phys_addr)); in rtl8169_do_counters()
1698 * is disabled. If 0xff chip may be in a PCI power-save state. in rtl8169_update_counters()
1706 struct rtl8169_counters *counters = tp->counters; in rtl8169_init_counter_offsets()
1723 if (tp->tc_offset.inited) in rtl8169_init_counter_offsets()
1726 if (tp->mac_version >= RTL_GIGA_MAC_VER_19) { in rtl8169_init_counter_offsets()
1730 tp->tc_offset.tx_errors = counters->tx_errors; in rtl8169_init_counter_offsets()
1731 tp->tc_offset.tx_multi_collision = counters->tx_multi_collision; in rtl8169_init_counter_offsets()
1732 tp->tc_offset.tx_aborted = counters->tx_aborted; in rtl8169_init_counter_offsets()
1733 tp->tc_offset.rx_missed = counters->rx_missed; in rtl8169_init_counter_offsets()
1736 tp->tc_offset.inited = true; in rtl8169_init_counter_offsets()
1745 counters = tp->counters; in rtl8169_get_ethtool_stats()
1748 data[0] = le64_to_cpu(counters->tx_packets); in rtl8169_get_ethtool_stats()
1749 data[1] = le64_to_cpu(counters->rx_packets); in rtl8169_get_ethtool_stats()
1750 data[2] = le64_to_cpu(counters->tx_errors); in rtl8169_get_ethtool_stats()
1751 data[3] = le32_to_cpu(counters->rx_errors); in rtl8169_get_ethtool_stats()
1752 data[4] = le16_to_cpu(counters->rx_missed); in rtl8169_get_ethtool_stats()
1753 data[5] = le16_to_cpu(counters->align_errors); in rtl8169_get_ethtool_stats()
1754 data[6] = le32_to_cpu(counters->tx_one_collision); in rtl8169_get_ethtool_stats()
1755 data[7] = le32_to_cpu(counters->tx_multi_collision); in rtl8169_get_ethtool_stats()
1756 data[8] = le64_to_cpu(counters->rx_unicast); in rtl8169_get_ethtool_stats()
1757 data[9] = le64_to_cpu(counters->rx_broadcast); in rtl8169_get_ethtool_stats()
1758 data[10] = le32_to_cpu(counters->rx_multicast); in rtl8169_get_ethtool_stats()
1759 data[11] = le16_to_cpu(counters->tx_aborted); in rtl8169_get_ethtool_stats()
1760 data[12] = le16_to_cpu(counters->tx_underun); in rtl8169_get_ethtool_stats()
1775 * > 1 - the availability of the IntrMitigate (0xe2) register through the
1780 * > 2 - the Tx timer unit at gigabit speed
1786 * bit[1:0] \ speed 1000M 100M 10M
1793 * bit[1:0] \ speed 1000M 100M 10M
1800 /* rx/tx scale factors for all CPlusCmd[0:1] cases */
1824 /* get rx/tx scale vector corresponding to current speed */
1830 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_coalesce_info()
1836 if (tp->phydev->speed == SPEED_UNKNOWN) in rtl_coalesce_info()
1839 for (; ci->speed; ci++) { in rtl_coalesce_info()
1840 if (tp->phydev->speed == ci->speed) in rtl_coalesce_info()
1844 return ERR_PTR(-ELNRNG); in rtl_coalesce_info()
1858 return -EOPNOTSUPP; in rtl_get_coalesce()
1862 /* get rx/tx scale corresponding to current speed and CPlusCmd[0:1] */ in rtl_get_coalesce()
1867 scale = ci->scale_nsecs[tp->cp_cmd & INTT_MASK]; in rtl_get_coalesce()
1872 ec->tx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
1876 ec->tx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
1879 ec->rx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
1882 ec->rx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
1899 if (usec <= ci->scale_nsecs[i] * RTL_COALESCE_T_MAX / 1000U) { in rtl_coalesce_choose_scale()
1901 return ci->scale_nsecs[i]; in rtl_coalesce_choose_scale()
1905 return -ERANGE; in rtl_coalesce_choose_scale()
1914 u32 tx_fr = ec->tx_max_coalesced_frames; in rtl_set_coalesce()
1915 u32 rx_fr = ec->rx_max_coalesced_frames; in rtl_set_coalesce()
1921 return -EOPNOTSUPP; in rtl_set_coalesce()
1924 return -ERANGE; in rtl_set_coalesce()
1926 coal_usec_max = max(ec->rx_coalesce_usecs, ec->tx_coalesce_usecs); in rtl_set_coalesce()
1934 * - both rx_usecs=0 & rx_frames=0 in hardware (no delay on RX) in rtl_set_coalesce()
1935 * - rtl_get_coalesce returns rx_usecs=0, rx_frames=1 in rtl_set_coalesce()
1936 * - then user does `ethtool -C eth0 rx-usecs 100` in rtl_set_coalesce()
1947 if ((tx_fr && !ec->tx_coalesce_usecs) || in rtl_set_coalesce()
1948 (rx_fr && !ec->rx_coalesce_usecs)) in rtl_set_coalesce()
1949 return -EINVAL; in rtl_set_coalesce()
1954 units = DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
1956 units = DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
1961 /* Meaning of PktCntrDisable bit changed from RTL8168e-vl */ in rtl_set_coalesce()
1965 tp->cp_cmd |= PktCntrDisable; in rtl_set_coalesce()
1967 tp->cp_cmd &= ~PktCntrDisable; in rtl_set_coalesce()
1970 tp->cp_cmd = (tp->cp_cmd & ~INTT_MASK) | cp01; in rtl_set_coalesce()
1971 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_set_coalesce()
1982 return -EOPNOTSUPP; in rtl8169_get_eee()
1984 return phy_ethtool_get_eee(tp->phydev, data); in rtl8169_get_eee()
1993 return -EOPNOTSUPP; in rtl8169_set_eee()
1995 ret = phy_ethtool_set_eee(tp->phydev, data); in rtl8169_set_eee()
1998 tp->eee_adv = phy_read_mmd(dev->phydev, MDIO_MMD_AN, in rtl8169_set_eee()
2008 data->rx_max_pending = NUM_RX_DESC; in rtl8169_get_ringparam()
2009 data->rx_pending = NUM_RX_DESC; in rtl8169_get_ringparam()
2010 data->tx_max_pending = NUM_TX_DESC; in rtl8169_get_ringparam()
2011 data->tx_pending = NUM_TX_DESC; in rtl8169_get_ringparam()
2020 phy_get_pause(tp->phydev, &tx_pause, &rx_pause); in rtl8169_get_pauseparam()
2022 data->autoneg = tp->phydev->autoneg; in rtl8169_get_pauseparam()
2023 data->tx_pause = tx_pause ? 1 : 0; in rtl8169_get_pauseparam()
2024 data->rx_pause = rx_pause ? 1 : 0; in rtl8169_get_pauseparam()
2032 if (dev->mtu > ETH_DATA_LEN) in rtl8169_set_pauseparam()
2033 return -EOPNOTSUPP; in rtl8169_set_pauseparam()
2035 phy_set_asym_pause(tp->phydev, data->rx_pause, data->tx_pause); in rtl8169_set_pauseparam()
2067 struct phy_device *phydev = tp->phydev; in rtl_enable_eee()
2070 /* respect EEE advertisement the user may have set */ in rtl_enable_eee()
2071 if (tp->eee_adv >= 0) in rtl_enable_eee()
2072 adv = tp->eee_adv; in rtl_enable_eee()
2192 /* Catch-all */ in rtl8169_get_mac_version()
2198 while ((xid & p->mask) != p->val) in rtl8169_get_mac_version()
2200 ver = p->ver; in rtl8169_get_mac_version()
2214 if (tp->rtl_fw) { in rtl_release_firmware()
2215 rtl_fw_release_firmware(tp->rtl_fw); in rtl_release_firmware()
2216 kfree(tp->rtl_fw); in rtl_release_firmware()
2217 tp->rtl_fw = NULL; in rtl_release_firmware()
2226 if (tp->rtl_fw) { in r8169_apply_firmware()
2227 rtl_fw_write_firmware(tp, tp->rtl_fw); in r8169_apply_firmware()
2228 /* At least one firmware doesn't reset tp->ocp_base. */ in r8169_apply_firmware()
2229 tp->ocp_base = OCP_STD_PHY_BASE; in r8169_apply_firmware()
2232 phy_read_poll_timeout(tp->phydev, MII_BMCR, val, in r8169_apply_firmware()
2240 /* Adjust EEE LED frequency */ in rtl8168_config_eee_mac()
2241 if (tp->mac_version != RTL_GIGA_MAC_VER_38) in rtl8168_config_eee_mac()
2255 RTL_W16(tp, EEE_TXIDLE_TIMER_8125, tp->dev->mtu + ETH_HLEN + 0x20); in rtl8125_set_eee_txidle_timer()
2290 if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags)) in rtl_schedule_task()
2293 set_bit(flag, tp->wk.flags); in rtl_schedule_task()
2294 schedule_work(&tp->wk.work); in rtl_schedule_task()
2299 r8169_hw_phy_config(tp, tp->phydev, tp->mac_version); in rtl8169_init_phy()
2301 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { in rtl8169_init_phy()
2302 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); in rtl8169_init_phy()
2303 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl8169_init_phy()
2308 if (tp->mac_version == RTL_GIGA_MAC_VER_05 && in rtl8169_init_phy()
2309 tp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_GIGABYTE && in rtl8169_init_phy()
2310 tp->pci_dev->subsystem_device == 0xe000) in rtl8169_init_phy()
2311 phy_write_paged(tp->phydev, 0x0001, 0x10, 0xf01b); in rtl8169_init_phy()
2314 phy_speed_up(tp->phydev); in rtl8169_init_phy()
2319 genphy_soft_reset(tp->phydev); in rtl8169_init_phy()
2332 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl_rar_set()
2347 rtl_rar_set(tp, dev->dev_addr); in rtl_set_mac_address()
2354 switch (tp->mac_version) { in rtl_init_rxcfg()
2382 tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0; in rtl8169_init_ring_indexes()
2433 bool jumbo = tp->dev->mtu > ETH_DATA_LEN; in rtl_jumbo_config()
2437 switch (tp->mac_version) { in rtl_jumbo_config()
2471 if (pci_is_pcie(tp->pci_dev) && tp->supports_gmii) in rtl_jumbo_config()
2472 pcie_set_readrq(tp->pci_dev, readrq); in rtl_jumbo_config()
2477 tp->phydev->advertising); in rtl_jumbo_config()
2479 tp->phydev->advertising); in rtl_jumbo_config()
2480 phy_start_aneg(tp->phydev); in rtl_jumbo_config()
2493 rtl_loop_wait_low(tp, &rtl_chipcmd_cond, 100, 100); in rtl_hw_reset()
2501 if (tp->rtl_fw || !tp->fw_name) in rtl_request_firmware()
2508 rtl_fw->phy_write = rtl_writephy; in rtl_request_firmware()
2509 rtl_fw->phy_read = rtl_readphy; in rtl_request_firmware()
2510 rtl_fw->mac_mcu_write = mac_mcu_write; in rtl_request_firmware()
2511 rtl_fw->mac_mcu_read = mac_mcu_read; in rtl_request_firmware()
2512 rtl_fw->fw_name = tp->fw_name; in rtl_request_firmware()
2513 rtl_fw->dev = tp_to_dev(tp); in rtl_request_firmware()
2518 tp->rtl_fw = rtl_fw; in rtl_request_firmware()
2549 switch (tp->mac_version) { in rtl_wait_txrx_fifo_empty()
2551 rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42); in rtl_wait_txrx_fifo_empty()
2552 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42); in rtl_wait_txrx_fifo_empty()
2555 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42); in rtl_wait_txrx_fifo_empty()
2559 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42); in rtl_wait_txrx_fifo_empty()
2560 rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42); in rtl_wait_txrx_fifo_empty()
2581 if (tp->mac_version >= RTL_GIGA_MAC_VER_25) in rtl_wol_enable_rx()
2585 if (tp->mac_version >= RTL_GIGA_MAC_VER_40) in rtl_wol_enable_rx()
2591 if (tp->dash_enabled) in rtl_prepare_power_down()
2594 if (tp->mac_version == RTL_GIGA_MAC_VER_32 || in rtl_prepare_power_down()
2595 tp->mac_version == RTL_GIGA_MAC_VER_33) in rtl_prepare_power_down()
2599 phy_speed_down(tp->phydev, false); in rtl_prepare_power_down()
2628 RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2629 RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2630 RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2631 RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2638 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl8169_set_magic_reg()
2640 else if (tp->mac_version == RTL_GIGA_MAC_VER_06) in rtl8169_set_magic_reg()
2659 if (dev->flags & IFF_PROMISC) { in rtl_set_rx_mode()
2661 } else if (!(dev->flags & IFF_MULTICAST)) { in rtl_set_rx_mode()
2663 } else if (dev->flags & IFF_ALLMULTI || in rtl_set_rx_mode()
2664 tp->mac_version == RTL_GIGA_MAC_VER_35) { in rtl_set_rx_mode()
2677 if (tp->mac_version > RTL_GIGA_MAC_VER_06) { in rtl_set_rx_mode()
2698 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_write()
2704 rtl_loop_wait_low(tp, &rtl_csiar_cond, 10, 100); in rtl_csi_write()
2709 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_read()
2714 return rtl_loop_wait_high(tp, &rtl_csiar_cond, 10, 100) ? in rtl_csi_read()
2720 struct pci_dev *pdev = tp->pci_dev; in rtl_set_aspm_entry_latency()
2729 if (pdev->cfg_size > 0x070f && in rtl_set_aspm_entry_latency()
2733 netdev_notice_once(tp->dev, in rtl_set_aspm_entry_latency()
2756 while (len-- > 0) { in __rtl_ephy_init()
2757 w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits; in __rtl_ephy_init()
2758 rtl_ephy_write(tp, e->offset, w); in __rtl_ephy_init()
2767 pcie_capability_clear_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_disable_clock_request()
2773 pcie_capability_set_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_enable_clock_request()
2793 switch (tp->mac_version) { in rtl_enable_exit_l1()
2810 switch (tp->mac_version) { in rtl_disable_exit_l1()
2824 if (tp->mac_version < RTL_GIGA_MAC_VER_32) in rtl_hw_aspm_clkreq_enable()
2828 if (enable && tp->aspm_manageable) { in rtl_hw_aspm_clkreq_enable()
2832 if (tp->mac_version == RTL_GIGA_MAC_VER_42 || in rtl_hw_aspm_clkreq_enable()
2833 tp->mac_version == RTL_GIGA_MAC_VER_43) in rtl_hw_aspm_clkreq_enable()
2839 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
2842 /* reset ephy tx/rx disable timer */ in rtl_hw_aspm_clkreq_enable()
2851 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
3016 /* Reset tx FIFO pointer */ in rtl_hw_start_8168e_1()
3186 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in rtl8411b_fix_phy_down()
3189 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in rtl8411b_fix_phy_down()
3211 /* The following Realtek-provided magic fixes an issue with the RX unit in rtl_hw_start_8411_2()
3212 * getting confused after the PHY having been powered-down. in rtl_hw_start_8411_2()
3279 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8168h_1()
3385 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8117()
3477 /* Force LAN exit from ASPM if Rx/Tx are not idle */ in rtl_hw_start_8105e_1()
3506 /* Force LAN exit from ASPM if Rx/Tx are not idle */ in rtl_hw_start_8402()
3519 /* disable EEE */ in rtl_hw_start_8402()
3527 /* Force LAN exit from ASPM if Rx/Tx are not idle */ in rtl_hw_start_8106()
3534 /* L0 7us, L1 32us - needed to avoid issues with link-up detection */ in rtl_hw_start_8106()
3539 /* disable EEE */ in rtl_hw_start_8106()
3570 /* disable new tx descriptor format */ in rtl_hw_start_8125_common()
3573 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3578 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3603 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3694 if (hw_configs[tp->mac_version]) in rtl_hw_config()
3695 hw_configs[tp->mac_version](tp); in rtl_hw_config()
3726 tp->cp_cmd |= PCIMulRW; in rtl_hw_start_8169()
3728 if (tp->mac_version == RTL_GIGA_MAC_VER_02 || in rtl_hw_start_8169()
3729 tp->mac_version == RTL_GIGA_MAC_VER_03) in rtl_hw_start_8169()
3730 tp->cp_cmd |= EnAnaPLL; in rtl_hw_start_8169()
3732 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8169()
3745 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start()
3747 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_hw_start()
3762 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ in rtl_hw_start()
3768 rtl_set_rx_config_features(tp, tp->dev->features); in rtl_hw_start()
3769 rtl_set_rx_mode(tp->dev); in rtl_hw_start()
3777 dev->mtu = new_mtu; in rtl8169_change_mtu()
3781 switch (tp->mac_version) { in rtl8169_change_mtu()
3795 u32 eor = le32_to_cpu(desc->opts1) & RingEnd; in rtl8169_mark_to_asic()
3797 desc->opts2 = 0; in rtl8169_mark_to_asic()
3800 WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | R8169_RX_BUF_SIZE)); in rtl8169_mark_to_asic()
3817 netdev_err(tp->dev, "Failed to map RX DMA!\n"); in rtl8169_alloc_rx_data()
3822 desc->addr = cpu_to_le64(mapping); in rtl8169_alloc_rx_data()
3832 for (i = 0; i < NUM_RX_DESC && tp->Rx_databuff[i]; i++) { in rtl8169_rx_clear()
3834 le64_to_cpu(tp->RxDescArray[i].addr), in rtl8169_rx_clear()
3836 __free_pages(tp->Rx_databuff[i], get_order(R8169_RX_BUF_SIZE)); in rtl8169_rx_clear()
3837 tp->Rx_databuff[i] = NULL; in rtl8169_rx_clear()
3838 tp->RxDescArray[i].addr = 0; in rtl8169_rx_clear()
3839 tp->RxDescArray[i].opts1 = 0; in rtl8169_rx_clear()
3850 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i); in rtl8169_rx_fill()
3853 return -ENOMEM; in rtl8169_rx_fill()
3855 tp->Rx_databuff[i] = data; in rtl8169_rx_fill()
3859 tp->RxDescArray[NUM_RX_DESC - 1].opts1 |= cpu_to_le32(RingEnd); in rtl8169_rx_fill()
3868 memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); in rtl8169_init_ring()
3869 memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); in rtl8169_init_ring()
3876 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_unmap_tx_skb()
3877 struct TxDesc *desc = tp->TxDescArray + entry; in rtl8169_unmap_tx_skb()
3879 dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), tx_skb->len, in rtl8169_unmap_tx_skb()
3892 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_tx_clear_range()
3893 unsigned int len = tx_skb->len; in rtl8169_tx_clear_range()
3896 struct sk_buff *skb = tx_skb->skb; in rtl8169_tx_clear_range()
3907 rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC); in rtl8169_tx_clear()
3908 netdev_reset_queue(tp->dev); in rtl8169_tx_clear()
3913 napi_disable(&tp->napi); in rtl8169_cleanup()
3923 switch (tp->mac_version) { in rtl8169_cleanup()
3930 rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666); in rtl8169_cleanup()
3938 fsleep(100); in rtl8169_cleanup()
3952 netif_stop_queue(tp->dev); in rtl_reset_work()
3957 rtl8169_mark_to_asic(tp->RxDescArray + i); in rtl_reset_work()
3959 napi_enable(&tp->napi); in rtl_reset_work()
3973 struct TxDesc *txd = tp->TxDescArray + entry; in rtl8169_tx_map()
3983 netdev_err(tp->dev, "Failed to map TX data!\n"); in rtl8169_tx_map()
3987 txd->addr = cpu_to_le64(mapping); in rtl8169_tx_map()
3988 txd->opts2 = cpu_to_le32(opts[1]); in rtl8169_tx_map()
3991 if (entry == NUM_TX_DESC - 1) in rtl8169_tx_map()
3995 txd->opts1 = cpu_to_le32(opts1); in rtl8169_tx_map()
3997 tp->tx_skb[entry].len = len; in rtl8169_tx_map()
4008 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { in rtl8169_xmit_frags()
4009 const skb_frag_t *frag = info->frags + cur_frag; in rtl8169_xmit_frags()
4022 rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag); in rtl8169_xmit_frags()
4023 return -EIO; in rtl8169_xmit_frags()
4035 return ih && ih->protocol == IPPROTO_UDP; in rtl_skb_is_udp()
4038 return i6h && i6h->nexthdr == IPPROTO_UDP; in rtl_skb_is_udp()
4050 unsigned int padto = 0, len = skb->len; in rtl8125_quirk_udp_padto()
4054 unsigned int trans_data_len = skb_tail_pointer(skb) - in rtl8125_quirk_udp_padto()
4059 u16 dest = ntohs(udp_hdr(skb)->dest); in rtl8125_quirk_udp_padto()
4063 padto = len + RTL_MIN_PATCH_LEN - trans_data_len; in rtl8125_quirk_udp_padto()
4068 len + sizeof(struct udphdr) - trans_data_len); in rtl8125_quirk_udp_padto()
4081 switch (tp->mac_version) { in rtl_quirk_packet_padto()
4096 u32 mss = skb_shinfo(skb)->gso_size; in rtl8169_tso_csum_v1()
4101 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v1()
4104 if (ip->protocol == IPPROTO_TCP) in rtl8169_tso_csum_v1()
4106 else if (ip->protocol == IPPROTO_UDP) in rtl8169_tso_csum_v1()
4117 u32 mss = shinfo->gso_size; in rtl8169_tso_csum_v2()
4120 if (shinfo->gso_type & SKB_GSO_TCPV4) { in rtl8169_tso_csum_v2()
4122 } else if (shinfo->gso_type & SKB_GSO_TCPV6) { in rtl8169_tso_csum_v2()
4134 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v2()
4140 ip_protocol = ip_hdr(skb)->protocol; in rtl8169_tso_csum_v2()
4145 ip_protocol = ipv6_hdr(skb)->nexthdr; in rtl8169_tso_csum_v2()
4173 return READ_ONCE(tp->dirty_tx) + NUM_TX_DESC - READ_ONCE(tp->cur_tx); in rtl_tx_slots_avail()
4179 switch (tp->mac_version) { in rtl_chip_supports_csum_v2()
4199 unsigned int frags = skb_shinfo(skb)->nr_frags; in rtl8169_start_xmit()
4201 unsigned int entry = tp->cur_tx % NUM_TX_DESC; in rtl8169_start_xmit()
4208 netdev_err(dev, "BUG! Tx Ring full when queue awake!\n"); in rtl8169_start_xmit()
4220 if (unlikely(rtl8169_tx_map(tp, opts, skb_headlen(skb), skb->data, in rtl8169_start_xmit()
4224 txd_first = tp->TxDescArray + entry; in rtl8169_start_xmit()
4232 txd_last = tp->TxDescArray + entry; in rtl8169_start_xmit()
4233 txd_last->opts1 |= cpu_to_le32(LastFrag); in rtl8169_start_xmit()
4234 tp->tx_skb[entry].skb = skb; in rtl8169_start_xmit()
4241 door_bell = __netdev_sent_queue(dev, skb->len, netdev_xmit_more()); in rtl8169_start_xmit()
4243 txd_first->opts1 |= cpu_to_le32(DescOwn | FirstFrag); in rtl8169_start_xmit()
4245 /* rtl_tx needs to see descriptor changes before updated tp->cur_tx */ in rtl8169_start_xmit()
4248 WRITE_ONCE(tp->cur_tx, tp->cur_tx + frags + 1); in rtl8169_start_xmit()
4262 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4267 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4274 unsigned int nr_frags = info->nr_frags; in rtl_last_frag_len()
4279 return skb_frag_size(info->frags + nr_frags - 1); in rtl_last_frag_len()
4292 else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4 && in rtl8168evl_fix_tso()
4309 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl8169_features_check()
4315 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_features_check()
4317 if (skb->len < ETH_ZLEN) in rtl8169_features_check()
4334 struct pci_dev *pdev = tp->pci_dev; in rtl8169_pcierr_interrupt()
4355 dirty_tx = tp->dirty_tx; in rtl_tx()
4357 while (READ_ONCE(tp->cur_tx) != dirty_tx) { in rtl_tx()
4361 status = le32_to_cpu(READ_ONCE(tp->TxDescArray[entry].opts1)); in rtl_tx()
4365 skb = tp->tx_skb[entry].skb; in rtl_tx()
4370 bytes_compl += skb->len; in rtl_tx()
4376 if (tp->dirty_tx != dirty_tx) { in rtl_tx()
4378 WRITE_ONCE(tp->dirty_tx, dirty_tx); in rtl_tx()
4384 * 8168 hack: TxPoll requests are lost when the Tx packets are in rtl_tx()
4387 * it is slow enough). -- FR in rtl_tx()
4388 * If skb is NULL then we come here again once a tx irq is in rtl_tx()
4391 if (READ_ONCE(tp->cur_tx) != dirty_tx && skb) in rtl_tx()
4406 skb->ip_summed = CHECKSUM_UNNECESSARY; in rtl8169_rx_csum()
4416 for (count = 0; count < budget; count++, tp->cur_rx++) { in rtl_rx()
4417 unsigned int pkt_size, entry = tp->cur_rx % NUM_RX_DESC; in rtl_rx()
4418 struct RxDesc *desc = tp->RxDescArray + entry; in rtl_rx()
4424 status = le32_to_cpu(READ_ONCE(desc->opts1)); in rtl_rx()
4438 dev->stats.rx_errors++; in rtl_rx()
4440 dev->stats.rx_length_errors++; in rtl_rx()
4442 dev->stats.rx_crc_errors++; in rtl_rx()
4444 if (!(dev->features & NETIF_F_RXALL)) in rtl_rx()
4451 if (likely(!(dev->features & NETIF_F_RXFCS))) in rtl_rx()
4452 pkt_size -= ETH_FCS_LEN; in rtl_rx()
4455 * They are seen as a symptom of over-mtu sized frames. in rtl_rx()
4458 dev->stats.rx_dropped++; in rtl_rx()
4459 dev->stats.rx_length_errors++; in rtl_rx()
4463 skb = napi_alloc_skb(&tp->napi, pkt_size); in rtl_rx()
4465 dev->stats.rx_dropped++; in rtl_rx()
4469 addr = le64_to_cpu(desc->addr); in rtl_rx()
4470 rx_buf = page_address(tp->Rx_databuff[entry]); in rtl_rx()
4475 skb->tail += pkt_size; in rtl_rx()
4476 skb->len = pkt_size; in rtl_rx()
4480 skb->protocol = eth_type_trans(skb, dev); in rtl_rx()
4484 if (skb->pkt_type == PACKET_MULTICAST) in rtl_rx()
4485 dev->stats.multicast++; in rtl_rx()
4487 napi_gro_receive(&tp->napi, skb); in rtl_rx()
4502 if ((status & 0xffff) == 0xffff || !(status & tp->irq_mask)) in rtl8169_interrupt()
4506 rtl8169_pcierr_interrupt(tp->dev); in rtl8169_interrupt()
4511 phy_mac_interrupt(tp->phydev); in rtl8169_interrupt()
4514 tp->mac_version == RTL_GIGA_MAC_VER_11)) { in rtl8169_interrupt()
4515 netif_stop_queue(tp->dev); in rtl8169_interrupt()
4519 if (napi_schedule_prep(&tp->napi)) { in rtl8169_interrupt()
4521 __napi_schedule(&tp->napi); in rtl8169_interrupt()
4537 if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags)) in rtl_task()
4540 if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) { in rtl_task()
4543 ret = pci_reset_bus(tp->pci_dev); in rtl_task()
4545 netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n"); in rtl_task()
4546 netif_device_detach(tp->dev); in rtl_task()
4551 /* ASPM compatibility issues are a typical reason for tx timeouts */ in rtl_task()
4552 ret = pci_disable_link_state(tp->pci_dev, PCIE_LINK_STATE_L1 | in rtl_task()
4555 netdev_warn_once(tp->dev, "ASPM disabled on Tx timeout\n"); in rtl_task()
4559 if (test_and_clear_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags)) { in rtl_task()
4562 netif_wake_queue(tp->dev); in rtl_task()
4563 } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) { in rtl_task()
4573 struct net_device *dev = tp->dev; in rtl8169_poll()
4594 netif_wake_queue(tp->dev); in r8169_phylink_handler()
4596 /* In few cases rx is broken after link-down otherwise */ in r8169_phylink_handler()
4602 phy_print_status(tp->phydev); in r8169_phylink_handler()
4607 struct phy_device *phydev = tp->phydev; in r8169_phy_connect()
4611 phy_mode = tp->supports_gmii ? PHY_INTERFACE_MODE_GMII : in r8169_phy_connect()
4614 ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler, in r8169_phy_connect()
4619 if (!tp->supports_gmii) in r8169_phy_connect()
4630 bitmap_zero(tp->wk.flags, RTL_FLAG_MAX); in rtl8169_down()
4632 phy_stop(tp->phydev); in rtl8169_down()
4636 pci_clear_master(tp->pci_dev); in rtl8169_down()
4643 if (tp->dash_type != RTL_DASH_NONE) in rtl8169_down()
4649 if (tp->dash_type != RTL_DASH_NONE) in rtl8169_up()
4652 pci_set_master(tp->pci_dev); in rtl8169_up()
4653 phy_init_hw(tp->phydev); in rtl8169_up()
4654 phy_resume(tp->phydev); in rtl8169_up()
4656 napi_enable(&tp->napi); in rtl8169_up()
4657 set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags); in rtl8169_up()
4660 phy_start(tp->phydev); in rtl8169_up()
4666 struct pci_dev *pdev = tp->pci_dev; in rtl8169_close()
4668 pm_runtime_get_sync(&pdev->dev); in rtl8169_close()
4674 cancel_work(&tp->wk.work); in rtl8169_close()
4676 free_irq(tp->irq, tp); in rtl8169_close()
4678 phy_disconnect(tp->phydev); in rtl8169_close()
4680 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl8169_close()
4681 tp->RxPhyAddr); in rtl8169_close()
4682 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl8169_close()
4683 tp->TxPhyAddr); in rtl8169_close()
4684 tp->TxDescArray = NULL; in rtl8169_close()
4685 tp->RxDescArray = NULL; in rtl8169_close()
4687 pm_runtime_put_sync(&pdev->dev); in rtl8169_close()
4697 rtl8169_interrupt(tp->irq, tp); in rtl8169_netpoll()
4704 struct pci_dev *pdev = tp->pci_dev; in rtl_open()
4706 int retval = -ENOMEM; in rtl_open()
4708 pm_runtime_get_sync(&pdev->dev); in rtl_open()
4711 * Rx and Tx descriptors needs 256 bytes alignment. in rtl_open()
4714 tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES, in rtl_open()
4715 &tp->TxPhyAddr, GFP_KERNEL); in rtl_open()
4716 if (!tp->TxDescArray) in rtl_open()
4719 tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES, in rtl_open()
4720 &tp->RxPhyAddr, GFP_KERNEL); in rtl_open()
4721 if (!tp->RxDescArray) in rtl_open()
4731 retval = request_irq(tp->irq, rtl8169_interrupt, irqflags, dev->name, tp); in rtl_open()
4743 pm_runtime_put_sync(&pdev->dev); in rtl_open()
4748 free_irq(tp->irq, tp); in rtl_open()
4753 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl_open()
4754 tp->RxPhyAddr); in rtl_open()
4755 tp->RxDescArray = NULL; in rtl_open()
4757 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl_open()
4758 tp->TxPhyAddr); in rtl_open()
4759 tp->TxDescArray = NULL; in rtl_open()
4767 struct pci_dev *pdev = tp->pci_dev; in rtl8169_get_stats64()
4768 struct rtl8169_counters *counters = tp->counters; in rtl8169_get_stats64()
4770 pm_runtime_get_noresume(&pdev->dev); in rtl8169_get_stats64()
4772 netdev_stats_to_stats64(stats, &dev->stats); in rtl8169_get_stats64()
4773 dev_fetch_sw_netstats(stats, dev->tstats); in rtl8169_get_stats64()
4779 if (pm_runtime_active(&pdev->dev)) in rtl8169_get_stats64()
4786 stats->tx_errors = le64_to_cpu(counters->tx_errors) - in rtl8169_get_stats64()
4787 le64_to_cpu(tp->tc_offset.tx_errors); in rtl8169_get_stats64()
4788 stats->collisions = le32_to_cpu(counters->tx_multi_collision) - in rtl8169_get_stats64()
4789 le32_to_cpu(tp->tc_offset.tx_multi_collision); in rtl8169_get_stats64()
4790 stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) - in rtl8169_get_stats64()
4791 le16_to_cpu(tp->tc_offset.tx_aborted); in rtl8169_get_stats64()
4792 stats->rx_missed_errors = le16_to_cpu(counters->rx_missed) - in rtl8169_get_stats64()
4793 le16_to_cpu(tp->tc_offset.rx_missed); in rtl8169_get_stats64()
4795 pm_runtime_put_noidle(&pdev->dev); in rtl8169_get_stats64()
4800 netif_device_detach(tp->dev); in rtl8169_net_suspend()
4802 if (netif_running(tp->dev)) in rtl8169_net_suspend()
4810 rtl_rar_set(tp, tp->dev->dev_addr); in rtl8169_runtime_resume()
4811 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_runtime_resume()
4813 if (tp->TxDescArray) in rtl8169_runtime_resume()
4816 netif_device_attach(tp->dev); in rtl8169_runtime_resume()
4828 clk_disable_unprepare(tp->clk); in rtl8169_suspend()
4839 clk_prepare_enable(tp->clk); in rtl8169_resume()
4842 if (tp->mac_version == RTL_GIGA_MAC_VER_37) in rtl8169_resume()
4852 if (!tp->TxDescArray) { in rtl8169_runtime_suspend()
4853 netif_device_detach(tp->dev); in rtl8169_runtime_suspend()
4869 if (tp->dash_enabled) in rtl8169_runtime_idle()
4870 return -EBUSY; in rtl8169_runtime_idle()
4872 if (!netif_running(tp->dev) || !netif_carrier_ok(tp->dev)) in rtl8169_runtime_idle()
4875 return -EBUSY; in rtl8169_runtime_idle()
4893 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_shutdown()
4895 if (system_state == SYSTEM_POWER_OFF && !tp->dash_enabled) { in rtl_shutdown()
4896 pci_wake_from_d3(pdev, tp->saved_wolopts); in rtl_shutdown()
4906 pm_runtime_get_noresume(&pdev->dev); in rtl_remove_one()
4908 cancel_work_sync(&tp->wk.work); in rtl_remove_one()
4910 unregister_netdev(tp->dev); in rtl_remove_one()
4912 if (tp->dash_type != RTL_DASH_NONE) in rtl_remove_one()
4918 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_remove_one()
4943 tp->irq_mask = RxOK | RxErr | TxOK | TxErr | LinkChg; in rtl_set_irq_mask()
4945 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_set_irq_mask()
4946 tp->irq_mask |= SYSErr | RxOverflow | RxFIFOOver; in rtl_set_irq_mask()
4947 else if (tp->mac_version == RTL_GIGA_MAC_VER_11) in rtl_set_irq_mask()
4949 tp->irq_mask |= RxFIFOOver; in rtl_set_irq_mask()
4951 tp->irq_mask |= RxOverflow; in rtl_set_irq_mask()
4958 switch (tp->mac_version) { in rtl_alloc_irq()
4972 return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags); in rtl_alloc_irq()
4979 if (rtl_is_8168evl_up(tp) && tp->mac_version != RTL_GIGA_MAC_VER_34) { in rtl_read_mac_address()
4998 rtl_loop_wait_high(tp, &rtl_link_list_ready_cond, 100, 42); in r8168g_wait_ll_share_fifo_ready()
5003 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_read_reg()
5006 return -ENODEV; in r8169_mdio_read_reg()
5014 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_write_reg()
5017 return -ENODEV; in r8169_mdio_write_reg()
5026 struct pci_dev *pdev = tp->pci_dev; in r8169_mdio_register()
5030 new_bus = devm_mdiobus_alloc(&pdev->dev); in r8169_mdio_register()
5032 return -ENOMEM; in r8169_mdio_register()
5034 new_bus->name = "r8169"; in r8169_mdio_register()
5035 new_bus->priv = tp; in r8169_mdio_register()
5036 new_bus->parent = &pdev->dev; in r8169_mdio_register()
5037 new_bus->irq[0] = PHY_MAC_INTERRUPT; in r8169_mdio_register()
5038 snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x", in r8169_mdio_register()
5039 pci_domain_nr(pdev->bus), pci_dev_id(pdev)); in r8169_mdio_register()
5041 new_bus->read = r8169_mdio_read_reg; in r8169_mdio_register()
5042 new_bus->write = r8169_mdio_write_reg; in r8169_mdio_register()
5044 ret = devm_mdiobus_register(&pdev->dev, new_bus); in r8169_mdio_register()
5048 tp->phydev = mdiobus_get_phy(new_bus, 0); in r8169_mdio_register()
5049 if (!tp->phydev) { in r8169_mdio_register()
5050 return -ENODEV; in r8169_mdio_register()
5051 } else if (!tp->phydev->drv) { in r8169_mdio_register()
5055 …dev_err(&pdev->dev, "no dedicated PHY driver found for PHY ID 0x%08x, maybe realtek.ko needs to be… in r8169_mdio_register()
5056 tp->phydev->phy_id); in r8169_mdio_register()
5057 return -EUNATCH; in r8169_mdio_register()
5060 tp->phydev->mac_managed_pm = true; in r8169_mdio_register()
5062 phy_support_asym_pause(tp->phydev); in r8169_mdio_register()
5065 phy_suspend(tp->phydev); in r8169_mdio_register()
5104 switch (tp->mac_version) { in rtl_hw_initialize()
5121 /* Non-GBit versions don't support jumbo frames */ in rtl_jumbo_max()
5122 if (!tp->supports_gmii) in rtl_jumbo_max()
5125 switch (tp->mac_version) { in rtl_jumbo_max()
5144 struct net_device *dev = tp->dev; in rtl_init_mac_address()
5160 dev->addr_assign_type = NET_ADDR_RANDOM; in rtl_init_mac_address()
5170 if (tp->mac_version >= RTL_GIGA_MAC_VER_61 && in rtl_aspm_is_safe()
5186 dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp)); in rtl_init_one()
5188 return -ENOMEM; in rtl_init_one()
5190 SET_NETDEV_DEV(dev, &pdev->dev); in rtl_init_one()
5191 dev->netdev_ops = &rtl_netdev_ops; in rtl_init_one()
5193 tp->dev = dev; in rtl_init_one()
5194 tp->pci_dev = pdev; in rtl_init_one()
5195 tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1; in rtl_init_one()
5196 tp->eee_adv = -1; in rtl_init_one()
5197 tp->ocp_base = OCP_STD_PHY_BASE; in rtl_init_one()
5199 raw_spin_lock_init(&tp->cfg9346_usage_lock); in rtl_init_one()
5200 raw_spin_lock_init(&tp->config25_lock); in rtl_init_one()
5201 raw_spin_lock_init(&tp->mac_ocp_lock); in rtl_init_one()
5202 mutex_init(&tp->led_lock); in rtl_init_one()
5204 dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev, in rtl_init_one()
5206 if (!dev->tstats) in rtl_init_one()
5207 return -ENOMEM; in rtl_init_one()
5210 tp->clk = devm_clk_get_optional_enabled(&pdev->dev, "ether_clk"); in rtl_init_one()
5211 if (IS_ERR(tp->clk)) in rtl_init_one()
5212 return dev_err_probe(&pdev->dev, PTR_ERR(tp->clk), "failed to get ether_clk\n"); in rtl_init_one()
5217 return dev_err_probe(&pdev->dev, rc, "enable failure\n"); in rtl_init_one()
5220 dev_info(&pdev->dev, "Mem-Wr-Inval unavailable\n"); in rtl_init_one()
5223 region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1; in rtl_init_one()
5225 return dev_err_probe(&pdev->dev, -ENODEV, "no MMIO resource found\n"); in rtl_init_one()
5229 return dev_err_probe(&pdev->dev, rc, "cannot remap MMIO, aborting\n"); in rtl_init_one()
5231 tp->mmio_addr = pcim_iomap_table(pdev)[region]; in rtl_init_one()
5235 return dev_err_probe(&pdev->dev, -EIO, "PCI read failed\n"); in rtl_init_one()
5240 chipset = rtl8169_get_mac_version(xid, tp->supports_gmii); in rtl_init_one()
5242 return dev_err_probe(&pdev->dev, -ENODEV, in rtl_init_one()
5245 tp->mac_version = chipset; in rtl_init_one()
5254 tp->aspm_manageable = !rc; in rtl_init_one()
5256 tp->dash_type = rtl_get_dash_type(tp); in rtl_init_one()
5257 tp->dash_enabled = rtl_dash_is_enabled(tp); in rtl_init_one()
5259 tp->cp_cmd = RTL_R16(tp, CPlusCmd) & CPCMD_MASK; in rtl_init_one()
5261 if (sizeof(dma_addr_t) > 4 && tp->mac_version >= RTL_GIGA_MAC_VER_18 && in rtl_init_one()
5262 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) in rtl_init_one()
5263 dev->features |= NETIF_F_HIGHDMA; in rtl_init_one()
5275 return dev_err_probe(&pdev->dev, rc, "Can't allocate interrupt\n"); in rtl_init_one()
5277 tp->irq = pci_irq_vector(pdev, 0); in rtl_init_one()
5279 INIT_WORK(&tp->wk.work, rtl_task); in rtl_init_one()
5283 dev->ethtool_ops = &rtl8169_ethtool_ops; in rtl_init_one()
5285 netif_napi_add(dev, &tp->napi, rtl8169_poll); in rtl_init_one()
5287 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM | in rtl_init_one()
5289 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; in rtl_init_one()
5290 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in rtl_init_one()
5296 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl_init_one()
5298 dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX; in rtl_init_one()
5301 dev->hw_features |= NETIF_F_IPV6_CSUM; in rtl_init_one()
5303 dev->features |= dev->hw_features; in rtl_init_one()
5306 * tx timeouts. However for a lot of people SG/TSO works fine. in rtl_init_one()
5311 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6; in rtl_init_one()
5315 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO; in rtl_init_one()
5320 dev->hw_features |= NETIF_F_RXALL; in rtl_init_one()
5321 dev->hw_features |= NETIF_F_RXFCS; in rtl_init_one()
5326 rtl8169_set_features(dev, dev->features); in rtl_init_one()
5328 if (!tp->dash_enabled) { in rtl_init_one()
5332 dev->wol_enabled = 1; in rtl_init_one()
5337 dev->max_mtu = jumbo_max; in rtl_init_one()
5341 tp->fw_name = rtl_chip_infos[chipset].fw_name; in rtl_init_one()
5343 tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters), in rtl_init_one()
5344 &tp->counters_phys_addr, in rtl_init_one()
5346 if (!tp->counters) in rtl_init_one()
5347 return -ENOMEM; in rtl_init_one()
5360 tp->mac_version > RTL_GIGA_MAC_VER_06 && in rtl_init_one()
5361 tp->mac_version < RTL_GIGA_MAC_VER_61) in rtl_init_one()
5365 rtl_chip_infos[chipset].name, dev->dev_addr, xid, tp->irq); in rtl_init_one()
5368 netdev_info(dev, "jumbo features [frames: %d bytes, tx checksumming: %s]\n", in rtl_init_one()
5369 jumbo_max, tp->mac_version <= RTL_GIGA_MAC_VER_06 ? in rtl_init_one()
5372 if (tp->dash_type != RTL_DASH_NONE) { in rtl_init_one()
5374 tp->dash_enabled ? "enabled" : "disabled"); in rtl_init_one()
5379 pm_runtime_put_sync(&pdev->dev); in rtl_init_one()