Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0-only
7 * of the original driver such as link fail-over and link management because
19 #include <linux/dma-mapping.h>
53 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
69 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))
76 static int debug = -1; /* defaults above */
84 static int disable_msi = -1;
93 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
96 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
97 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
98 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
99 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
149 static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) in gm_phy_write() argument
153 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
154 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
158 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in gm_phy_write() local
159 if (ctrl == 0xffff) in gm_phy_write()
162 if (!(ctrl & GM_SMI_CT_BUSY)) in gm_phy_write()
168 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name); in gm_phy_write()
169 return -ETIMEDOUT; in gm_phy_write()
172 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in gm_phy_write()
173 return -EIO; in gm_phy_write()
176 static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) in __gm_phy_read() argument
180 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) in __gm_phy_read()
184 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in __gm_phy_read() local
185 if (ctrl == 0xffff) in __gm_phy_read()
188 if (ctrl & GM_SMI_CT_RD_VAL) { in __gm_phy_read()
189 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
196 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name); in __gm_phy_read()
197 return -ETIMEDOUT; in __gm_phy_read()
199 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in __gm_phy_read()
200 return -EIO; in __gm_phy_read()
203 static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) in gm_phy_read() argument
206 __gm_phy_read(hw, port, reg, &v); in gm_phy_read()
211 static void sky2_power_on(struct sky2_hw *hw) in sky2_power_on() argument
214 sky2_write8(hw, B0_POWER_CTRL, in sky2_power_on()
218 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); in sky2_power_on()
220 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_power_on()
222 sky2_write8(hw, B2_Y2_CLK_GATE, in sky2_power_on()
227 sky2_write8(hw, B2_Y2_CLK_GATE, 0); in sky2_power_on()
229 if (hw->flags & SKY2_HW_ADV_POWER_CTL) { in sky2_power_on()
232 sky2_pci_write32(hw, PCI_DEV_REG3, 0); in sky2_power_on()
234 reg = sky2_pci_read32(hw, PCI_DEV_REG4); in sky2_power_on()
237 sky2_pci_write32(hw, PCI_DEV_REG4, reg); in sky2_power_on()
239 reg = sky2_pci_read32(hw, PCI_DEV_REG5); in sky2_power_on()
242 sky2_pci_write32(hw, PCI_DEV_REG5, reg); in sky2_power_on()
244 sky2_pci_write32(hw, PCI_CFG_REG_1, 0); in sky2_power_on()
246 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON); in sky2_power_on()
248 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ in sky2_power_on()
249 reg = sky2_read32(hw, B2_GP_IO); in sky2_power_on()
251 sky2_write32(hw, B2_GP_IO, reg); in sky2_power_on()
253 sky2_read32(hw, B2_GP_IO); in sky2_power_on()
257 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON); in sky2_power_on()
260 static void sky2_power_aux(struct sky2_hw *hw) in sky2_power_aux() argument
262 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_power_aux()
263 sky2_write8(hw, B2_Y2_CLK_GATE, 0); in sky2_power_aux()
266 sky2_write8(hw, B2_Y2_CLK_GATE, in sky2_power_aux()
272 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) && in sky2_power_aux()
273 pci_pme_capable(hw->pdev, PCI_D3cold)) in sky2_power_aux()
274 sky2_write8(hw, B0_POWER_CTRL, in sky2_power_aux()
279 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF); in sky2_power_aux()
282 static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port) in sky2_gmac_reset() argument
287 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); in sky2_gmac_reset()
289 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ in sky2_gmac_reset()
290 gma_write16(hw, port, GM_MC_ADDR_H2, 0); in sky2_gmac_reset()
291 gma_write16(hw, port, GM_MC_ADDR_H3, 0); in sky2_gmac_reset()
292 gma_write16(hw, port, GM_MC_ADDR_H4, 0); in sky2_gmac_reset()
294 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_gmac_reset()
296 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_gmac_reset()
299 /* flow control to advertise bits */
307 /* flow control to advertise bits when using 1000BaseX */
315 /* flow control to GMA disable bits */
324 static void sky2_phy_init(struct sky2_hw *hw, unsigned port) in sky2_phy_init() argument
326 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_phy_init()
327 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg; in sky2_phy_init() local
329 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) && in sky2_phy_init()
330 !(hw->flags & SKY2_HW_NEWER_PHY)) { in sky2_phy_init()
331 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
338 if (hw->chip_id == CHIP_ID_YUKON_EC) in sky2_phy_init()
345 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); in sky2_phy_init()
348 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
349 if (sky2_is_copper(hw)) { in sky2_phy_init()
350 if (!(hw->flags & SKY2_HW_GIGABIT)) { in sky2_phy_init()
352 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1; in sky2_phy_init()
354 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_phy_init()
355 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_phy_init()
359 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2); in sky2_phy_init()
361 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec); in sky2_phy_init()
365 ctrl &= ~PHY_M_PC_EN_DET_MSK; in sky2_phy_init()
368 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); in sky2_phy_init()
371 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) && in sky2_phy_init()
372 (hw->flags & SKY2_HW_NEWER_PHY)) { in sky2_phy_init()
374 ctrl &= ~PHY_M_PC_DSC_MSK; in sky2_phy_init()
375 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; in sky2_phy_init()
382 ctrl &= ~PHY_M_PC_MDIX_MSK; in sky2_phy_init()
385 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
388 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) { in sky2_phy_init()
389 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
391 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */ in sky2_phy_init()
392 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_init()
393 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
394 ctrl &= ~PHY_M_MAC_MD_MSK; in sky2_phy_init()
395 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX); in sky2_phy_init()
396 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
398 if (hw->pmd_type == 'P') { in sky2_phy_init()
400 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1); in sky2_phy_init()
402 /* for SFP-module set SIGDET polarity to low */ in sky2_phy_init()
403 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
404 ctrl |= PHY_M_FIB_SIGD_POL; in sky2_phy_init()
405 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
408 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
411 ctrl = PHY_CT_RESET; in sky2_phy_init()
416 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) { in sky2_phy_init()
417 if (sky2_is_copper(hw)) { in sky2_phy_init()
418 if (sky2->advertising & ADVERTISED_1000baseT_Full) in sky2_phy_init()
420 if (sky2->advertising & ADVERTISED_1000baseT_Half) in sky2_phy_init()
422 if (sky2->advertising & ADVERTISED_100baseT_Full) in sky2_phy_init()
424 if (sky2->advertising & ADVERTISED_100baseT_Half) in sky2_phy_init()
426 if (sky2->advertising & ADVERTISED_10baseT_Full) in sky2_phy_init()
428 if (sky2->advertising & ADVERTISED_10baseT_Half) in sky2_phy_init()
432 if (sky2->advertising & ADVERTISED_1000baseT_Full) in sky2_phy_init()
434 if (sky2->advertising & ADVERTISED_1000baseT_Half) in sky2_phy_init()
438 /* Restart Auto-negotiation */ in sky2_phy_init()
439 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; in sky2_phy_init()
444 /* Disable auto update for duplex flow control and duplex */ in sky2_phy_init()
447 switch (sky2->speed) { in sky2_phy_init()
449 ctrl |= PHY_CT_SP1000; in sky2_phy_init()
453 ctrl |= PHY_CT_SP100; in sky2_phy_init()
458 if (sky2->duplex == DUPLEX_FULL) { in sky2_phy_init()
460 ctrl |= PHY_CT_DUP_MD; in sky2_phy_init()
461 } else if (sky2->speed < SPEED_1000) in sky2_phy_init()
462 sky2->flow_mode = FC_NONE; in sky2_phy_init()
465 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) { in sky2_phy_init()
466 if (sky2_is_copper(hw)) in sky2_phy_init()
467 adv |= copper_fc_adv[sky2->flow_mode]; in sky2_phy_init()
469 adv |= fiber_fc_adv[sky2->flow_mode]; in sky2_phy_init()
472 reg |= gm_fc_disable[sky2->flow_mode]; in sky2_phy_init()
475 if (sky2->flow_mode & FC_RX) in sky2_phy_init()
476 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_phy_init()
478 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_phy_init()
481 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_phy_init()
483 if (hw->flags & SKY2_HW_GIGABIT) in sky2_phy_init()
484 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); in sky2_phy_init()
486 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); in sky2_phy_init()
487 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in sky2_phy_init()
493 switch (hw->chip_id) { in sky2_phy_init()
498 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR); in sky2_phy_init()
501 ctrl &= ~PHY_M_FELP_LED1_MSK; in sky2_phy_init()
503 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL); in sky2_phy_init()
504 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
509 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
510 ctrl |= PHY_M_PC_ENA_LIP_NP; in sky2_phy_init()
513 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB); in sky2_phy_init()
514 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
516 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */ in sky2_phy_init()
517 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) | in sky2_phy_init()
521 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
525 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
528 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
531 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
538 gm_phy_write(hw, port, PHY_MARV_PHY_STAT, in sky2_phy_init()
547 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
553 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
556 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
559 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
566 gm_phy_write(hw, port, PHY_MARV_INT_MASK, in sky2_phy_init()
569 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
580 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) { in sky2_phy_init()
582 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255); in sky2_phy_init()
584 /* increase differential signal amplitude in 10BASE-T */ in sky2_phy_init()
585 gm_phy_write(hw, port, 0x18, 0xaa99); in sky2_phy_init()
586 gm_phy_write(hw, port, 0x17, 0x2011); in sky2_phy_init()
588 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_phy_init()
589 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */ in sky2_phy_init()
590 gm_phy_write(hw, port, 0x18, 0xa204); in sky2_phy_init()
591 gm_phy_write(hw, port, 0x17, 0x2002); in sky2_phy_init()
595 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
596 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_phy_init()
597 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_phy_init()
599 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17); in sky2_phy_init()
600 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60); in sky2_phy_init()
601 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { in sky2_phy_init()
603 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); in sky2_phy_init()
606 gm_phy_write(hw, port, 24, 0x2800); in sky2_phy_init()
607 gm_phy_write(hw, port, 23, 0x2001); in sky2_phy_init()
610 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
611 } else if (hw->chip_id != CHIP_ID_YUKON_EX && in sky2_phy_init()
612 hw->chip_id < CHIP_ID_YUKON_SUPR) { in sky2_phy_init()
613 /* no effect on Yukon-XL */ in sky2_phy_init()
614 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); in sky2_phy_init()
616 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) || in sky2_phy_init()
617 sky2->speed == SPEED_100) { in sky2_phy_init()
623 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); in sky2_phy_init()
625 } else if (hw->chip_id == CHIP_ID_YUKON_PRM && in sky2_phy_init()
626 (sky2_read8(hw, B2_MAC_CFG) & 0xf) == 0x7) { in sky2_phy_init()
653 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fb); in sky2_phy_init()
655 gm_phy_write(hw, port, 1, 0x4099); in sky2_phy_init()
656 gm_phy_write(hw, port, 3, 0x1120); in sky2_phy_init()
657 gm_phy_write(hw, port, 11, 0x113c); in sky2_phy_init()
658 gm_phy_write(hw, port, 14, 0x8100); in sky2_phy_init()
659 gm_phy_write(hw, port, 15, 0x112a); in sky2_phy_init()
660 gm_phy_write(hw, port, 17, 0x1008); in sky2_phy_init()
662 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fc); in sky2_phy_init()
663 gm_phy_write(hw, port, 1, 0x20b0); in sky2_phy_init()
665 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); in sky2_phy_init()
669 gm_phy_write(hw, port, 17, eee_afe[i].val); in sky2_phy_init()
670 gm_phy_write(hw, port, 16, eee_afe[i].reg | 1u<<13); in sky2_phy_init()
674 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
676 /* Enable 10Base-Te (EEE) */ in sky2_phy_init()
677 if (hw->chip_id >= CHIP_ID_YUKON_PRM) { in sky2_phy_init()
678 reg = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
679 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, in sky2_phy_init()
684 /* Enable phy interrupt on auto-negotiation complete (or link up) */ in sky2_phy_init()
685 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) in sky2_phy_init()
686 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); in sky2_phy_init()
688 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_phy_init()
694 static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) in sky2_phy_power_up() argument
698 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_phy_power_up()
699 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_up()
702 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_phy_power_up()
705 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_phy_power_up()
706 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_phy_power_up()
707 sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_up()
709 if (hw->chip_id == CHIP_ID_YUKON_FE) in sky2_phy_power_up()
710 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE); in sky2_phy_power_up()
711 else if (hw->flags & SKY2_HW_ADV_POWER_CTL) in sky2_phy_power_up()
712 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_up()
715 static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port) in sky2_phy_power_down() argument
718 u16 ctrl; in sky2_phy_power_down() local
721 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_down()
724 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_phy_power_down()
726 if (hw->flags & SKY2_HW_NEWER_PHY) { in sky2_phy_power_down()
728 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
730 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
732 ctrl &= ~PHY_M_MAC_GMIF_PUP; in sky2_phy_power_down()
733 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
736 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
740 gma_write16(hw, port, GM_GP_CTRL, in sky2_phy_power_down()
745 if (hw->chip_id != CHIP_ID_YUKON_EC) { in sky2_phy_power_down()
746 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_phy_power_down()
748 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
750 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
752 ctrl |= PHY_M_PC_POW_D_ENA; in sky2_phy_power_down()
753 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
756 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
760 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN); in sky2_phy_power_down()
763 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_phy_power_down()
764 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_down()
766 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_phy_power_down()
767 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_phy_power_down()
775 reg = gma_read16(sky2->hw, sky2->port, GM_SERIAL_MODE); in sky2_set_ipg()
777 if (sky2->speed > SPEED_100) in sky2_set_ipg()
781 gma_write16(sky2->hw, sky2->port, GM_SERIAL_MODE, reg); in sky2_set_ipg()
787 struct sky2_hw *hw = sky2->hw; in sky2_enable_rx_tx() local
788 unsigned port = sky2->port; in sky2_enable_rx_tx()
791 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_enable_rx_tx()
793 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_enable_rx_tx()
799 spin_lock_bh(&sky2->phy_lock); in sky2_phy_reinit()
800 sky2_phy_init(sky2->hw, sky2->port); in sky2_phy_reinit()
802 spin_unlock_bh(&sky2->phy_lock); in sky2_phy_reinit()
808 struct sky2_hw *hw = sky2->hw; in sky2_wol_init() local
809 unsigned port = sky2->port; in sky2_wol_init()
811 u16 ctrl; in sky2_wol_init() local
814 sky2_write16(hw, B0_CTST, CS_RST_CLR); in sky2_wol_init()
815 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_wol_init()
817 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_wol_init()
818 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_wol_init()
821 * sky2_reset will re-enable on resume in sky2_wol_init()
823 save_mode = sky2->flow_mode; in sky2_wol_init()
824 ctrl = sky2->advertising; in sky2_wol_init()
826 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full); in sky2_wol_init()
827 sky2->flow_mode = FC_NONE; in sky2_wol_init()
829 spin_lock_bh(&sky2->phy_lock); in sky2_wol_init()
830 sky2_phy_power_up(hw, port); in sky2_wol_init()
831 sky2_phy_init(hw, port); in sky2_wol_init()
832 spin_unlock_bh(&sky2->phy_lock); in sky2_wol_init()
834 sky2->flow_mode = save_mode; in sky2_wol_init()
835 sky2->advertising = ctrl; in sky2_wol_init()
837 /* Set GMAC to no flow control and auto update for speed/duplex */ in sky2_wol_init()
838 gma_write16(hw, port, GM_GP_CTRL, in sky2_wol_init()
843 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR), in sky2_wol_init()
844 sky2->netdev->dev_addr, ETH_ALEN); in sky2_wol_init()
847 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT); in sky2_wol_init()
848 ctrl = 0; in sky2_wol_init()
849 if (sky2->wol & WAKE_PHY) in sky2_wol_init()
850 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT; in sky2_wol_init()
852 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT; in sky2_wol_init()
854 if (sky2->wol & WAKE_MAGIC) in sky2_wol_init()
855 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT; in sky2_wol_init()
857 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT; in sky2_wol_init()
859 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT; in sky2_wol_init()
860 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); in sky2_wol_init()
863 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF); in sky2_wol_init()
865 /* Needed by some broken BIOSes, use PCI rather than PCI-e for WOL */ in sky2_wol_init()
867 u32 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_wol_init()
869 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_wol_init()
873 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_wol_init()
874 sky2_read32(hw, B0_CTST); in sky2_wol_init()
877 static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) in sky2_set_tx_stfwd() argument
879 struct net_device *dev = hw->dev[port]; in sky2_set_tx_stfwd()
881 if ( (hw->chip_id == CHIP_ID_YUKON_EX && in sky2_set_tx_stfwd()
882 hw->chip_rev != CHIP_REV_YU_EX_A0) || in sky2_set_tx_stfwd()
883 hw->chip_id >= CHIP_ID_YUKON_FE_P) { in sky2_set_tx_stfwd()
884 /* Yukon-Extreme B0 and further Extreme devices */ in sky2_set_tx_stfwd()
885 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
886 } else if (dev->mtu > ETH_DATA_LEN) { in sky2_set_tx_stfwd()
888 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), in sky2_set_tx_stfwd()
891 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); in sky2_set_tx_stfwd()
893 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
896 static void sky2_mac_init(struct sky2_hw *hw, unsigned port) in sky2_mac_init() argument
898 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_mac_init()
902 const u8 *addr = hw->dev[port]->dev_addr; in sky2_mac_init()
904 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_mac_init()
905 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_mac_init()
907 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
909 if (hw->chip_id == CHIP_ID_YUKON_XL && in sky2_mac_init()
910 hw->chip_rev == CHIP_REV_YU_XL_A0 && in sky2_mac_init()
912 /* WA DEV_472 -- looks like crossed wires on port 2 */ in sky2_mac_init()
914 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
916 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET); in sky2_mac_init()
917 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
918 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL || in sky2_mac_init()
919 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 || in sky2_mac_init()
920 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0); in sky2_mac_init()
923 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_init()
926 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); in sky2_mac_init()
928 spin_lock_bh(&sky2->phy_lock); in sky2_mac_init()
929 sky2_phy_power_up(hw, port); in sky2_mac_init()
930 sky2_phy_init(hw, port); in sky2_mac_init()
931 spin_unlock_bh(&sky2->phy_lock); in sky2_mac_init()
934 reg = gma_read16(hw, port, GM_PHY_ADDR); in sky2_mac_init()
935 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); in sky2_mac_init()
938 gma_read16(hw, port, i); in sky2_mac_init()
939 gma_write16(hw, port, GM_PHY_ADDR, reg); in sky2_mac_init()
942 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); in sky2_mac_init()
945 gma_write16(hw, port, GM_RX_CTRL, in sky2_mac_init()
948 /* transmit flow control */ in sky2_mac_init()
949 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); in sky2_mac_init()
952 gma_write16(hw, port, GM_TX_PARAM, in sky2_mac_init()
962 if (hw->dev[port]->mtu > ETH_DATA_LEN) in sky2_mac_init()
965 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_mac_init()
966 hw->chip_rev == CHIP_REV_YU_EC_U_B1) in sky2_mac_init()
969 gma_write16(hw, port, GM_SERIAL_MODE, reg); in sky2_mac_init()
972 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); in sky2_mac_init()
975 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); in sky2_mac_init()
978 gma_write16(hw, port, GM_TX_IRQ_MSK, 0); in sky2_mac_init()
979 gma_write16(hw, port, GM_RX_IRQ_MSK, 0); in sky2_mac_init()
980 gma_write16(hw, port, GM_TR_IRQ_MSK, 0); in sky2_mac_init()
983 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
985 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_mac_init()
986 hw->chip_id == CHIP_ID_YUKON_FE_P) in sky2_mac_init()
989 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
991 if (hw->chip_id == CHIP_ID_YUKON_XL) { in sky2_mac_init()
992 /* Hardware errata - clear flush mask */ in sky2_mac_init()
993 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0); in sky2_mac_init()
995 /* Flush Rx MAC FIFO on any flow control or error */ in sky2_mac_init()
996 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); in sky2_mac_init()
1002 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1003 hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_mac_init()
1005 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg); in sky2_mac_init()
1008 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
1009 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); in sky2_mac_init()
1012 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) { in sky2_mac_init()
1014 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1015 hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_mac_init()
1019 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg); in sky2_mac_init()
1020 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8); in sky2_mac_init()
1022 sky2_set_tx_stfwd(hw, port); in sky2_mac_init()
1025 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1026 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_mac_init()
1028 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA)); in sky2_mac_init()
1030 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg); in sky2_mac_init()
1035 static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space) in sky2_ramset() argument
1039 /* convert from K bytes to qwords used for hw register */ in sky2_ramset()
1042 end = start + space - 1; in sky2_ramset()
1044 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); in sky2_ramset()
1045 sky2_write32(hw, RB_ADDR(q, RB_START), start); in sky2_ramset()
1046 sky2_write32(hw, RB_ADDR(q, RB_END), end); in sky2_ramset()
1047 sky2_write32(hw, RB_ADDR(q, RB_WP), start); in sky2_ramset()
1048 sky2_write32(hw, RB_ADDR(q, RB_RP), start); in sky2_ramset()
1051 u32 tp = space - space/4; in sky2_ramset()
1057 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp); in sky2_ramset()
1058 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2); in sky2_ramset()
1060 tp = space - 8192/8; in sky2_ramset()
1061 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp); in sky2_ramset()
1062 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4); in sky2_ramset()
1067 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD); in sky2_ramset()
1070 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD); in sky2_ramset()
1071 sky2_read8(hw, RB_ADDR(q, RB_CTRL)); in sky2_ramset()
1075 static void sky2_qset(struct sky2_hw *hw, u16 q) in sky2_qset() argument
1077 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); in sky2_qset()
1078 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); in sky2_qset()
1079 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); in sky2_qset()
1080 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT); in sky2_qset()
1086 static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr, in sky2_prefetch_init() argument
1089 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); in sky2_prefetch_init()
1090 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR); in sky2_prefetch_init()
1091 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr)); in sky2_prefetch_init()
1092 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr)); in sky2_prefetch_init()
1093 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last); in sky2_prefetch_init()
1094 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON); in sky2_prefetch_init()
1096 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL)); in sky2_prefetch_init()
1101 struct sky2_tx_le *le = sky2->tx_le + *slot; in get_tx_le()
1103 *slot = RING_NEXT(*slot, sky2->tx_ring_size); in get_tx_le()
1104 le->ctrl = 0; in get_tx_le()
1112 sky2->tx_prod = sky2->tx_cons = 0; in tx_init()
1113 sky2->tx_tcpsum = 0; in tx_init()
1114 sky2->tx_last_mss = 0; in tx_init()
1115 netdev_reset_queue(sky2->netdev); in tx_init()
1117 le = get_tx_le(sky2, &sky2->tx_prod); in tx_init()
1118 le->addr = 0; in tx_init()
1119 le->opcode = OP_ADDR64 | HW_OWNER; in tx_init()
1120 sky2->tx_last_upper = 0; in tx_init()
1124 static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx) in sky2_put_idx() argument
1128 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx); in sky2_put_idx()
1134 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put; in sky2_next_rx()
1135 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE); in sky2_next_rx()
1136 le->ctrl = 0; in sky2_next_rx()
1145 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); in sky2_get_rx_threshold()
1148 return (size - 8) / sizeof(u32); in sky2_get_rx_threshold()
1157 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); in sky2_get_rx_data_size()
1159 sky2->rx_nfrags = size >> PAGE_SHIFT; in sky2_get_rx_data_size()
1160 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr)); in sky2_get_rx_data_size()
1163 size -= sky2->rx_nfrags << PAGE_SHIFT; in sky2_get_rx_data_size()
1182 le->addr = cpu_to_le32(upper_32_bits(map)); in sky2_rx_add()
1183 le->opcode = OP_ADDR64 | HW_OWNER; in sky2_rx_add()
1187 le->addr = cpu_to_le32(lower_32_bits(map)); in sky2_rx_add()
1188 le->length = cpu_to_le16(len); in sky2_rx_add()
1189 le->opcode = op | HW_OWNER; in sky2_rx_add()
1198 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size); in sky2_rx_submit()
1200 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++) in sky2_rx_submit()
1201 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE); in sky2_rx_submit()
1208 struct sk_buff *skb = re->skb; in sky2_rx_map_skb()
1211 re->data_addr = dma_map_single(&pdev->dev, skb->data, size, in sky2_rx_map_skb()
1213 if (dma_mapping_error(&pdev->dev, re->data_addr)) in sky2_rx_map_skb()
1218 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in sky2_rx_map_skb()
1219 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in sky2_rx_map_skb()
1221 re->frag_addr[i] = skb_frag_dma_map(&pdev->dev, frag, 0, in sky2_rx_map_skb()
1225 if (dma_mapping_error(&pdev->dev, re->frag_addr[i])) in sky2_rx_map_skb()
1231 while (--i >= 0) { in sky2_rx_map_skb()
1232 dma_unmap_page(&pdev->dev, re->frag_addr[i], in sky2_rx_map_skb()
1233 skb_frag_size(&skb_shinfo(skb)->frags[i]), in sky2_rx_map_skb()
1237 dma_unmap_single(&pdev->dev, re->data_addr, in sky2_rx_map_skb()
1242 dev_warn(&pdev->dev, "%s: rx mapping error\n", in sky2_rx_map_skb()
1243 skb->dev->name); in sky2_rx_map_skb()
1244 return -EIO; in sky2_rx_map_skb()
1249 struct sk_buff *skb = re->skb; in sky2_rx_unmap_skb()
1252 dma_unmap_single(&pdev->dev, re->data_addr, in sky2_rx_unmap_skb()
1255 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) in sky2_rx_unmap_skb()
1256 dma_unmap_page(&pdev->dev, re->frag_addr[i], in sky2_rx_unmap_skb()
1257 skb_frag_size(&skb_shinfo(skb)->frags[i]), in sky2_rx_unmap_skb()
1269 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN); in rx_set_checksum()
1270 le->ctrl = 0; in rx_set_checksum()
1271 le->opcode = OP_TCPSTART | HW_OWNER; in rx_set_checksum()
1273 sky2_write32(sky2->hw, in rx_set_checksum()
1274 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_checksum()
1275 (sky2->netdev->features & NETIF_F_RXCSUM) in rx_set_checksum()
1283 struct sky2_hw *hw = sky2->hw; in rx_set_rss() local
1287 if (hw->flags & SKY2_HW_NEW_LE) { in rx_set_rss()
1289 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL); in rx_set_rss()
1298 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4), in rx_set_rss()
1302 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), in rx_set_rss()
1305 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1308 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1313 * The RX Stop command will not work for Yukon-2 if the BMU does not
1324 struct sky2_hw *hw = sky2->hw; in sky2_rx_stop() local
1325 unsigned rxq = rxqaddr[sky2->port]; in sky2_rx_stop()
1329 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD); in sky2_rx_stop()
1332 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL)) in sky2_rx_stop()
1333 == sky2_read8(hw, RB_ADDR(rxq, Q_RL))) in sky2_rx_stop()
1336 netdev_warn(sky2->netdev, "receiver stop failed\n"); in sky2_rx_stop()
1338 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); in sky2_rx_stop()
1341 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); in sky2_rx_stop()
1349 if (sky2->rx_le) in sky2_rx_clean()
1350 memset(sky2->rx_le, 0, RX_LE_BYTES); in sky2_rx_clean()
1352 for (i = 0; i < sky2->rx_pending; i++) { in sky2_rx_clean()
1353 struct rx_ring_info *re = sky2->rx_ring + i; in sky2_rx_clean()
1355 if (re->skb) { in sky2_rx_clean()
1356 sky2_rx_unmap_skb(sky2->hw->pdev, re); in sky2_rx_clean()
1357 kfree_skb(re->skb); in sky2_rx_clean()
1358 re->skb = NULL; in sky2_rx_clean()
1368 struct sky2_hw *hw = sky2->hw; in sky2_ioctl() local
1369 int err = -EOPNOTSUPP; in sky2_ioctl()
1372 return -ENODEV; /* Phy still in reset */ in sky2_ioctl()
1376 data->phy_id = PHY_ADDR_MARV; in sky2_ioctl()
1382 spin_lock_bh(&sky2->phy_lock); in sky2_ioctl()
1383 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val); in sky2_ioctl()
1384 spin_unlock_bh(&sky2->phy_lock); in sky2_ioctl()
1386 data->val_out = val; in sky2_ioctl()
1391 spin_lock_bh(&sky2->phy_lock); in sky2_ioctl()
1392 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f, in sky2_ioctl()
1393 data->val_in); in sky2_ioctl()
1394 spin_unlock_bh(&sky2->phy_lock); in sky2_ioctl()
1405 struct sky2_hw *hw = sky2->hw; in sky2_vlan_mode() local
1406 u16 port = sky2->port; in sky2_vlan_mode()
1409 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), in sky2_vlan_mode()
1412 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), in sky2_vlan_mode()
1416 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_vlan_mode()
1419 dev->vlan_features |= SKY2_VLAN_OFFLOADS; in sky2_vlan_mode()
1421 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_vlan_mode()
1424 /* Can't do transmit offload of vlan without hw vlan */ in sky2_vlan_mode()
1425 dev->vlan_features &= ~SKY2_VLAN_OFFLOADS; in sky2_vlan_mode()
1430 static inline unsigned sky2_rx_pad(const struct sky2_hw *hw) in sky2_rx_pad() argument
1432 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2; in sky2_rx_pad()
1437 * make the skb non-linear with a fragment list of pages.
1444 skb = __netdev_alloc_skb(sky2->netdev, in sky2_rx_alloc()
1445 sky2->rx_data_size + sky2_rx_pad(sky2->hw), in sky2_rx_alloc()
1450 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) { in sky2_rx_alloc()
1458 start = PTR_ALIGN(skb->data, 8); in sky2_rx_alloc()
1459 skb_reserve(skb, start - skb->data); in sky2_rx_alloc()
1463 for (i = 0; i < sky2->rx_nfrags; i++) { in sky2_rx_alloc()
1480 sky2_put_idx(sky2->hw, rxq, sky2->rx_put); in sky2_rx_update()
1485 struct sky2_hw *hw = sky2->hw; in sky2_alloc_rx_skbs() local
1488 sky2->rx_data_size = sky2_get_rx_data_size(sky2); in sky2_alloc_rx_skbs()
1491 for (i = 0; i < sky2->rx_pending; i++) { in sky2_alloc_rx_skbs()
1492 struct rx_ring_info *re = sky2->rx_ring + i; in sky2_alloc_rx_skbs()
1494 re->skb = sky2_rx_alloc(sky2, GFP_KERNEL); in sky2_alloc_rx_skbs()
1495 if (!re->skb) in sky2_alloc_rx_skbs()
1496 return -ENOMEM; in sky2_alloc_rx_skbs()
1498 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) { in sky2_alloc_rx_skbs()
1499 dev_kfree_skb(re->skb); in sky2_alloc_rx_skbs()
1500 re->skb = NULL; in sky2_alloc_rx_skbs()
1501 return -ENOMEM; in sky2_alloc_rx_skbs()
1518 struct sky2_hw *hw = sky2->hw; in sky2_rx_start() local
1520 unsigned rxq = rxqaddr[sky2->port]; in sky2_rx_start()
1523 sky2->rx_put = sky2->rx_next = 0; in sky2_rx_start()
1524 sky2_qset(hw, rxq); in sky2_rx_start()
1527 if (pci_is_pcie(hw->pdev)) in sky2_rx_start()
1528 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX); in sky2_rx_start()
1533 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_rx_start()
1534 hw->chip_rev > CHIP_REV_YU_EC_U_A0) in sky2_rx_start()
1535 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); in sky2_rx_start()
1537 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); in sky2_rx_start()
1539 if (!(hw->flags & SKY2_HW_NEW_LE)) in sky2_rx_start()
1542 if (!(hw->flags & SKY2_HW_RSS_BROKEN)) in sky2_rx_start()
1543 rx_set_rss(sky2->netdev, sky2->netdev->features); in sky2_rx_start()
1546 for (i = 0; i < sky2->rx_pending; i++) { in sky2_rx_start()
1547 re = sky2->rx_ring + i; in sky2_rx_start()
1559 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF); in sky2_rx_start()
1561 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh); in sky2_rx_start()
1562 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON); in sky2_rx_start()
1568 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_rx_start()
1569 hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_rx_start()
1577 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF); in sky2_rx_start()
1580 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) { in sky2_rx_start()
1582 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL), in sky2_rx_start()
1586 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST), in sky2_rx_start()
1593 struct sky2_hw *hw = sky2->hw; in sky2_alloc_buffers() local
1596 sky2->tx_le = dma_alloc_coherent(&hw->pdev->dev, in sky2_alloc_buffers()
1597 sky2->tx_ring_size * sizeof(struct sky2_tx_le), in sky2_alloc_buffers()
1598 &sky2->tx_le_map, GFP_KERNEL); in sky2_alloc_buffers()
1599 if (!sky2->tx_le) in sky2_alloc_buffers()
1602 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info), in sky2_alloc_buffers()
1604 if (!sky2->tx_ring) in sky2_alloc_buffers()
1607 sky2->rx_le = dma_alloc_coherent(&hw->pdev->dev, RX_LE_BYTES, in sky2_alloc_buffers()
1608 &sky2->rx_le_map, GFP_KERNEL); in sky2_alloc_buffers()
1609 if (!sky2->rx_le) in sky2_alloc_buffers()
1612 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info), in sky2_alloc_buffers()
1614 if (!sky2->rx_ring) in sky2_alloc_buffers()
1619 return -ENOMEM; in sky2_alloc_buffers()
1624 struct sky2_hw *hw = sky2->hw; in sky2_free_buffers() local
1628 if (sky2->rx_le) { in sky2_free_buffers()
1629 dma_free_coherent(&hw->pdev->dev, RX_LE_BYTES, sky2->rx_le, in sky2_free_buffers()
1630 sky2->rx_le_map); in sky2_free_buffers()
1631 sky2->rx_le = NULL; in sky2_free_buffers()
1633 if (sky2->tx_le) { in sky2_free_buffers()
1634 dma_free_coherent(&hw->pdev->dev, in sky2_free_buffers()
1635 sky2->tx_ring_size * sizeof(struct sky2_tx_le), in sky2_free_buffers()
1636 sky2->tx_le, sky2->tx_le_map); in sky2_free_buffers()
1637 sky2->tx_le = NULL; in sky2_free_buffers()
1639 kfree(sky2->tx_ring); in sky2_free_buffers()
1640 kfree(sky2->rx_ring); in sky2_free_buffers()
1642 sky2->tx_ring = NULL; in sky2_free_buffers()
1643 sky2->rx_ring = NULL; in sky2_free_buffers()
1648 struct sky2_hw *hw = sky2->hw; in sky2_hw_up() local
1649 unsigned port = sky2->port; in sky2_hw_up()
1652 struct net_device *otherdev = hw->dev[sky2->port^1]; in sky2_hw_up()
1657 * On dual port PCI-X card, there is an problem where status in sky2_hw_up()
1661 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) { in sky2_hw_up()
1664 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); in sky2_hw_up()
1666 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); in sky2_hw_up()
1669 sky2_mac_init(hw, port); in sky2_hw_up()
1672 ramsize = sky2_read8(hw, B2_E_0) * 4; in sky2_hw_up()
1676 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize); in sky2_hw_up()
1680 rxspace = 8 + (2*(ramsize - 16))/3; in sky2_hw_up()
1682 sky2_ramset(hw, rxqaddr[port], 0, rxspace); in sky2_hw_up()
1683 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace); in sky2_hw_up()
1686 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), in sky2_hw_up()
1690 sky2_qset(hw, txqaddr[port]); in sky2_hw_up()
1693 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0) in sky2_hw_up()
1694 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); in sky2_hw_up()
1697 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_hw_up()
1698 hw->chip_rev == CHIP_REV_YU_EC_U_A0) in sky2_hw_up()
1699 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); in sky2_hw_up()
1701 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, in sky2_hw_up()
1702 sky2->tx_ring_size - 1); in sky2_hw_up()
1704 sky2_vlan_mode(sky2->netdev, sky2->netdev->features); in sky2_hw_up()
1705 netdev_update_features(sky2->netdev); in sky2_hw_up()
1711 static int sky2_setup_irq(struct sky2_hw *hw, const char *name) in sky2_setup_irq() argument
1713 struct pci_dev *pdev = hw->pdev; in sky2_setup_irq()
1716 err = request_irq(pdev->irq, sky2_intr, in sky2_setup_irq()
1717 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED, in sky2_setup_irq()
1718 name, hw); in sky2_setup_irq()
1720 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq); in sky2_setup_irq()
1722 hw->flags |= SKY2_HW_IRQ_SETUP; in sky2_setup_irq()
1724 napi_enable(&hw->napi); in sky2_setup_irq()
1725 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); in sky2_setup_irq()
1726 sky2_read32(hw, B0_IMSK); in sky2_setup_irq()
1737 struct sky2_hw *hw = sky2->hw; in sky2_open() local
1738 unsigned port = sky2->port; in sky2_open()
1749 if (hw->ports == 1 && (err = sky2_setup_irq(hw, dev->name))) in sky2_open()
1755 imask = sky2_read32(hw, B0_IMSK); in sky2_open()
1757 if (hw->chip_id == CHIP_ID_YUKON_OPT || in sky2_open()
1758 hw->chip_id == CHIP_ID_YUKON_PRM || in sky2_open()
1759 hw->chip_id == CHIP_ID_YUKON_OP_2) in sky2_open()
1763 sky2_write32(hw, B0_IMSK, imask); in sky2_open()
1764 sky2_read32(hw, B0_IMSK); in sky2_open()
1778 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1); in tx_inuse()
1784 return sky2->tx_pending - tx_inuse(sky2); in tx_avail()
1792 count = (skb_shinfo(skb)->nr_frags + 1) in tx_le_req()
1800 if (skb->ip_summed == CHECKSUM_PARTIAL) in tx_le_req()
1808 if (re->flags & TX_MAP_SINGLE) in sky2_tx_unmap()
1809 dma_unmap_single(&pdev->dev, dma_unmap_addr(re, mapaddr), in sky2_tx_unmap()
1811 else if (re->flags & TX_MAP_PAGE) in sky2_tx_unmap()
1812 dma_unmap_page(&pdev->dev, dma_unmap_addr(re, mapaddr), in sky2_tx_unmap()
1814 re->flags = 0; in sky2_tx_unmap()
1827 struct sky2_hw *hw = sky2->hw; in sky2_xmit_frame() local
1835 u8 ctrl; in sky2_xmit_frame() local
1841 mapping = dma_map_single(&hw->pdev->dev, skb->data, len, in sky2_xmit_frame()
1844 if (dma_mapping_error(&hw->pdev->dev, mapping)) in sky2_xmit_frame()
1847 slot = sky2->tx_prod; in sky2_xmit_frame()
1849 "tx queued, slot %u, len %d\n", slot, skb->len); in sky2_xmit_frame()
1853 if (upper != sky2->tx_last_upper) { in sky2_xmit_frame()
1855 le->addr = cpu_to_le32(upper); in sky2_xmit_frame()
1856 sky2->tx_last_upper = upper; in sky2_xmit_frame()
1857 le->opcode = OP_ADDR64 | HW_OWNER; in sky2_xmit_frame()
1861 mss = skb_shinfo(skb)->gso_size; in sky2_xmit_frame()
1864 if (!(hw->flags & SKY2_HW_NEW_LE)) in sky2_xmit_frame()
1867 if (mss != sky2->tx_last_mss) { in sky2_xmit_frame()
1869 le->addr = cpu_to_le32(mss); in sky2_xmit_frame()
1871 if (hw->flags & SKY2_HW_NEW_LE) in sky2_xmit_frame()
1872 le->opcode = OP_MSS | HW_OWNER; in sky2_xmit_frame()
1874 le->opcode = OP_LRGLEN | HW_OWNER; in sky2_xmit_frame()
1875 sky2->tx_last_mss = mss; in sky2_xmit_frame()
1879 ctrl = 0; in sky2_xmit_frame()
1885 le->addr = 0; in sky2_xmit_frame()
1886 le->opcode = OP_VLAN|HW_OWNER; in sky2_xmit_frame()
1888 le->opcode |= OP_VLAN; in sky2_xmit_frame()
1889 le->length = cpu_to_be16(skb_vlan_tag_get(skb)); in sky2_xmit_frame()
1890 ctrl |= INS_VLAN; in sky2_xmit_frame()
1894 if (skb->ip_summed == CHECKSUM_PARTIAL) { in sky2_xmit_frame()
1896 if (hw->flags & SKY2_HW_AUTO_TX_SUM) in sky2_xmit_frame()
1897 ctrl |= CALSUM; /* auto checksum */ in sky2_xmit_frame()
1903 tcpsum |= offset + skb->csum_offset; /* sum write */ in sky2_xmit_frame()
1905 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM; in sky2_xmit_frame()
1906 if (ip_hdr(skb)->protocol == IPPROTO_UDP) in sky2_xmit_frame()
1907 ctrl |= UDPTCP; in sky2_xmit_frame()
1909 if (tcpsum != sky2->tx_tcpsum) { in sky2_xmit_frame()
1910 sky2->tx_tcpsum = tcpsum; in sky2_xmit_frame()
1913 le->addr = cpu_to_le32(tcpsum); in sky2_xmit_frame()
1914 le->length = 0; /* initial checksum value */ in sky2_xmit_frame()
1915 le->ctrl = 1; /* one packet */ in sky2_xmit_frame()
1916 le->opcode = OP_TCPLISW | HW_OWNER; in sky2_xmit_frame()
1921 re = sky2->tx_ring + slot; in sky2_xmit_frame()
1922 re->flags = TX_MAP_SINGLE; in sky2_xmit_frame()
1927 le->addr = cpu_to_le32(lower_32_bits(mapping)); in sky2_xmit_frame()
1928 le->length = cpu_to_le16(len); in sky2_xmit_frame()
1929 le->ctrl = ctrl; in sky2_xmit_frame()
1930 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER); in sky2_xmit_frame()
1933 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in sky2_xmit_frame()
1934 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in sky2_xmit_frame()
1936 mapping = skb_frag_dma_map(&hw->pdev->dev, frag, 0, in sky2_xmit_frame()
1939 if (dma_mapping_error(&hw->pdev->dev, mapping)) in sky2_xmit_frame()
1943 if (upper != sky2->tx_last_upper) { in sky2_xmit_frame()
1945 le->addr = cpu_to_le32(upper); in sky2_xmit_frame()
1946 sky2->tx_last_upper = upper; in sky2_xmit_frame()
1947 le->opcode = OP_ADDR64 | HW_OWNER; in sky2_xmit_frame()
1950 re = sky2->tx_ring + slot; in sky2_xmit_frame()
1951 re->flags = TX_MAP_PAGE; in sky2_xmit_frame()
1956 le->addr = cpu_to_le32(lower_32_bits(mapping)); in sky2_xmit_frame()
1957 le->length = cpu_to_le16(skb_frag_size(frag)); in sky2_xmit_frame()
1958 le->ctrl = ctrl; in sky2_xmit_frame()
1959 le->opcode = OP_BUFFER | HW_OWNER; in sky2_xmit_frame()
1962 re->skb = skb; in sky2_xmit_frame()
1963 le->ctrl |= EOP; in sky2_xmit_frame()
1965 sky2->tx_prod = slot; in sky2_xmit_frame()
1970 netdev_sent_queue(dev, skb->len); in sky2_xmit_frame()
1971 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod); in sky2_xmit_frame()
1976 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) { in sky2_xmit_frame()
1977 re = sky2->tx_ring + i; in sky2_xmit_frame()
1979 sky2_tx_unmap(hw->pdev, re); in sky2_xmit_frame()
1984 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name); in sky2_xmit_frame()
1993 * 1. The hardware will tell us about partial completion of multi-part
2001 struct net_device *dev = sky2->netdev; in sky2_tx_complete()
2005 BUG_ON(done >= sky2->tx_ring_size); in sky2_tx_complete()
2007 for (idx = sky2->tx_cons; idx != done; in sky2_tx_complete()
2008 idx = RING_NEXT(idx, sky2->tx_ring_size)) { in sky2_tx_complete()
2009 struct tx_ring_info *re = sky2->tx_ring + idx; in sky2_tx_complete()
2010 struct sk_buff *skb = re->skb; in sky2_tx_complete()
2012 sky2_tx_unmap(sky2->hw->pdev, re); in sky2_tx_complete()
2019 bytes_compl += skb->len; in sky2_tx_complete()
2021 re->skb = NULL; in sky2_tx_complete()
2024 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size); in sky2_tx_complete()
2028 sky2->tx_cons = idx; in sky2_tx_complete()
2033 u64_stats_update_begin(&sky2->tx_stats.syncp); in sky2_tx_complete()
2034 sky2->tx_stats.packets += pkts_compl; in sky2_tx_complete()
2035 sky2->tx_stats.bytes += bytes_compl; in sky2_tx_complete()
2036 u64_stats_update_end(&sky2->tx_stats.syncp); in sky2_tx_complete()
2039 static void sky2_tx_reset(struct sky2_hw *hw, unsigned port) in sky2_tx_reset() argument
2042 sky2_write8(hw, SK_REG(port, TXA_CTRL), in sky2_tx_reset()
2046 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); in sky2_tx_reset()
2047 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); in sky2_tx_reset()
2050 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), in sky2_tx_reset()
2054 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL), in sky2_tx_reset()
2057 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); in sky2_tx_reset()
2058 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); in sky2_tx_reset()
2060 sky2_read32(hw, B0_CTST); in sky2_tx_reset()
2065 struct sky2_hw *hw = sky2->hw; in sky2_hw_down() local
2066 unsigned port = sky2->port; in sky2_hw_down()
2067 u16 ctrl; in sky2_hw_down() local
2069 /* Force flow control off */ in sky2_hw_down()
2070 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_hw_down()
2073 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP); in sky2_hw_down()
2074 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR)); in sky2_hw_down()
2076 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), in sky2_hw_down()
2079 ctrl = gma_read16(hw, port, GM_GP_CTRL); in sky2_hw_down()
2080 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA); in sky2_hw_down()
2081 gma_write16(hw, port, GM_GP_CTRL, ctrl); in sky2_hw_down()
2083 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_hw_down()
2086 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && in sky2_hw_down()
2087 port == 0 && hw->dev[1] && netif_running(hw->dev[1]))) in sky2_hw_down()
2088 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in sky2_hw_down()
2090 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_hw_down()
2093 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0); in sky2_hw_down()
2094 sky2_write32(hw, STAT_TX_TIMER_CNT, 0); in sky2_hw_down()
2095 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0); in sky2_hw_down()
2096 sky2_read8(hw, STAT_ISR_TIMER_CTRL); in sky2_hw_down()
2100 spin_lock_bh(&sky2->phy_lock); in sky2_hw_down()
2101 sky2_phy_power_down(hw, port); in sky2_hw_down()
2102 spin_unlock_bh(&sky2->phy_lock); in sky2_hw_down()
2104 sky2_tx_reset(hw, port); in sky2_hw_down()
2106 /* Free any pending frames stuck in HW queue */ in sky2_hw_down()
2107 sky2_tx_complete(sky2, sky2->tx_prod); in sky2_hw_down()
2114 struct sky2_hw *hw = sky2->hw; in sky2_close() local
2117 if (!sky2->tx_le) in sky2_close()
2122 if (hw->ports == 1) { in sky2_close()
2123 sky2_write32(hw, B0_IMSK, 0); in sky2_close()
2124 sky2_read32(hw, B0_IMSK); in sky2_close()
2126 napi_disable(&hw->napi); in sky2_close()
2127 free_irq(hw->pdev->irq, hw); in sky2_close()
2128 hw->flags &= ~SKY2_HW_IRQ_SETUP; in sky2_close()
2133 imask = sky2_read32(hw, B0_IMSK); in sky2_close()
2134 imask &= ~portirq_msk[sky2->port]; in sky2_close()
2135 sky2_write32(hw, B0_IMSK, imask); in sky2_close()
2136 sky2_read32(hw, B0_IMSK); in sky2_close()
2138 synchronize_irq(hw->pdev->irq); in sky2_close()
2139 napi_synchronize(&hw->napi); in sky2_close()
2149 static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux) in sky2_phy_speed() argument
2151 if (hw->flags & SKY2_HW_FIBRE_PHY) in sky2_phy_speed()
2154 if (!(hw->flags & SKY2_HW_GIGABIT)) { in sky2_phy_speed()
2173 struct sky2_hw *hw = sky2->hw; in sky2_link_up() local
2174 unsigned port = sky2->port; in sky2_link_up()
2186 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_link_up()
2188 netif_carrier_on(sky2->netdev); in sky2_link_up()
2190 mod_timer(&hw->watchdog_timer, jiffies + 1); in sky2_link_up()
2193 sky2_write8(hw, SK_REG(port, LNK_LED_REG), in sky2_link_up()
2196 netif_info(sky2, link, sky2->netdev, in sky2_link_up()
2197 "Link is up at %d Mbps, %s duplex, flow control %s\n", in sky2_link_up()
2198 sky2->speed, in sky2_link_up()
2199 sky2->duplex == DUPLEX_FULL ? "full" : "half", in sky2_link_up()
2200 fc_name[sky2->flow_status]); in sky2_link_up()
2205 struct sky2_hw *hw = sky2->hw; in sky2_link_down() local
2206 unsigned port = sky2->port; in sky2_link_down()
2209 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); in sky2_link_down()
2211 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_link_down()
2213 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_link_down()
2215 netif_carrier_off(sky2->netdev); in sky2_link_down()
2218 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); in sky2_link_down()
2220 netif_info(sky2, link, sky2->netdev, "Link is down\n"); in sky2_link_down()
2222 sky2_phy_init(hw, port); in sky2_link_down()
2235 struct sky2_hw *hw = sky2->hw; in sky2_autoneg_done() local
2236 unsigned port = sky2->port; in sky2_autoneg_done()
2239 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); in sky2_autoneg_done()
2240 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); in sky2_autoneg_done()
2242 netdev_err(sky2->netdev, "remote fault\n"); in sky2_autoneg_done()
2243 return -1; in sky2_autoneg_done()
2247 netdev_err(sky2->netdev, "speed/duplex mismatch\n"); in sky2_autoneg_done()
2248 return -1; in sky2_autoneg_done()
2251 sky2->speed = sky2_phy_speed(hw, aux); in sky2_autoneg_done()
2252 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF; in sky2_autoneg_done()
2257 if (hw->flags & SKY2_HW_FIBRE_PHY) { in sky2_autoneg_done()
2272 sky2->flow_status = FC_NONE; in sky2_autoneg_done()
2275 sky2->flow_status = FC_BOTH; in sky2_autoneg_done()
2277 sky2->flow_status = FC_RX; in sky2_autoneg_done()
2280 sky2->flow_status = FC_TX; in sky2_autoneg_done()
2283 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 && in sky2_autoneg_done()
2284 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX)) in sky2_autoneg_done()
2285 sky2->flow_status = FC_NONE; in sky2_autoneg_done()
2287 if (sky2->flow_status & FC_TX) in sky2_autoneg_done()
2288 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_autoneg_done()
2290 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_autoneg_done()
2296 static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) in sky2_phy_intr() argument
2298 struct net_device *dev = hw->dev[port]; in sky2_phy_intr()
2305 spin_lock(&sky2->phy_lock); in sky2_phy_intr()
2306 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); in sky2_phy_intr()
2307 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); in sky2_phy_intr()
2309 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n", in sky2_phy_intr()
2320 sky2->speed = sky2_phy_speed(hw, phystat); in sky2_phy_intr()
2323 sky2->duplex = in sky2_phy_intr()
2333 spin_unlock(&sky2->phy_lock); in sky2_phy_intr()
2336 /* Special quick link interrupt (Yukon-2 Optima only) */
2337 static void sky2_qlink_intr(struct sky2_hw *hw) in sky2_qlink_intr() argument
2339 struct sky2_port *sky2 = netdev_priv(hw->dev[0]); in sky2_qlink_intr()
2344 imask = sky2_read32(hw, B0_IMSK); in sky2_qlink_intr()
2346 sky2_write32(hw, B0_IMSK, imask); in sky2_qlink_intr()
2349 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); in sky2_qlink_intr()
2350 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_qlink_intr()
2351 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); in sky2_qlink_intr()
2352 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_qlink_intr()
2363 struct sky2_hw *hw = sky2->hw; in sky2_tx_timeout() local
2368 sky2->tx_cons, sky2->tx_prod, in sky2_tx_timeout()
2369 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), in sky2_tx_timeout()
2370 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE))); in sky2_tx_timeout()
2373 schedule_work(&hw->restart_work); in sky2_tx_timeout()
2379 struct sky2_hw *hw = sky2->hw; in sky2_change_mtu() local
2380 unsigned port = sky2->port; in sky2_change_mtu()
2386 dev->mtu = new_mtu; in sky2_change_mtu()
2391 imask = sky2_read32(hw, B0_IMSK); in sky2_change_mtu()
2392 sky2_write32(hw, B0_IMSK, 0); in sky2_change_mtu()
2393 sky2_read32(hw, B0_IMSK); in sky2_change_mtu()
2396 napi_disable(&hw->napi); in sky2_change_mtu()
2399 synchronize_irq(hw->pdev->irq); in sky2_change_mtu()
2401 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) in sky2_change_mtu()
2402 sky2_set_tx_stfwd(hw, port); in sky2_change_mtu()
2404 ctl = gma_read16(hw, port, GM_GP_CTRL); in sky2_change_mtu()
2405 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); in sky2_change_mtu()
2409 dev->mtu = new_mtu; in sky2_change_mtu()
2413 if (sky2->speed > SPEED_100) in sky2_change_mtu()
2418 if (dev->mtu > ETH_DATA_LEN) in sky2_change_mtu()
2421 gma_write16(hw, port, GM_SERIAL_MODE, mode); in sky2_change_mtu()
2423 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); in sky2_change_mtu()
2430 sky2_write32(hw, B0_IMSK, imask); in sky2_change_mtu()
2432 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_change_mtu()
2433 napi_enable(&hw->napi); in sky2_change_mtu()
2438 gma_write16(hw, port, GM_GP_CTRL, ctl); in sky2_change_mtu()
2451 if (!IS_ALIGNED(re->data_addr + ETH_HLEN, sizeof(u32))) in needs_copy()
2464 skb = netdev_alloc_skb_ip_align(sky2->netdev, length); in receive_copy()
2466 dma_sync_single_for_cpu(&sky2->hw->pdev->dev, re->data_addr, in receive_copy()
2468 skb_copy_from_linear_data(re->skb, skb->data, length); in receive_copy()
2469 skb->ip_summed = re->skb->ip_summed; in receive_copy()
2470 skb->csum = re->skb->csum; in receive_copy()
2471 skb_copy_hash(skb, re->skb); in receive_copy()
2472 __vlan_hwaccel_copy_tag(skb, re->skb); in receive_copy()
2474 dma_sync_single_for_device(&sky2->hw->pdev->dev, in receive_copy()
2475 re->data_addr, length, in receive_copy()
2477 __vlan_hwaccel_clear_tag(re->skb); in receive_copy()
2478 skb_clear_hash(re->skb); in receive_copy()
2479 re->skb->ip_summed = CHECKSUM_NONE; in receive_copy()
2494 skb->tail += size; in skb_put_frags()
2495 skb->len += size; in skb_put_frags()
2496 length -= size; in skb_put_frags()
2498 num_frags = skb_shinfo(skb)->nr_frags; in skb_put_frags()
2500 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in skb_put_frags()
2505 --skb_shinfo(skb)->nr_frags; in skb_put_frags()
2510 skb->data_len += size; in skb_put_frags()
2511 skb->truesize += PAGE_SIZE; in skb_put_frags()
2512 skb->len += size; in skb_put_frags()
2513 length -= size; in skb_put_frags()
2518 /* Normal packet - take skb from ring element and put in a new one */
2525 unsigned hdr_space = sky2->rx_data_size; in receive_new()
2531 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space)) in receive_new()
2534 skb = re->skb; in receive_new()
2535 sky2_rx_unmap_skb(sky2->hw->pdev, re); in receive_new()
2536 prefetch(skb->data); in receive_new()
2539 if (skb_shinfo(skb)->nr_frags) in receive_new()
2559 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next; in sky2_receive()
2565 sky2->rx_next, status, length); in sky2_receive()
2567 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending; in sky2_receive()
2568 prefetch(sky2->rx_ring + sky2->rx_next); in sky2_receive()
2570 if (skb_vlan_tag_present(re->skb)) in sky2_receive()
2571 count -= VLAN_HLEN; /* Account for vlan tag */ in sky2_receive()
2577 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_receive()
2578 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 && in sky2_receive()
2598 dev->stats.rx_dropped += (skb == NULL); in sky2_receive()
2606 ++dev->stats.rx_errors; in sky2_receive()
2632 if (skb->ip_summed == CHECKSUM_NONE) in sky2_skb_rx()
2635 napi_gro_receive(&sky2->hw->napi, skb); in sky2_skb_rx()
2638 static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port, in sky2_rx_done() argument
2641 struct net_device *dev = hw->dev[port]; in sky2_rx_done()
2647 u64_stats_update_begin(&sky2->rx_stats.syncp); in sky2_rx_done()
2648 sky2->rx_stats.packets += packets; in sky2_rx_done()
2649 sky2->rx_stats.bytes += bytes; in sky2_rx_done()
2650 u64_stats_update_end(&sky2->rx_stats.syncp); in sky2_rx_done()
2652 sky2->last_rx = jiffies; in sky2_rx_done()
2659 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE); in sky2_rx_checksum()
2667 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb; in sky2_rx_checksum()
2668 skb->ip_summed = CHECKSUM_COMPLETE; in sky2_rx_checksum()
2669 skb->csum = le16_to_cpu(status); in sky2_rx_checksum()
2671 dev_notice(&sky2->hw->pdev->dev, in sky2_rx_checksum()
2673 sky2->netdev->name, status); in sky2_rx_checksum()
2679 sky2->netdev->features &= ~NETIF_F_RXCSUM; in sky2_rx_checksum()
2680 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in sky2_rx_checksum()
2689 skb = sky2->rx_ring[sky2->rx_next].skb; in sky2_rx_tag()
2697 skb = sky2->rx_ring[sky2->rx_next].skb; in sky2_rx_hash()
2702 static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) in sky2_status_intr() argument
2714 struct sky2_status_le *le = hw->st_le + hw->st_idx; in sky2_status_intr()
2720 u8 opcode = le->opcode; in sky2_status_intr()
2725 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size); in sky2_status_intr()
2727 port = le->css & CSS_LINK_BIT; in sky2_status_intr()
2728 dev = hw->dev[port]; in sky2_status_intr()
2730 length = le16_to_cpu(le->length); in sky2_status_intr()
2731 status = le32_to_cpu(le->status); in sky2_status_intr()
2733 le->opcode = 0; in sky2_status_intr()
2744 if (hw->flags & SKY2_HW_NEW_LE) { in sky2_status_intr()
2745 if ((dev->features & NETIF_F_RXCSUM) && in sky2_status_intr()
2746 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) && in sky2_status_intr()
2747 (le->css & CSS_TCPUDPCSOK)) in sky2_status_intr()
2748 skb->ip_summed = CHECKSUM_UNNECESSARY; in sky2_status_intr()
2750 skb->ip_summed = CHECKSUM_NONE; in sky2_status_intr()
2753 skb->protocol = eth_type_trans(skb, dev); in sky2_status_intr()
2769 if (likely(dev->features & NETIF_F_RXCSUM)) in sky2_status_intr()
2779 sky2_tx_done(hw->dev[0], status & 0xfff); in sky2_status_intr()
2780 if (hw->dev[1]) in sky2_status_intr()
2781 sky2_tx_done(hw->dev[1], in sky2_status_intr()
2790 } while (hw->st_idx != idx); in sky2_status_intr()
2793 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); in sky2_status_intr()
2796 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]); in sky2_status_intr()
2797 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]); in sky2_status_intr()
2802 static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status) in sky2_hw_error() argument
2804 struct net_device *dev = hw->dev[port]; in sky2_hw_error()
2807 netdev_info(dev, "hw error interrupt status 0x%x\n", status); in sky2_hw_error()
2813 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); in sky2_hw_error()
2820 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); in sky2_hw_error()
2826 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); in sky2_hw_error()
2832 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); in sky2_hw_error()
2838 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); in sky2_hw_error()
2842 static void sky2_hw_intr(struct sky2_hw *hw) in sky2_hw_intr() argument
2844 struct pci_dev *pdev = hw->pdev; in sky2_hw_intr()
2845 u32 status = sky2_read32(hw, B0_HWE_ISRC); in sky2_hw_intr()
2846 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); in sky2_hw_intr()
2851 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2856 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_hw_intr()
2857 pci_err = sky2_pci_read16(hw, PCI_STATUS); in sky2_hw_intr()
2859 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", in sky2_hw_intr()
2862 sky2_pci_write16(hw, PCI_STATUS, in sky2_hw_intr()
2864 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_hw_intr()
2868 /* PCI-Express uncorrectable Error occurred */ in sky2_hw_intr()
2871 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_hw_intr()
2872 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); in sky2_hw_intr()
2873 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, in sky2_hw_intr()
2876 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err); in sky2_hw_intr()
2878 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); in sky2_hw_intr()
2879 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_hw_intr()
2883 sky2_hw_error(hw, 0, status); in sky2_hw_intr()
2886 sky2_hw_error(hw, 1, status); in sky2_hw_intr()
2889 static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) in sky2_mac_intr() argument
2891 struct net_device *dev = hw->dev[port]; in sky2_mac_intr()
2893 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_intr()
2898 gma_read16(hw, port, GM_RX_IRQ_SRC); in sky2_mac_intr()
2901 gma_read16(hw, port, GM_TX_IRQ_SRC); in sky2_mac_intr()
2904 ++dev->stats.rx_fifo_errors; in sky2_mac_intr()
2905 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); in sky2_mac_intr()
2909 ++dev->stats.tx_fifo_errors; in sky2_mac_intr()
2910 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); in sky2_mac_intr()
2915 static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q) in sky2_le_error() argument
2917 struct net_device *dev = hw->dev[port]; in sky2_le_error()
2918 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); in sky2_le_error()
2920 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n", in sky2_le_error()
2921 dev->name, (unsigned) q, (unsigned) idx, in sky2_le_error()
2922 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX))); in sky2_le_error()
2924 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK); in sky2_le_error()
2930 struct sky2_hw *hw = sky2->hw; in sky2_rx_hung() local
2931 unsigned port = sky2->port; in sky2_rx_hung()
2933 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP)); in sky2_rx_hung()
2934 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV)); in sky2_rx_hung()
2935 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP)); in sky2_rx_hung()
2936 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL)); in sky2_rx_hung()
2939 if (sky2->check.last == sky2->last_rx && in sky2_rx_hung()
2940 ((mac_rp == sky2->check.mac_rp && in sky2_rx_hung()
2941 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) || in sky2_rx_hung()
2943 (fifo_rp == sky2->check.fifo_rp && in sky2_rx_hung()
2944 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) { in sky2_rx_hung()
2948 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP))); in sky2_rx_hung()
2951 sky2->check.last = sky2->last_rx; in sky2_rx_hung()
2952 sky2->check.mac_rp = mac_rp; in sky2_rx_hung()
2953 sky2->check.mac_lev = mac_lev; in sky2_rx_hung()
2954 sky2->check.fifo_rp = fifo_rp; in sky2_rx_hung()
2955 sky2->check.fifo_lev = fifo_lev; in sky2_rx_hung()
2962 struct sky2_hw *hw = from_timer(hw, t, watchdog_timer); in sky2_watchdog() local
2965 if (sky2_read32(hw, B0_ISRC)) { in sky2_watchdog()
2966 napi_schedule(&hw->napi); in sky2_watchdog()
2970 for (i = 0; i < hw->ports; i++) { in sky2_watchdog()
2971 struct net_device *dev = hw->dev[i]; in sky2_watchdog()
2977 if ((hw->flags & SKY2_HW_RAM_BUFFER) && in sky2_watchdog()
2980 schedule_work(&hw->restart_work); in sky2_watchdog()
2989 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ)); in sky2_watchdog()
2993 static void sky2_err_intr(struct sky2_hw *hw, u32 status) in sky2_err_intr() argument
2996 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status); in sky2_err_intr()
2999 sky2_hw_intr(hw); in sky2_err_intr()
3002 sky2_mac_intr(hw, 0); in sky2_err_intr()
3005 sky2_mac_intr(hw, 1); in sky2_err_intr()
3008 sky2_le_error(hw, 0, Q_R1); in sky2_err_intr()
3011 sky2_le_error(hw, 1, Q_R2); in sky2_err_intr()
3014 sky2_le_error(hw, 0, Q_XA1); in sky2_err_intr()
3017 sky2_le_error(hw, 1, Q_XA2); in sky2_err_intr()
3022 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi); in sky2_poll() local
3023 u32 status = sky2_read32(hw, B0_Y2_SP_EISR); in sky2_poll()
3028 sky2_err_intr(hw, status); in sky2_poll()
3031 sky2_phy_intr(hw, 0); in sky2_poll()
3034 sky2_phy_intr(hw, 1); in sky2_poll()
3037 sky2_qlink_intr(hw); in sky2_poll()
3039 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) { in sky2_poll()
3040 work_done += sky2_status_intr(hw, work_limit - work_done, idx); in sky2_poll()
3047 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_poll()
3055 struct sky2_hw *hw = dev_id; in sky2_intr() local
3059 status = sky2_read32(hw, B0_Y2_SP_ISRC2); in sky2_intr()
3061 sky2_write32(hw, B0_Y2_SP_ICR, 2); in sky2_intr()
3065 prefetch(&hw->st_le[hw->st_idx]); in sky2_intr()
3067 napi_schedule(&hw->napi); in sky2_intr()
3077 napi_schedule(&sky2->hw->napi); in sky2_netpoll()
3082 static u32 sky2_mhz(const struct sky2_hw *hw) in sky2_mhz() argument
3084 switch (hw->chip_id) { in sky2_mhz()
3109 static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us) in sky2_us2clk() argument
3111 return sky2_mhz(hw) * us; in sky2_us2clk()
3114 static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) in sky2_clk2us() argument
3116 return clk / sky2_mhz(hw); in sky2_clk2us()
3120 static int sky2_init(struct sky2_hw *hw) in sky2_init() argument
3125 sky2_pci_write32(hw, PCI_DEV_REG3, 0); in sky2_init()
3127 sky2_write8(hw, B0_CTST, CS_RST_CLR); in sky2_init()
3129 hw->chip_id = sky2_read8(hw, B2_CHIP_ID); in sky2_init()
3130 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4; in sky2_init()
3132 switch (hw->chip_id) { in sky2_init()
3134 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY; in sky2_init()
3135 if (hw->chip_rev < CHIP_REV_YU_XL_A2) in sky2_init()
3136 hw->flags |= SKY2_HW_RSS_BROKEN; in sky2_init()
3140 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3146 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3153 if (hw->chip_rev != CHIP_REV_YU_EX_B0) in sky2_init()
3154 hw->flags |= SKY2_HW_AUTO_TX_SUM; in sky2_init()
3159 if (hw->chip_rev == CHIP_REV_YU_EC_A1) { in sky2_init()
3160 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n"); in sky2_init()
3161 return -EOPNOTSUPP; in sky2_init()
3163 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN; in sky2_init()
3167 hw->flags = SKY2_HW_RSS_BROKEN; in sky2_init()
3171 hw->flags = SKY2_HW_NEWER_PHY in sky2_init()
3177 if (hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_init()
3178 hw->flags |= SKY2_HW_VLAN_BROKEN | SKY2_HW_RSS_CHKSUM; in sky2_init()
3182 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3188 if (hw->chip_rev == CHIP_REV_YU_SU_A0) in sky2_init()
3189 hw->flags |= SKY2_HW_RSS_CHKSUM; in sky2_init()
3193 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3200 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3206 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n", in sky2_init()
3207 hw->chip_id); in sky2_init()
3208 return -EOPNOTSUPP; in sky2_init()
3211 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); in sky2_init()
3212 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P') in sky2_init()
3213 hw->flags |= SKY2_HW_FIBRE_PHY; in sky2_init()
3215 hw->ports = 1; in sky2_init()
3216 t8 = sky2_read8(hw, B2_Y2_HW_RES); in sky2_init()
3218 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC)) in sky2_init()
3219 ++hw->ports; in sky2_init()
3222 if (sky2_read8(hw, B2_E_0)) in sky2_init()
3223 hw->flags |= SKY2_HW_RAM_BUFFER; in sky2_init()
3228 static void sky2_reset(struct sky2_hw *hw) in sky2_reset() argument
3230 struct pci_dev *pdev = hw->pdev; in sky2_reset()
3236 if (hw->chip_id == CHIP_ID_YUKON_EX in sky2_reset()
3237 || hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_reset()
3238 sky2_write32(hw, CPU_WDOG, 0); in sky2_reset()
3239 status = sky2_read16(hw, HCU_CCSR); in sky2_reset()
3244 * - ASF firmware may malfunction in sky2_reset()
3245 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks in sky2_reset()
3248 sky2_write16(hw, HCU_CCSR, status); in sky2_reset()
3249 sky2_write32(hw, CPU_WDOG, 0); in sky2_reset()
3251 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); in sky2_reset()
3252 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); in sky2_reset()
3255 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_reset()
3256 sky2_write8(hw, B0_CTST, CS_RST_CLR); in sky2_reset()
3259 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_reset()
3262 status = sky2_pci_read16(hw, PCI_STATUS); in sky2_reset()
3264 sky2_pci_write16(hw, PCI_STATUS, status); in sky2_reset()
3266 sky2_write8(hw, B0_CTST, CS_MRST_CLR); in sky2_reset()
3269 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, in sky2_reset()
3273 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP) in sky2_reset()
3274 dev_info(&pdev->dev, "ignoring stuck error report bit\n"); in sky2_reset()
3279 sky2_power_on(hw); in sky2_reset()
3280 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_reset()
3282 for (i = 0; i < hw->ports; i++) { in sky2_reset()
3283 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); in sky2_reset()
3284 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_reset()
3286 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_reset()
3287 hw->chip_id == CHIP_ID_YUKON_SUPR) in sky2_reset()
3288 sky2_write16(hw, SK_REG(i, GMAC_CTRL), in sky2_reset()
3294 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) { in sky2_reset()
3296 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS); in sky2_reset()
3299 if (hw->chip_id == CHIP_ID_YUKON_OPT || in sky2_reset()
3300 hw->chip_id == CHIP_ID_YUKON_PRM || in sky2_reset()
3301 hw->chip_id == CHIP_ID_YUKON_OP_2) { in sky2_reset()
3304 if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { in sky2_reset()
3305 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */ in sky2_reset()
3306 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7)); in sky2_reset()
3311 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ in sky2_reset()
3312 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); in sky2_reset()
3322 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_reset()
3323 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); in sky2_reset()
3326 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3); in sky2_reset()
3329 sky2_pci_write16(hw, pdev->pcie_cap + PCI_EXP_LNKCTL, in sky2_reset()
3332 if (hw->chip_id == CHIP_ID_YUKON_PRM && in sky2_reset()
3333 hw->chip_rev == CHIP_REV_YU_PRM_A0) { in sky2_reset()
3335 reg = sky2_read16(hw, GPHY_CTRL); in sky2_reset()
3336 sky2_write16(hw, GPHY_CTRL, reg | GPC_INTPOL); in sky2_reset()
3338 /* adapt HW for low active PHY Interrupt */ in sky2_reset()
3339 reg = sky2_read16(hw, Y2_CFG_SPC + PCI_LDO_CTRL); in sky2_reset()
3340 sky2_write16(hw, Y2_CFG_SPC + PCI_LDO_CTRL, reg | PHY_M_UNDOC1); in sky2_reset()
3343 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_reset()
3345 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ in sky2_reset()
3346 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); in sky2_reset()
3350 sky2_write32(hw, B2_I2C_IRQ, 1); in sky2_reset()
3353 sky2_write8(hw, B2_TI_CTRL, TIM_STOP); in sky2_reset()
3354 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ); in sky2_reset()
3357 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP); in sky2_reset()
3360 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
3361 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
3364 for (i = 0; i < hw->ports; i++) in sky2_reset()
3365 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB); in sky2_reset()
3368 for (i = 0; i < hw->ports; i++) { in sky2_reset()
3369 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR); in sky2_reset()
3371 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53); in sky2_reset()
3372 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53); in sky2_reset()
3373 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53); in sky2_reset()
3374 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53); in sky2_reset()
3375 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53); in sky2_reset()
3376 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53); in sky2_reset()
3377 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53); in sky2_reset()
3378 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53); in sky2_reset()
3379 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53); in sky2_reset()
3380 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53); in sky2_reset()
3381 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53); in sky2_reset()
3382 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); in sky2_reset()
3385 sky2_write32(hw, B0_HWE_IMSK, hwe_mask); in sky2_reset()
3387 for (i = 0; i < hw->ports; i++) in sky2_reset()
3388 sky2_gmac_reset(hw, i); in sky2_reset()
3390 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le)); in sky2_reset()
3391 hw->st_idx = 0; in sky2_reset()
3393 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET); in sky2_reset()
3394 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR); in sky2_reset()
3396 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma); in sky2_reset()
3397 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32); in sky2_reset()
3400 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1); in sky2_reset()
3402 sky2_write16(hw, STAT_TX_IDX_TH, 10); in sky2_reset()
3403 sky2_write8(hw, STAT_FIFO_WM, 16); in sky2_reset()
3405 /* set Status-FIFO ISR watermark */ in sky2_reset()
3406 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0) in sky2_reset()
3407 sky2_write8(hw, STAT_FIFO_ISR_WM, 4); in sky2_reset()
3409 sky2_write8(hw, STAT_FIFO_ISR_WM, 16); in sky2_reset()
3411 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); in sky2_reset()
3412 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20)); in sky2_reset()
3413 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100)); in sky2_reset()
3416 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON); in sky2_reset()
3418 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); in sky2_reset()
3419 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); in sky2_reset()
3420 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); in sky2_reset()
3456 static void sky2_all_down(struct sky2_hw *hw) in sky2_all_down() argument
3460 if (hw->flags & SKY2_HW_IRQ_SETUP) { in sky2_all_down()
3461 sky2_write32(hw, B0_IMSK, 0); in sky2_all_down()
3462 sky2_read32(hw, B0_IMSK); in sky2_all_down()
3464 synchronize_irq(hw->pdev->irq); in sky2_all_down()
3465 napi_disable(&hw->napi); in sky2_all_down()
3468 for (i = 0; i < hw->ports; i++) { in sky2_all_down()
3469 struct net_device *dev = hw->dev[i]; in sky2_all_down()
3481 static void sky2_all_up(struct sky2_hw *hw) in sky2_all_up() argument
3486 for (i = 0; i < hw->ports; i++) { in sky2_all_up()
3487 struct net_device *dev = hw->dev[i]; in sky2_all_up()
3499 if (hw->flags & SKY2_HW_IRQ_SETUP) { in sky2_all_up()
3500 sky2_write32(hw, B0_IMSK, imask); in sky2_all_up()
3501 sky2_read32(hw, B0_IMSK); in sky2_all_up()
3502 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_all_up()
3503 napi_enable(&hw->napi); in sky2_all_up()
3509 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work); in sky2_restart() local
3513 sky2_all_down(hw); in sky2_restart()
3514 sky2_reset(hw); in sky2_restart()
3515 sky2_all_up(hw); in sky2_restart()
3520 static inline u8 sky2_wol_supported(const struct sky2_hw *hw) in sky2_wol_supported() argument
3522 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0; in sky2_wol_supported()
3529 wol->supported = sky2_wol_supported(sky2->hw); in sky2_get_wol()
3530 wol->wolopts = sky2->wol; in sky2_get_wol()
3536 struct sky2_hw *hw = sky2->hw; in sky2_set_wol() local
3540 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) || in sky2_set_wol()
3541 !device_can_wakeup(&hw->pdev->dev)) in sky2_set_wol()
3542 return -EOPNOTSUPP; in sky2_set_wol()
3544 sky2->wol = wol->wolopts; in sky2_set_wol()
3546 for (i = 0; i < hw->ports; i++) { in sky2_set_wol()
3547 struct net_device *dev = hw->dev[i]; in sky2_set_wol()
3550 if (sky2->wol) in sky2_set_wol()
3553 device_set_wakeup_enable(&hw->pdev->dev, enable_wakeup); in sky2_set_wol()
3558 static u32 sky2_supported_modes(const struct sky2_hw *hw) in sky2_supported_modes() argument
3560 if (sky2_is_copper(hw)) { in sky2_supported_modes()
3566 if (hw->flags & SKY2_HW_GIGABIT) in sky2_supported_modes()
3579 struct sky2_hw *hw = sky2->hw; in sky2_get_link_ksettings() local
3582 supported = sky2_supported_modes(hw); in sky2_get_link_ksettings()
3583 cmd->base.phy_address = PHY_ADDR_MARV; in sky2_get_link_ksettings()
3584 if (sky2_is_copper(hw)) { in sky2_get_link_ksettings()
3585 cmd->base.port = PORT_TP; in sky2_get_link_ksettings()
3586 cmd->base.speed = sky2->speed; in sky2_get_link_ksettings()
3589 cmd->base.speed = SPEED_1000; in sky2_get_link_ksettings()
3590 cmd->base.port = PORT_FIBRE; in sky2_get_link_ksettings()
3594 advertising = sky2->advertising; in sky2_get_link_ksettings()
3595 cmd->base.autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED) in sky2_get_link_ksettings()
3597 cmd->base.duplex = sky2->duplex; in sky2_get_link_ksettings()
3599 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, in sky2_get_link_ksettings()
3601 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, in sky2_get_link_ksettings()
3611 const struct sky2_hw *hw = sky2->hw; in sky2_set_link_ksettings() local
3612 u32 supported = sky2_supported_modes(hw); in sky2_set_link_ksettings()
3616 cmd->link_modes.advertising); in sky2_set_link_ksettings()
3618 if (cmd->base.autoneg == AUTONEG_ENABLE) { in sky2_set_link_ksettings()
3620 return -EINVAL; in sky2_set_link_ksettings()
3622 if (sky2_is_copper(hw)) in sky2_set_link_ksettings()
3623 sky2->advertising = new_advertising | in sky2_set_link_ksettings()
3627 sky2->advertising = new_advertising | in sky2_set_link_ksettings()
3631 sky2->flags |= SKY2_FLAG_AUTO_SPEED; in sky2_set_link_ksettings()
3632 sky2->duplex = -1; in sky2_set_link_ksettings()
3633 sky2->speed = -1; in sky2_set_link_ksettings()
3636 u32 speed = cmd->base.speed; in sky2_set_link_ksettings()
3640 if (cmd->base.duplex == DUPLEX_FULL) in sky2_set_link_ksettings()
3642 else if (cmd->base.duplex == DUPLEX_HALF) in sky2_set_link_ksettings()
3645 return -EINVAL; in sky2_set_link_ksettings()
3648 if (cmd->base.duplex == DUPLEX_FULL) in sky2_set_link_ksettings()
3650 else if (cmd->base.duplex == DUPLEX_HALF) in sky2_set_link_ksettings()
3653 return -EINVAL; in sky2_set_link_ksettings()
3657 if (cmd->base.duplex == DUPLEX_FULL) in sky2_set_link_ksettings()
3659 else if (cmd->base.duplex == DUPLEX_HALF) in sky2_set_link_ksettings()
3662 return -EINVAL; in sky2_set_link_ksettings()
3665 return -EINVAL; in sky2_set_link_ksettings()
3669 return -EINVAL; in sky2_set_link_ksettings()
3671 sky2->speed = speed; in sky2_set_link_ksettings()
3672 sky2->duplex = cmd->base.duplex; in sky2_set_link_ksettings()
3673 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED; in sky2_set_link_ksettings()
3689 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in sky2_get_drvinfo()
3690 strscpy(info->version, DRV_VERSION, sizeof(info->version)); in sky2_get_drvinfo()
3691 strscpy(info->bus_info, pci_name(sky2->hw->pdev), in sky2_get_drvinfo()
3692 sizeof(info->bus_info)); in sky2_get_drvinfo()
3742 return sky2->msg_enable; in sky2_get_msglevel()
3749 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED)) in sky2_nway_reset()
3750 return -EINVAL; in sky2_nway_reset()
3760 struct sky2_hw *hw = sky2->hw; in sky2_phy_stats() local
3761 unsigned port = sky2->port; in sky2_phy_stats()
3764 data[0] = get_stats64(hw, port, GM_TXO_OK_LO); in sky2_phy_stats()
3765 data[1] = get_stats64(hw, port, GM_RXO_OK_LO); in sky2_phy_stats()
3768 data[i] = get_stats32(hw, port, sky2_stats[i].offset); in sky2_phy_stats()
3774 sky2->msg_enable = value; in sky2_set_msglevel()
3783 return -EOPNOTSUPP; in sky2_get_sset_count()
3811 struct sky2_hw *hw = sky2->hw; in sky2_set_mac_address() local
3812 unsigned port = sky2->port; in sky2_set_mac_address()
3815 if (!is_valid_ether_addr(addr->sa_data)) in sky2_set_mac_address()
3816 return -EADDRNOTAVAIL; in sky2_set_mac_address()
3818 eth_hw_addr_set(dev, addr->sa_data); in sky2_set_mac_address()
3819 memcpy_toio(hw->regs + B2_MAC_1 + port * 8, in sky2_set_mac_address()
3820 dev->dev_addr, ETH_ALEN); in sky2_set_mac_address()
3821 memcpy_toio(hw->regs + B2_MAC_2 + port * 8, in sky2_set_mac_address()
3822 dev->dev_addr, ETH_ALEN); in sky2_set_mac_address()
3825 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); in sky2_set_mac_address()
3828 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); in sky2_set_mac_address()
3844 struct sky2_hw *hw = sky2->hw; in sky2_set_multicast() local
3845 unsigned port = sky2->port; in sky2_set_multicast()
3852 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH); in sky2_set_multicast()
3855 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_set_multicast()
3858 if (dev->flags & IFF_PROMISC) /* promiscuous */ in sky2_set_multicast()
3860 else if (dev->flags & IFF_ALLMULTI) in sky2_set_multicast()
3871 sky2_add_filter(filter, ha->addr); in sky2_set_multicast()
3874 gma_write16(hw, port, GM_MC_ADDR_H1, in sky2_set_multicast()
3876 gma_write16(hw, port, GM_MC_ADDR_H2, in sky2_set_multicast()
3878 gma_write16(hw, port, GM_MC_ADDR_H3, in sky2_set_multicast()
3880 gma_write16(hw, port, GM_MC_ADDR_H4, in sky2_set_multicast()
3883 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_set_multicast()
3890 struct sky2_hw *hw = sky2->hw; in sky2_get_stats() local
3891 unsigned port = sky2->port; in sky2_get_stats()
3896 start = u64_stats_fetch_begin(&sky2->rx_stats.syncp); in sky2_get_stats()
3897 _bytes = sky2->rx_stats.bytes; in sky2_get_stats()
3898 _packets = sky2->rx_stats.packets; in sky2_get_stats()
3899 } while (u64_stats_fetch_retry(&sky2->rx_stats.syncp, start)); in sky2_get_stats()
3901 stats->rx_packets = _packets; in sky2_get_stats()
3902 stats->rx_bytes = _bytes; in sky2_get_stats()
3905 start = u64_stats_fetch_begin(&sky2->tx_stats.syncp); in sky2_get_stats()
3906 _bytes = sky2->tx_stats.bytes; in sky2_get_stats()
3907 _packets = sky2->tx_stats.packets; in sky2_get_stats()
3908 } while (u64_stats_fetch_retry(&sky2->tx_stats.syncp, start)); in sky2_get_stats()
3910 stats->tx_packets = _packets; in sky2_get_stats()
3911 stats->tx_bytes = _bytes; in sky2_get_stats()
3913 stats->multicast = get_stats32(hw, port, GM_RXF_MC_OK) in sky2_get_stats()
3914 + get_stats32(hw, port, GM_RXF_BC_OK); in sky2_get_stats()
3916 stats->collisions = get_stats32(hw, port, GM_TXF_COL); in sky2_get_stats()
3918 stats->rx_length_errors = get_stats32(hw, port, GM_RXF_LNG_ERR); in sky2_get_stats()
3919 stats->rx_crc_errors = get_stats32(hw, port, GM_RXF_FCS_ERR); in sky2_get_stats()
3920 stats->rx_frame_errors = get_stats32(hw, port, GM_RXF_SHT) in sky2_get_stats()
3921 + get_stats32(hw, port, GM_RXE_FRAG); in sky2_get_stats()
3922 stats->rx_over_errors = get_stats32(hw, port, GM_RXE_FIFO_OV); in sky2_get_stats()
3924 stats->rx_dropped = dev->stats.rx_dropped; in sky2_get_stats()
3925 stats->rx_fifo_errors = dev->stats.rx_fifo_errors; in sky2_get_stats()
3926 stats->tx_fifo_errors = dev->stats.tx_fifo_errors; in sky2_get_stats()
3934 struct sky2_hw *hw = sky2->hw; in sky2_led() local
3935 unsigned port = sky2->port; in sky2_led()
3937 spin_lock_bh(&sky2->phy_lock); in sky2_led()
3938 if (hw->chip_id == CHIP_ID_YUKON_EC_U || in sky2_led()
3939 hw->chip_id == CHIP_ID_YUKON_EX || in sky2_led()
3940 hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_led()
3942 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_led()
3943 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_led()
3947 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3954 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3961 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3968 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3975 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_led()
3977 gm_phy_write(hw, port, PHY_MARV_LED_OVER, in sky2_led()
3985 spin_unlock_bh(&sky2->phy_lock); in sky2_led()
4016 switch (sky2->flow_mode) { in sky2_get_pauseparam()
4018 ecmd->tx_pause = ecmd->rx_pause = 0; in sky2_get_pauseparam()
4021 ecmd->tx_pause = 1, ecmd->rx_pause = 0; in sky2_get_pauseparam()
4024 ecmd->tx_pause = 0, ecmd->rx_pause = 1; in sky2_get_pauseparam()
4027 ecmd->tx_pause = ecmd->rx_pause = 1; in sky2_get_pauseparam()
4030 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE) in sky2_get_pauseparam()
4039 if (ecmd->autoneg == AUTONEG_ENABLE) in sky2_set_pauseparam()
4040 sky2->flags |= SKY2_FLAG_AUTO_PAUSE; in sky2_set_pauseparam()
4042 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE; in sky2_set_pauseparam()
4044 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause); in sky2_set_pauseparam()
4058 struct sky2_hw *hw = sky2->hw; in sky2_get_coalesce() local
4060 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4061 ecmd->tx_coalesce_usecs = 0; in sky2_get_coalesce()
4063 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI); in sky2_get_coalesce()
4064 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4066 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH); in sky2_get_coalesce()
4068 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4069 ecmd->rx_coalesce_usecs = 0; in sky2_get_coalesce()
4071 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI); in sky2_get_coalesce()
4072 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4074 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM); in sky2_get_coalesce()
4076 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4077 ecmd->rx_coalesce_usecs_irq = 0; in sky2_get_coalesce()
4079 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI); in sky2_get_coalesce()
4080 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4083 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM); in sky2_get_coalesce()
4095 struct sky2_hw *hw = sky2->hw; in sky2_set_coalesce() local
4096 const u32 tmax = sky2_clk2us(hw, 0x0ffffff); in sky2_set_coalesce()
4098 if (ecmd->tx_coalesce_usecs > tmax || in sky2_set_coalesce()
4099 ecmd->rx_coalesce_usecs > tmax || in sky2_set_coalesce()
4100 ecmd->rx_coalesce_usecs_irq > tmax) in sky2_set_coalesce()
4101 return -EINVAL; in sky2_set_coalesce()
4103 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1) in sky2_set_coalesce()
4104 return -EINVAL; in sky2_set_coalesce()
4105 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING) in sky2_set_coalesce()
4106 return -EINVAL; in sky2_set_coalesce()
4107 if (ecmd->rx_max_coalesced_frames_irq > RX_MAX_PENDING) in sky2_set_coalesce()
4108 return -EINVAL; in sky2_set_coalesce()
4110 if (ecmd->tx_coalesce_usecs == 0) in sky2_set_coalesce()
4111 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4113 sky2_write32(hw, STAT_TX_TIMER_INI, in sky2_set_coalesce()
4114 sky2_us2clk(hw, ecmd->tx_coalesce_usecs)); in sky2_set_coalesce()
4115 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4117 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames); in sky2_set_coalesce()
4119 if (ecmd->rx_coalesce_usecs == 0) in sky2_set_coalesce()
4120 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4122 sky2_write32(hw, STAT_LEV_TIMER_INI, in sky2_set_coalesce()
4123 sky2_us2clk(hw, ecmd->rx_coalesce_usecs)); in sky2_set_coalesce()
4124 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4126 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames); in sky2_set_coalesce()
4128 if (ecmd->rx_coalesce_usecs_irq == 0) in sky2_set_coalesce()
4129 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4131 sky2_write32(hw, STAT_ISR_TIMER_INI, in sky2_set_coalesce()
4132 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq)); in sky2_set_coalesce()
4133 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4135 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq); in sky2_set_coalesce()
4156 ering->rx_max_pending = RX_MAX_PENDING; in sky2_get_ringparam()
4157 ering->tx_max_pending = TX_MAX_PENDING; in sky2_get_ringparam()
4159 ering->rx_pending = sky2->rx_pending; in sky2_get_ringparam()
4160 ering->tx_pending = sky2->tx_pending; in sky2_get_ringparam()
4170 if (ering->rx_pending > RX_MAX_PENDING || in sky2_set_ringparam()
4171 ering->rx_pending < 8 || in sky2_set_ringparam()
4172 ering->tx_pending < TX_MIN_PENDING || in sky2_set_ringparam()
4173 ering->tx_pending > TX_MAX_PENDING) in sky2_set_ringparam()
4174 return -EINVAL; in sky2_set_ringparam()
4178 sky2->rx_pending = ering->rx_pending; in sky2_set_ringparam()
4179 sky2->tx_pending = ering->tx_pending; in sky2_set_ringparam()
4180 sky2->tx_ring_size = roundup_ring_size(sky2->tx_pending); in sky2_set_ringparam()
4190 static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b) in sky2_reg_access_ok() argument
4209 return hw->ports > 1; in sky2_reg_access_ok()
4242 const void __iomem *io = sky2->hw->regs; in sky2_get_regs()
4245 regs->version = 1; in sky2_get_regs()
4250 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10); in sky2_get_regs()
4251 else if (sky2_reg_access_ok(sky2->hw, b)) in sky2_get_regs()
4264 struct sky2_hw *hw = sky2->hw; in sky2_get_eeprom_len() local
4267 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2); in sky2_get_eeprom_len()
4277 eeprom->magic = SKY2_EEPROM_MAGIC; in sky2_get_eeprom()
4278 rc = pci_read_vpd_any(sky2->hw->pdev, eeprom->offset, eeprom->len, in sky2_get_eeprom()
4283 eeprom->len = rc; in sky2_get_eeprom()
4294 if (eeprom->magic != SKY2_EEPROM_MAGIC) in sky2_set_eeprom()
4295 return -EINVAL; in sky2_set_eeprom()
4297 rc = pci_write_vpd_any(sky2->hw->pdev, eeprom->offset, eeprom->len, in sky2_set_eeprom()
4307 const struct sky2_hw *hw = sky2->hw; in sky2_fix_features() local
4312 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_fix_features()
4320 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) { in sky2_fix_features()
4331 netdev_features_t changed = dev->features ^ features; in sky2_set_features()
4334 !(sky2->hw->flags & SKY2_HW_NEW_LE)) { in sky2_set_features()
4335 sky2_write32(sky2->hw, in sky2_set_features()
4336 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in sky2_set_features()
4387 struct net_device *dev = seq->private; in sky2_debug_show()
4389 struct sky2_hw *hw = sky2->hw; in sky2_debug_show() local
4390 unsigned port = sky2->port; in sky2_debug_show()
4395 sky2_read32(hw, B0_ISRC), in sky2_debug_show()
4396 sky2_read32(hw, B0_IMSK), in sky2_debug_show()
4397 sky2_read32(hw, B0_Y2_SP_ICR)); in sky2_debug_show()
4404 napi_disable(&hw->napi); in sky2_debug_show()
4405 last = sky2_read16(hw, STAT_PUT_IDX); in sky2_debug_show()
4407 seq_printf(seq, "Status ring %u\n", hw->st_size); in sky2_debug_show()
4408 if (hw->st_idx == last) in sky2_debug_show()
4412 for (idx = hw->st_idx; idx != last && idx < hw->st_size; in sky2_debug_show()
4413 idx = RING_NEXT(idx, hw->st_size)) { in sky2_debug_show()
4414 const struct sky2_status_le *le = hw->st_le + idx; in sky2_debug_show()
4416 idx, le->opcode, le->length, le->status); in sky2_debug_show()
4422 sky2->tx_cons, sky2->tx_prod, in sky2_debug_show()
4423 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), in sky2_debug_show()
4424 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE))); in sky2_debug_show()
4428 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size; in sky2_debug_show()
4429 idx = RING_NEXT(idx, sky2->tx_ring_size)) { in sky2_debug_show()
4430 const struct sky2_tx_le *le = sky2->tx_le + idx; in sky2_debug_show()
4431 u32 a = le32_to_cpu(le->addr); in sky2_debug_show()
4437 switch (le->opcode & ~HW_OWNER) { in sky2_debug_show()
4445 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length)); in sky2_debug_show()
4451 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length)); in sky2_debug_show()
4454 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length)); in sky2_debug_show()
4457 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length)); in sky2_debug_show()
4460 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode, in sky2_debug_show()
4461 a, le16_to_cpu(le->length)); in sky2_debug_show()
4464 if (le->ctrl & EOP) { in sky2_debug_show()
4470 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n", in sky2_debug_show()
4471 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)), in sky2_debug_show()
4472 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)), in sky2_debug_show()
4473 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX))); in sky2_debug_show()
4475 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_debug_show()
4476 napi_enable(&hw->napi); in sky2_debug_show()
4491 if (dev->netdev_ops->ndo_open != sky2_open || !sky2_debug) in sky2_device_event()
4496 if (sky2->debugfs) { in sky2_device_event()
4497 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs, in sky2_device_event()
4498 sky2_debug, dev->name); in sky2_device_event()
4503 if (sky2->debugfs) { in sky2_device_event()
4505 debugfs_remove(sky2->debugfs); in sky2_device_event()
4506 sky2->debugfs = NULL; in sky2_device_event()
4511 sky2->debugfs = debugfs_create_file(dev->name, 0444, in sky2_device_event()
4514 if (IS_ERR(sky2->debugfs)) in sky2_device_event()
4515 sky2->debugfs = NULL; in sky2_device_event()
4590 static struct net_device *sky2_init_netdev(struct sky2_hw *hw, unsigned port, in sky2_init_netdev() argument
4600 SET_NETDEV_DEV(dev, &hw->pdev->dev); in sky2_init_netdev()
4601 dev->irq = hw->pdev->irq; in sky2_init_netdev()
4602 dev->ethtool_ops = &sky2_ethtool_ops; in sky2_init_netdev()
4603 dev->watchdog_timeo = TX_WATCHDOG; in sky2_init_netdev()
4604 dev->netdev_ops = &sky2_netdev_ops[port]; in sky2_init_netdev()
4607 sky2->netdev = dev; in sky2_init_netdev()
4608 sky2->hw = hw; in sky2_init_netdev()
4609 sky2->msg_enable = netif_msg_init(debug, default_msg); in sky2_init_netdev()
4611 u64_stats_init(&sky2->tx_stats.syncp); in sky2_init_netdev()
4612 u64_stats_init(&sky2->rx_stats.syncp); in sky2_init_netdev()
4614 /* Auto speed and flow control */ in sky2_init_netdev()
4615 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE; in sky2_init_netdev()
4616 if (hw->chip_id != CHIP_ID_YUKON_XL) in sky2_init_netdev()
4617 dev->hw_features |= NETIF_F_RXCSUM; in sky2_init_netdev()
4619 sky2->flow_mode = FC_BOTH; in sky2_init_netdev()
4621 sky2->duplex = -1; in sky2_init_netdev()
4622 sky2->speed = -1; in sky2_init_netdev()
4623 sky2->advertising = sky2_supported_modes(hw); in sky2_init_netdev()
4624 sky2->wol = wol; in sky2_init_netdev()
4626 spin_lock_init(&sky2->phy_lock); in sky2_init_netdev()
4628 sky2->tx_pending = TX_DEF_PENDING; in sky2_init_netdev()
4629 sky2->tx_ring_size = roundup_ring_size(TX_DEF_PENDING); in sky2_init_netdev()
4630 sky2->rx_pending = RX_DEF_PENDING; in sky2_init_netdev()
4632 hw->dev[port] = dev; in sky2_init_netdev()
4634 sky2->port = port; in sky2_init_netdev()
4636 dev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO; in sky2_init_netdev()
4639 dev->features |= NETIF_F_HIGHDMA; in sky2_init_netdev()
4642 if (!(hw->flags & SKY2_HW_RSS_BROKEN)) in sky2_init_netdev()
4643 dev->hw_features |= NETIF_F_RXHASH; in sky2_init_netdev()
4645 if (!(hw->flags & SKY2_HW_VLAN_BROKEN)) { in sky2_init_netdev()
4646 dev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX | in sky2_init_netdev()
4648 dev->vlan_features |= SKY2_VLAN_OFFLOADS; in sky2_init_netdev()
4651 dev->features |= dev->hw_features; in sky2_init_netdev()
4653 /* MTU range: 60 - 1500 or 9000 */ in sky2_init_netdev()
4654 dev->min_mtu = ETH_ZLEN; in sky2_init_netdev()
4655 if (hw->chip_id == CHIP_ID_YUKON_FE || in sky2_init_netdev()
4656 hw->chip_id == CHIP_ID_YUKON_FE_P) in sky2_init_netdev()
4657 dev->max_mtu = ETH_DATA_LEN; in sky2_init_netdev()
4659 dev->max_mtu = ETH_JUMBO_MTU; in sky2_init_netdev()
4665 ret = of_get_ethdev_address(hw->pdev->dev.of_node, dev); in sky2_init_netdev()
4669 memcpy_fromio(addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN); in sky2_init_netdev()
4674 if (!is_valid_ether_addr(dev->dev_addr)) { in sky2_init_netdev()
4677 dev_warn(&hw->pdev->dev, "Invalid MAC address, defaulting to random\n"); in sky2_init_netdev()
4679 memcpy(sa.sa_data, dev->dev_addr, ETH_ALEN); in sky2_init_netdev()
4681 dev_warn(&hw->pdev->dev, "Failed to set MAC address.\n"); in sky2_init_netdev()
4691 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr); in sky2_show_addr()
4697 struct sky2_hw *hw = dev_id; in sky2_test_intr() local
4698 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2); in sky2_test_intr()
4704 hw->flags |= SKY2_HW_USE_MSI; in sky2_test_intr()
4705 wake_up(&hw->msi_wait); in sky2_test_intr()
4706 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); in sky2_test_intr()
4708 sky2_write32(hw, B0_Y2_SP_ICR, 2); in sky2_test_intr()
4714 static int sky2_test_msi(struct sky2_hw *hw) in sky2_test_msi() argument
4716 struct pci_dev *pdev = hw->pdev; in sky2_test_msi()
4719 init_waitqueue_head(&hw->msi_wait); in sky2_test_msi()
4721 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw); in sky2_test_msi()
4723 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq); in sky2_test_msi()
4727 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW); in sky2_test_msi()
4729 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); in sky2_test_msi()
4730 sky2_read8(hw, B0_CTST); in sky2_test_msi()
4732 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10); in sky2_test_msi()
4734 if (!(hw->flags & SKY2_HW_USE_MSI)) { in sky2_test_msi()
4736 dev_info(&pdev->dev, "No interrupt generated using MSI, " in sky2_test_msi()
4739 err = -EOPNOTSUPP; in sky2_test_msi()
4740 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); in sky2_test_msi()
4743 sky2_write32(hw, B0_IMSK, 0); in sky2_test_msi()
4744 sky2_read32(hw, B0_IMSK); in sky2_test_msi()
4746 free_irq(pdev->irq, hw); in sky2_test_msi()
4770 snprintf(buf, sz, "%s", name[chipid - CHIP_ID_YUKON_XL]); in sky2_name()
4785 .ident = "Gateway P-79",
4788 DMI_MATCH(DMI_PRODUCT_NAME, "P-79"),
4818 struct sky2_hw *hw; in sky2_probe() local
4825 dev_err(&pdev->dev, "cannot enable PCI device\n"); in sky2_probe()
4830 * Note: only regular PCI config access once to test for HW issues in sky2_probe()
4836 dev_err(&pdev->dev, "PCI read config failed\n"); in sky2_probe()
4841 dev_err(&pdev->dev, "PCI configuration read error\n"); in sky2_probe()
4842 err = -EIO; in sky2_probe()
4848 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); in sky2_probe()
4855 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { in sky2_probe()
4857 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); in sky2_probe()
4859 dev_err(&pdev->dev, "unable to obtain 64 bit DMA " in sky2_probe()
4864 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); in sky2_probe()
4866 dev_err(&pdev->dev, "no usable DMA configuration\n"); in sky2_probe()
4879 dev_err(&pdev->dev, "PCI write config failed\n"); in sky2_probe()
4884 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0; in sky2_probe()
4886 err = -ENOMEM; in sky2_probe()
4888 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:") in sky2_probe()
4890 if (!hw) in sky2_probe()
4893 hw->pdev = pdev; in sky2_probe()
4894 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev)); in sky2_probe()
4896 hw->regs = ioremap(pci_resource_start(pdev, 0), 0x4000); in sky2_probe()
4897 if (!hw->regs) { in sky2_probe()
4898 dev_err(&pdev->dev, "cannot map device registers\n"); in sky2_probe()
4902 err = sky2_init(hw); in sky2_probe()
4907 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING); in sky2_probe()
4908 hw->st_le = dma_alloc_coherent(&pdev->dev, in sky2_probe()
4909 hw->st_size * sizeof(struct sky2_status_le), in sky2_probe()
4910 &hw->st_dma, GFP_KERNEL); in sky2_probe()
4911 if (!hw->st_le) { in sky2_probe()
4912 err = -ENOMEM; in sky2_probe()
4916 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n", in sky2_probe()
4917 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev); in sky2_probe()
4919 sky2_reset(hw); in sky2_probe()
4921 dev = sky2_init_netdev(hw, 0, using_dac, wol_default); in sky2_probe()
4923 err = -ENOMEM; in sky2_probe()
4927 if (disable_msi == -1) in sky2_probe()
4931 err = sky2_test_msi(hw); in sky2_probe()
4934 if (err != -EOPNOTSUPP) in sky2_probe()
4939 netif_napi_add(dev, &hw->napi, sky2_poll); in sky2_probe()
4943 dev_err(&pdev->dev, "cannot register net device\n"); in sky2_probe()
4951 if (hw->ports > 1) { in sky2_probe()
4952 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default); in sky2_probe()
4954 err = -ENOMEM; in sky2_probe()
4960 dev_err(&pdev->dev, "cannot register second net device\n"); in sky2_probe()
4964 err = sky2_setup_irq(hw, hw->irq_name); in sky2_probe()
4971 timer_setup(&hw->watchdog_timer, sky2_watchdog, 0); in sky2_probe()
4972 INIT_WORK(&hw->restart_work, sky2_restart); in sky2_probe()
4974 pci_set_drvdata(pdev, hw); in sky2_probe()
4975 pdev->d3hot_delay = 300; in sky2_probe()
4986 if (hw->flags & SKY2_HW_USE_MSI) in sky2_probe()
4990 dma_free_coherent(&pdev->dev, in sky2_probe()
4991 hw->st_size * sizeof(struct sky2_status_le), in sky2_probe()
4992 hw->st_le, hw->st_dma); in sky2_probe()
4994 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_probe()
4996 iounmap(hw->regs); in sky2_probe()
4998 kfree(hw); in sky2_probe()
5009 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_remove() local
5012 if (!hw) in sky2_remove()
5015 timer_shutdown_sync(&hw->watchdog_timer); in sky2_remove()
5016 cancel_work_sync(&hw->restart_work); in sky2_remove()
5018 for (i = hw->ports-1; i >= 0; --i) in sky2_remove()
5019 unregister_netdev(hw->dev[i]); in sky2_remove()
5021 sky2_write32(hw, B0_IMSK, 0); in sky2_remove()
5022 sky2_read32(hw, B0_IMSK); in sky2_remove()
5024 sky2_power_aux(hw); in sky2_remove()
5026 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_remove()
5027 sky2_read8(hw, B0_CTST); in sky2_remove()
5029 if (hw->ports > 1) { in sky2_remove()
5030 napi_disable(&hw->napi); in sky2_remove()
5031 free_irq(pdev->irq, hw); in sky2_remove()
5034 if (hw->flags & SKY2_HW_USE_MSI) in sky2_remove()
5036 dma_free_coherent(&pdev->dev, in sky2_remove()
5037 hw->st_size * sizeof(struct sky2_status_le), in sky2_remove()
5038 hw->st_le, hw->st_dma); in sky2_remove()
5042 for (i = hw->ports-1; i >= 0; --i) in sky2_remove()
5043 free_netdev(hw->dev[i]); in sky2_remove()
5045 iounmap(hw->regs); in sky2_remove()
5046 kfree(hw); in sky2_remove()
5051 struct sky2_hw *hw = dev_get_drvdata(dev); in sky2_suspend() local
5054 if (!hw) in sky2_suspend()
5057 del_timer_sync(&hw->watchdog_timer); in sky2_suspend()
5058 cancel_work_sync(&hw->restart_work); in sky2_suspend()
5062 sky2_all_down(hw); in sky2_suspend()
5063 for (i = 0; i < hw->ports; i++) { in sky2_suspend()
5064 struct net_device *dev = hw->dev[i]; in sky2_suspend()
5067 if (sky2->wol) in sky2_suspend()
5071 sky2_power_aux(hw); in sky2_suspend()
5081 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_resume() local
5084 if (!hw) in sky2_resume()
5087 /* Re-enable all clocks */ in sky2_resume()
5090 dev_err(&pdev->dev, "PCI write config failed\n"); in sky2_resume()
5095 sky2_reset(hw); in sky2_resume()
5096 sky2_all_up(hw); in sky2_resume()
5102 dev_err(&pdev->dev, "resume failed (%d)\n", err); in sky2_resume()
5117 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_shutdown() local
5120 for (port = 0; port < hw->ports; port++) { in sky2_shutdown()
5121 struct net_device *ndev = hw->dev[port]; in sky2_shutdown()
5130 sky2_suspend(&pdev->dev); in sky2_shutdown()
5131 pci_wake_from_d3(pdev, device_may_wakeup(&pdev->dev)); in sky2_shutdown()
5162 MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");