Lines Matching defs:otx2_hw

203 struct otx2_hw {  struct
204 	struct pci_dev		*pdev;
205 	struct otx2_rss_info	rss_info;
206 	u16                     rx_queues;
207 	u16                     tx_queues;
208 	u16                     xdp_queues;
209 	u16			tc_tx_queues;
210 	u16                     non_qos_queues; /* tx queues plus xdp queues */
211 	u16			max_queues;
212 	u16			pool_cnt;
213 	u16			rqpool_cnt;
214 	u16			sqpool_cnt;
217 	u16			rbuf_len;
218 	u32			xqe_size;
221 	u32			stack_pg_ptrs;  /* No of ptrs per stack page */
222 	u32			stack_pg_bytes; /* Size of stack page */
223 	u16			sqb_size;
226 	u8			txschq_link_cfg_lvl;
227 	u8			txschq_aggr_lvl_rr_prio;
228 	u16			txschq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
229 	u16			matchall_ipolicer;
230 	u32			dwrr_mtu;
231 	u8			smq_link_type;
234 	u16			rx_chan_base;
235 	u16			tx_chan_base;
236 	u16			cq_qcount_wait;
237 	u16			cq_ecount_wait;
238 	u16			rq_skid;
239 	u8			cq_time_wait;
242 	u8			lso_tsov4_idx;
243 	u8			lso_tsov6_idx;
244 	u8			lso_udpv4_idx;
245 	u8			lso_udpv6_idx;
248 	u8			flowkey_alg_idx;
251 	u8			cint_cnt; /* CQ interrupt count */
252 	u16			npa_msixoff; /* Offset of NPA vectors */
253 	u16			nix_msixoff; /* Offset of NIX vectors */
254 	char			*irq_name;
255 	cpumask_var_t           *affinity_mask;
258 	struct otx2_dev_stats	dev_stats;
259 	struct otx2_drv_stats	drv_stats;
260 	u64			cgx_rx_stats[CGX_RX_STATS_COUNT];
261 	u64			cgx_tx_stats[CGX_TX_STATS_COUNT];
262 	u64			cgx_fec_corr_blks;
263 	u64			cgx_fec_uncorr_blks;
264 	u8			cgx_links;  /* No. of CGX links present in HW */
265 	u8			lbk_links;  /* No. of LBK links present in HW */
266 	u8			tx_link;    /* Transmit channel link number */
274 	unsigned long		cap_flag;
278 	u64			*lmt_base;
279 	struct otx2_lmt_info	__percpu *lmt_info;