1 /* SPDX-License-Identifier: GPL-2.0 */
269 	int	cgx_users;  /* number of cgx users - used only by PFs */
447 	u64 rclk;  member
517 	/* MSI-X */
577 	writeq(val, rvu->afreg_base + ((block << 28) | offset));  in rvu_write64()
582 	return readq(rvu->afreg_base + ((block << 28) | offset));  in rvu_read64()
587 	writeq(val, rvu->pfreg_base + offset);  in rvupf_write64()
592 	return readq(rvu->pfreg_base + offset);  in rvupf_read64()
609 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_pre_96xx_C0()
611 	return ((pdev->revision == 0x00) || (pdev->revision == 0x01) ||  in is_rvu_pre_96xx_C0()
612 		(pdev->revision == 0x10) || (pdev->revision == 0x11) ||  in is_rvu_pre_96xx_C0()
613 		(pdev->revision == 0x14));  in is_rvu_pre_96xx_C0()
618 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_96xx_A0()
620 	return (pdev->revision == 0x00);  in is_rvu_96xx_A0()
625 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_96xx_B0()
627 	return (pdev->revision == 0x00) || (pdev->revision == 0x01);  in is_rvu_96xx_B0()
632 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_95xx_A0()
634 	return (pdev->revision == 0x10) || (pdev->revision == 0x11);  in is_rvu_95xx_A0()
650 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_otx2()
652 	u8 midr = pdev->revision & 0xF0;  in is_rvu_otx2()
661 	struct pci_dev *pdev = rvu->pdev;  in is_cnf10ka_a0()
663 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_CNF10K_A &&  in is_cnf10ka_a0()
664 	    (pdev->revision & 0x0F) == 0x0)  in is_cnf10ka_a0()
685 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_nix_chan_cgx()
687 	if (!hw->cap.programmable_chans)  in rvu_nix_chan_cgx()
690 	return rvu->hw->cgx_chan_base +  in rvu_nix_chan_cgx()
691 		(cgxid * hw->lmac_per_cgx + lmacid) * cgx_chans + chan;  in rvu_nix_chan_cgx()
699 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_nix_chan_lbk()
701 	if (!hw->cap.programmable_chans)  in rvu_nix_chan_lbk()
704 	return rvu->hw->lbk_chan_base + lbkid * lbk_chans + chan;  in rvu_nix_chan_lbk()
709 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_nix_chan_sdp()
711 	if (!hw->cap.programmable_chans)  in rvu_nix_chan_sdp()
714 	return hw->sdp_chan_base + chan;  in rvu_nix_chan_sdp()
719 	return rvu->hw->cpt_chan_base + chan;  in rvu_nix_chan_cpt()
724 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_supports_nix1()
726 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_98XX)  in is_rvu_supports_nix1()
753 	return (rvu->fwdata->header_magic == RVU_FWDATA_HEADER_MAGIC) &&  in is_rvu_fwdata_valid()
754 		(rvu->fwdata->version == RVU_FWDATA_VERSION);  in is_rvu_fwdata_valid()
802 	return (pf >= PF_CGXMAP_BASE && pf <= rvu->cgx_mapped_pfs) &&  in is_pf_cgxmapped()
881 int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool en);
974 /* CN10K RVU - LMT*/