Lines Matching +full:sync +full:- +full:update +full:- +full:mask
1 /* SPDX-License-Identifier: GPL-2.0 */
88 /* Loop limit on how long we wait for auto-negotiation to complete */
170 /* 1000BASE-T Control Register */
174 /* 1000BASE-T Status Register */
194 #define IGC_EECD_FLUPD_I225 0x00800000 /* Update FLASH */
195 #define IGC_EECD_FLUDONE_I225 0x04000000 /* Update FLASH done*/
224 #define IGC_STATUS_FUNC_MASK 0x0000000C /* PCI Function Mask */
238 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */
262 #define IGC_ICR_TS BIT(19) /* Time Sync Interrupt */
277 /* Interrupt Mask Set */
281 #define IGC_IMS_DOUTSYNC IGC_ICR_DOUTSYNC /* NIC DMA out of sync */
285 #define IGC_IMS_TS IGC_ICR_TS /* Time Sync Interrupt */
287 #define IGC_QVECTOR_MASK 0x7FFC /* Q-vector mask */
288 #define IGC_ITR_VAL_MASK 0x04 /* ITR value mask */
294 #define IGC_ICR_DOUTSYNC 0x10000000 /* NIC DMA out of sync */
333 #define IGC_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
405 #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */
416 /* Time Sync Interrupt Causes */
431 /* Time Sync Receive Control bit definitions */
432 #define IGC_TSYNCRXCTL_TYPE_MASK 0x0000000E /* Rx type mask */
442 /* Time Sync Receive Configuration */
448 #define IGC_IMIR_CLEAR_MASK 0xF001FFFF /* IMIR Reg Clear Mask */
451 #define IGC_IMIREXT_CLEAR_MASK 0x7FFFF /* IMIREXT Reg Clear Mask */
457 /* Time Sync Transmit Control bit definitions */
464 #define IGC_TSYNCTXCTL_SYNC_COMP_ERR 0x20000000 /* sync err */
465 #define IGC_TSYNCTXCTL_SYNC_COMP 0x40000000 /* sync complete */
466 #define IGC_TSYNCTXCTL_START_SYNC 0x80000000 /* initiate sync */
579 #define IGC_PTM_STAT_ADJUST_CYC BIT(5) /* 1588 timer adjusted during non-1st PTM cycle */
585 /* GPY211 - I225 defines */
598 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
599 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
603 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
624 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */
625 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
638 #define IGC_N0_QUEUE -1
669 /* Minimum time for 100BASE-T where no data will be transmit following move out