Lines Matching +full:rx +full:- +full:ctrl

1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
22 u32 ctrl; in igc_reset_hw_base() local
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
43 wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); in igc_reset_hw_base()
62 * igc_init_nvm_params_base - Init NVM func ptrs.
67 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_base()
73 /* Added to a constant, "size" becomes the left-shift value in igc_init_nvm_params_base()
84 nvm->type = igc_nvm_eeprom_spi; in igc_init_nvm_params_base()
85 nvm->word_size = BIT(size); in igc_init_nvm_params_base()
86 nvm->opcode_bits = 8; in igc_init_nvm_params_base()
87 nvm->delay_usec = 1; in igc_init_nvm_params_base()
89 nvm->page_size = eecd & IGC_EECD_ADDR_BITS ? 32 : 8; in igc_init_nvm_params_base()
90 nvm->address_bits = eecd & IGC_EECD_ADDR_BITS ? in igc_init_nvm_params_base()
93 if (nvm->word_size == BIT(15)) in igc_init_nvm_params_base()
94 nvm->page_size = 128; in igc_init_nvm_params_base()
100 * igc_setup_copper_link_base - Configure copper link settings
103 * Configures the link for auto-neg or forced speed and duplex. Then we check
110 u32 ctrl; in igc_setup_copper_link_base() local
112 ctrl = rd32(IGC_CTRL); in igc_setup_copper_link_base()
113 ctrl |= IGC_CTRL_SLU; in igc_setup_copper_link_base()
114 ctrl &= ~(IGC_CTRL_FRCSPD | IGC_CTRL_FRCDPX); in igc_setup_copper_link_base()
115 wr32(IGC_CTRL, ctrl); in igc_setup_copper_link_base()
123 * igc_init_mac_params_base - Init MAC func ptrs.
128 struct igc_dev_spec_base *dev_spec = &hw->dev_spec._base; in igc_init_mac_params_base()
129 struct igc_mac_info *mac = &hw->mac; in igc_init_mac_params_base()
132 mac->mta_reg_count = 128; in igc_init_mac_params_base()
133 mac->rar_entry_count = IGC_RAR_ENTRIES; in igc_init_mac_params_base()
136 mac->ops.reset_hw = igc_reset_hw_base; in igc_init_mac_params_base()
138 mac->ops.acquire_swfw_sync = igc_acquire_swfw_sync_i225; in igc_init_mac_params_base()
139 mac->ops.release_swfw_sync = igc_release_swfw_sync_i225; in igc_init_mac_params_base()
142 if (mac->type == igc_i225) in igc_init_mac_params_base()
143 dev_spec->clear_semaphore_once = true; in igc_init_mac_params_base()
146 mac->ops.setup_physical_interface = igc_setup_copper_link_base; in igc_init_mac_params_base()
152 * igc_init_phy_params_base - Init PHY func ptrs.
157 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_params_base()
160 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500; in igc_init_phy_params_base()
161 phy->reset_delay_us = 100; in igc_init_phy_params_base()
164 hw->bus.func = FIELD_GET(IGC_STATUS_FUNC_MASK, rd32(IGC_STATUS)); in igc_init_phy_params_base()
171 ret_val = hw->phy.ops.reset(hw); in igc_init_phy_params_base()
189 struct igc_mac_info *mac = &hw->mac; in igc_get_invariants_base()
192 switch (hw->device_id) { in igc_get_invariants_base()
209 mac->type = igc_i225; in igc_get_invariants_base()
212 return -IGC_ERR_MAC_INIT; in igc_get_invariants_base()
215 hw->phy.media_type = igc_media_type_copper; in igc_get_invariants_base()
224 switch (hw->mac.type) { in igc_get_invariants_base()
242 * igc_acquire_phy_base - Acquire rights to access PHY
252 return hw->mac.ops.acquire_swfw_sync(hw, mask); in igc_acquire_phy_base()
256 * igc_release_phy_base - Release rights to access PHY
266 hw->mac.ops.release_swfw_sync(hw, mask); in igc_release_phy_base()
270 * igc_init_hw_base - Initialize hardware
277 struct igc_mac_info *mac = &hw->mac; in igc_init_hw_base()
278 u16 i, rar_count = mac->rar_entry_count; in igc_init_hw_base()
286 for (i = 0; i < mac->mta_reg_count; i++) in igc_init_hw_base()
291 for (i = 0; i < mac->uta_reg_count; i++) in igc_init_hw_base()
308 * igc_power_down_phy_copper_base - Remove link during PHY power down
322 * igc_rx_fifo_flush_base - Clean rx fifo after Rx enable
325 * After Rx enable, if manageability is enabled then there is likely some
327 * function clears the fifos and flushes any packets that came in as rx was
343 /* Disable all Rx queues */ in igc_rx_fifo_flush_base()
380 /* Enable Rx queues that were previously enabled and restore our in igc_rx_fifo_flush_base()
399 switch (hw->device_id) { in igc_is_device_id_i225()
415 switch (hw->device_id) { in igc_is_device_id_i226()