Lines Matching +full:hw +full:- +full:device +full:- +full:address
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
14 static s32 igb_update_flash_i210(struct e1000_hw *hw);
17 * igb_get_hw_semaphore_i210 - Acquire hardware semaphore
18 * @hw: pointer to the HW structure
20 * Acquire the HW semaphore to access the PHY or NVM
22 static s32 igb_get_hw_semaphore_i210(struct e1000_hw *hw) in igb_get_hw_semaphore_i210() argument
25 s32 timeout = hw->nvm.word_size + 1; in igb_get_hw_semaphore_i210()
42 if (hw->dev_spec._82575.clear_semaphore_once) { in igb_get_hw_semaphore_i210()
43 hw->dev_spec._82575.clear_semaphore_once = false; in igb_get_hw_semaphore_i210()
44 igb_put_hw_semaphore(hw); in igb_get_hw_semaphore_i210()
56 hw_dbg("Driver can't access device - SMBI bit is set.\n"); in igb_get_hw_semaphore_i210()
57 return -E1000_ERR_NVM; in igb_get_hw_semaphore_i210()
75 igb_put_hw_semaphore(hw); in igb_get_hw_semaphore_i210()
77 return -E1000_ERR_NVM; in igb_get_hw_semaphore_i210()
84 * igb_acquire_nvm_i210 - Request for access to EEPROM
85 * @hw: pointer to the HW structure
90 * EEPROM access and return -E1000_ERR_NVM (-1).
92 static s32 igb_acquire_nvm_i210(struct e1000_hw *hw) in igb_acquire_nvm_i210() argument
94 return igb_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM); in igb_acquire_nvm_i210()
98 * igb_release_nvm_i210 - Release exclusive access to EEPROM
99 * @hw: pointer to the HW structure
104 static void igb_release_nvm_i210(struct e1000_hw *hw) in igb_release_nvm_i210() argument
106 igb_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM); in igb_release_nvm_i210()
110 * igb_acquire_swfw_sync_i210 - Acquire SW/FW semaphore
111 * @hw: pointer to the HW structure
117 s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask) in igb_acquire_swfw_sync_i210() argument
126 if (igb_get_hw_semaphore_i210(hw)) { in igb_acquire_swfw_sync_i210()
127 ret_val = -E1000_ERR_SWFW_SYNC; in igb_acquire_swfw_sync_i210()
136 igb_put_hw_semaphore(hw); in igb_acquire_swfw_sync_i210()
143 ret_val = -E1000_ERR_SWFW_SYNC; in igb_acquire_swfw_sync_i210()
150 igb_put_hw_semaphore(hw); in igb_acquire_swfw_sync_i210()
156 * igb_release_swfw_sync_i210 - Release SW/FW semaphore
157 * @hw: pointer to the HW structure
163 void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask) in igb_release_swfw_sync_i210() argument
167 while (igb_get_hw_semaphore_i210(hw)) in igb_release_swfw_sync_i210()
174 igb_put_hw_semaphore(hw); in igb_release_swfw_sync_i210()
178 * igb_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register
179 * @hw: pointer to the HW structure
187 static s32 igb_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words, in igb_read_nvm_srrd_i210() argument
198 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ? in igb_read_nvm_srrd_i210()
199 E1000_EERD_EEWR_MAX_COUNT : (words - i); in igb_read_nvm_srrd_i210()
200 if (!(hw->nvm.ops.acquire(hw))) { in igb_read_nvm_srrd_i210()
201 status = igb_read_nvm_eerd(hw, offset, count, in igb_read_nvm_srrd_i210()
203 hw->nvm.ops.release(hw); in igb_read_nvm_srrd_i210()
216 * igb_write_nvm_srwr - Write to Shadow Ram using EEWR
217 * @hw: pointer to the HW structure
227 static s32 igb_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words, in igb_write_nvm_srwr() argument
230 struct e1000_nvm_info *nvm = &hw->nvm; in igb_write_nvm_srwr()
238 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || in igb_write_nvm_srwr()
241 ret_val = -E1000_ERR_NVM; in igb_write_nvm_srwr()
272 * igb_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
273 * @hw: pointer to the HW structure
284 * If error code is returned, data and Shadow RAM may be inconsistent - buffer
287 static s32 igb_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words, in igb_write_nvm_srwr_i210() argument
298 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ? in igb_write_nvm_srwr_i210()
299 E1000_EERD_EEWR_MAX_COUNT : (words - i); in igb_write_nvm_srwr_i210()
300 if (!(hw->nvm.ops.acquire(hw))) { in igb_write_nvm_srwr_i210()
301 status = igb_write_nvm_srwr(hw, offset, count, in igb_write_nvm_srwr_i210()
303 hw->nvm.ops.release(hw); in igb_write_nvm_srwr_i210()
316 * igb_read_invm_word_i210 - Reads OTP
317 * @hw: pointer to the HW structure
318 * @address: the word address (aka eeprom offset) to read
321 * Reads 16-bit words from the OTP. Return error when the word is not
324 static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data) in igb_read_invm_word_i210() argument
326 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND; in igb_read_invm_word_i210()
343 if (word_address == address) { in igb_read_invm_word_i210()
346 address, *data); in igb_read_invm_word_i210()
353 hw_dbg("Requested word 0x%02x not found in OTP\n", address); in igb_read_invm_word_i210()
358 * igb_read_invm_i210 - Read invm wrapper function for I210/I211
359 * @hw: pointer to the HW structure
366 static s32 igb_read_invm_i210(struct e1000_hw *hw, u16 offset, in igb_read_invm_i210() argument
374 ret_val = igb_read_invm_word_i210(hw, (u8)offset, &data[0]); in igb_read_invm_i210()
375 ret_val |= igb_read_invm_word_i210(hw, (u8)offset+1, in igb_read_invm_i210()
377 ret_val |= igb_read_invm_word_i210(hw, (u8)offset+2, in igb_read_invm_i210()
383 ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); in igb_read_invm_i210()
390 ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); in igb_read_invm_i210()
397 ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); in igb_read_invm_i210()
404 ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); in igb_read_invm_i210()
411 ret_val = igb_read_invm_word_i210(hw, (u8)offset, data); in igb_read_invm_i210()
418 *data = hw->subsystem_device_id; in igb_read_invm_i210()
421 *data = hw->subsystem_vendor_id; in igb_read_invm_i210()
424 *data = hw->device_id; in igb_read_invm_i210()
427 *data = hw->vendor_id; in igb_read_invm_i210()
438 * igb_read_invm_version - Reads iNVM version and image type
439 * @hw: pointer to the HW structure
444 s32 igb_read_invm_version(struct e1000_hw *hw, in igb_read_invm_version() argument
450 u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE / in igb_read_invm_version()
453 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND; in igb_read_invm_version()
464 record = &buffer[invm_blocks - i]; in igb_read_invm_version()
465 next_record = &buffer[invm_blocks - i + 1]; in igb_read_invm_version()
503 invm_ver->invm_major = FIELD_GET(E1000_INVM_MAJOR_MASK, in igb_read_invm_version()
505 invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK; in igb_read_invm_version()
509 record = &buffer[invm_blocks - i]; in igb_read_invm_version()
510 next_record = &buffer[invm_blocks - i + 1]; in igb_read_invm_version()
514 invm_ver->invm_img_type = 0; in igb_read_invm_version()
522 invm_ver->invm_img_type = in igb_read_invm_version()
533 * igb_validate_nvm_checksum_i210 - Validate EEPROM checksum
534 * @hw: pointer to the HW structure
539 static s32 igb_validate_nvm_checksum_i210(struct e1000_hw *hw) in igb_validate_nvm_checksum_i210() argument
544 if (!(hw->nvm.ops.acquire(hw))) { in igb_validate_nvm_checksum_i210()
550 read_op_ptr = hw->nvm.ops.read; in igb_validate_nvm_checksum_i210()
551 hw->nvm.ops.read = igb_read_nvm_eerd; in igb_validate_nvm_checksum_i210()
553 status = igb_validate_nvm_checksum(hw); in igb_validate_nvm_checksum_i210()
556 hw->nvm.ops.read = read_op_ptr; in igb_validate_nvm_checksum_i210()
558 hw->nvm.ops.release(hw); in igb_validate_nvm_checksum_i210()
567 * igb_update_nvm_checksum_i210 - Update EEPROM checksum
568 * @hw: pointer to the HW structure
574 static s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw) in igb_update_nvm_checksum_i210() argument
584 ret_val = igb_read_nvm_eerd(hw, 0, 1, &nvm_data); in igb_update_nvm_checksum_i210()
590 if (!(hw->nvm.ops.acquire(hw))) { in igb_update_nvm_checksum_i210()
591 /* Do not use hw->nvm.ops.write, hw->nvm.ops.read in igb_update_nvm_checksum_i210()
597 ret_val = igb_read_nvm_eerd(hw, i, 1, &nvm_data); in igb_update_nvm_checksum_i210()
599 hw->nvm.ops.release(hw); in igb_update_nvm_checksum_i210()
605 checksum = (u16) NVM_SUM - checksum; in igb_update_nvm_checksum_i210()
606 ret_val = igb_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1, in igb_update_nvm_checksum_i210()
609 hw->nvm.ops.release(hw); in igb_update_nvm_checksum_i210()
614 hw->nvm.ops.release(hw); in igb_update_nvm_checksum_i210()
616 ret_val = igb_update_flash_i210(hw); in igb_update_nvm_checksum_i210()
618 ret_val = -E1000_ERR_SWFW_SYNC; in igb_update_nvm_checksum_i210()
625 * igb_pool_flash_update_done_i210 - Pool FLUDONE status.
626 * @hw: pointer to the HW structure
629 static s32 igb_pool_flash_update_done_i210(struct e1000_hw *hw) in igb_pool_flash_update_done_i210() argument
631 s32 ret_val = -E1000_ERR_NVM; in igb_pool_flash_update_done_i210()
647 * igb_get_flash_presence_i210 - Check if flash device is detected.
648 * @hw: pointer to the HW structure
651 bool igb_get_flash_presence_i210(struct e1000_hw *hw) in igb_get_flash_presence_i210() argument
664 * igb_update_flash_i210 - Commit EEPROM to the flash
665 * @hw: pointer to the HW structure
668 static s32 igb_update_flash_i210(struct e1000_hw *hw) in igb_update_flash_i210() argument
673 ret_val = igb_pool_flash_update_done_i210(hw); in igb_update_flash_i210()
674 if (ret_val == -E1000_ERR_NVM) { in igb_update_flash_i210()
682 ret_val = igb_pool_flash_update_done_i210(hw); in igb_update_flash_i210()
693 * igb_valid_led_default_i210 - Verify a valid default LED config
694 * @hw: pointer to the HW structure
700 s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data) in igb_valid_led_default_i210() argument
704 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in igb_valid_led_default_i210()
711 switch (hw->phy.media_type) { in igb_valid_led_default_i210()
726 * __igb_access_xmdio_reg - Read/write XMDIO register
727 * @hw: pointer to the HW structure
728 * @address: XMDIO address to program
729 * @dev_addr: device address to program
730 * @data: pointer to value to read/write from/to the XMDIO address
733 static s32 __igb_access_xmdio_reg(struct e1000_hw *hw, u16 address, in __igb_access_xmdio_reg() argument
738 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr); in __igb_access_xmdio_reg()
742 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address); in __igb_access_xmdio_reg()
746 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA | in __igb_access_xmdio_reg()
752 ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data); in __igb_access_xmdio_reg()
754 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data); in __igb_access_xmdio_reg()
758 /* Recalibrate the device back to 0 */ in __igb_access_xmdio_reg()
759 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0); in __igb_access_xmdio_reg()
767 * igb_read_xmdio_reg - Read XMDIO register
768 * @hw: pointer to the HW structure
769 * @addr: XMDIO address to program
770 * @dev_addr: device address to program
771 * @data: value to be read from the EMI address
773 s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data) in igb_read_xmdio_reg() argument
775 return __igb_access_xmdio_reg(hw, addr, dev_addr, data, true); in igb_read_xmdio_reg()
779 * igb_write_xmdio_reg - Write XMDIO register
780 * @hw: pointer to the HW structure
781 * @addr: XMDIO address to program
782 * @dev_addr: device address to program
783 * @data: value to be written to the XMDIO address
785 s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data) in igb_write_xmdio_reg() argument
787 return __igb_access_xmdio_reg(hw, addr, dev_addr, &data, false); in igb_write_xmdio_reg()
791 * igb_init_nvm_params_i210 - Init NVM func ptrs.
792 * @hw: pointer to the HW structure
794 s32 igb_init_nvm_params_i210(struct e1000_hw *hw) in igb_init_nvm_params_i210() argument
796 struct e1000_nvm_info *nvm = &hw->nvm; in igb_init_nvm_params_i210()
798 nvm->ops.acquire = igb_acquire_nvm_i210; in igb_init_nvm_params_i210()
799 nvm->ops.release = igb_release_nvm_i210; in igb_init_nvm_params_i210()
800 nvm->ops.valid_led_default = igb_valid_led_default_i210; in igb_init_nvm_params_i210()
803 if (igb_get_flash_presence_i210(hw)) { in igb_init_nvm_params_i210()
804 hw->nvm.type = e1000_nvm_flash_hw; in igb_init_nvm_params_i210()
805 nvm->ops.read = igb_read_nvm_srrd_i210; in igb_init_nvm_params_i210()
806 nvm->ops.write = igb_write_nvm_srwr_i210; in igb_init_nvm_params_i210()
807 nvm->ops.validate = igb_validate_nvm_checksum_i210; in igb_init_nvm_params_i210()
808 nvm->ops.update = igb_update_nvm_checksum_i210; in igb_init_nvm_params_i210()
810 hw->nvm.type = e1000_nvm_invm; in igb_init_nvm_params_i210()
811 nvm->ops.read = igb_read_invm_i210; in igb_init_nvm_params_i210()
812 nvm->ops.write = NULL; in igb_init_nvm_params_i210()
813 nvm->ops.validate = NULL; in igb_init_nvm_params_i210()
814 nvm->ops.update = NULL; in igb_init_nvm_params_i210()
821 * @hw: pointer to the HW structure
826 s32 igb_pll_workaround_i210(struct e1000_hw *hw) in igb_pll_workaround_i210() argument
840 ret_val = igb_read_invm_word_i210(hw, E1000_INVM_AUTOLOAD, in igb_pll_workaround_i210()
845 igb_write_phy_reg_82580(hw, I347AT4_PAGE_SELECT, E1000_PHY_PLL_FREQ_PAGE); in igb_pll_workaround_i210()
849 igb_read_phy_reg_82580(hw, E1000_PHY_PLL_FREQ_REG, &phy_word); in igb_pll_workaround_i210()
855 ret_val = -E1000_ERR_PHY; in igb_pll_workaround_i210()
869 igb_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word); in igb_pll_workaround_i210()
871 igb_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word); in igb_pll_workaround_i210()
874 igb_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word); in igb_pll_workaround_i210()
881 igb_write_phy_reg_82580(hw, I347AT4_PAGE_SELECT, 0); in igb_pll_workaround_i210()
888 * igb_get_cfg_done_i210 - Read config done bit
889 * @hw: pointer to the HW structure
892 * completion status. NOTE: silicon which is EEPROM-less will fail trying
894 * 0. If we were to return with error, EEPROM-less silicon
897 s32 igb_get_cfg_done_i210(struct e1000_hw *hw) in igb_get_cfg_done_i210() argument
906 timeout--; in igb_get_cfg_done_i210()