Lines Matching +full:0 +full:x05000000

8 #define PF_QRX_BASE			0x00000000
9 #define PF_QRX_TAIL(_QRX) (PF_QRX_BASE + (((_QRX) * 0x1000)))
10 #define PF_QRX_BUFFQ_BASE 0x03000000
11 #define PF_QRX_BUFFQ_TAIL(_QRX) (PF_QRX_BUFFQ_BASE + (((_QRX) * 0x1000)))
14 #define PF_QTX_BASE 0x05000000
15 #define PF_QTX_COMM_DBELL(_DBQM) (PF_QTX_BASE + ((_DBQM) * 0x1000))
18 #define PF_FW_BASE 0x08400000
21 #define PF_FW_ARQBAH (PF_FW_BASE + 0x4)
22 #define PF_FW_ARQLEN (PF_FW_BASE + 0x8)
23 #define PF_FW_ARQLEN_ARQLEN_S 0
24 #define PF_FW_ARQLEN_ARQLEN_M GENMASK(12, 0)
33 #define PF_FW_ARQH (PF_FW_BASE + 0xC)
34 #define PF_FW_ARQH_ARQH_S 0
35 #define PF_FW_ARQH_ARQH_M GENMASK(12, 0)
36 #define PF_FW_ARQT (PF_FW_BASE + 0x10)
38 #define PF_FW_ATQBAL (PF_FW_BASE + 0x14)
39 #define PF_FW_ATQBAH (PF_FW_BASE + 0x18)
40 #define PF_FW_ATQLEN (PF_FW_BASE + 0x1C)
41 #define PF_FW_ATQLEN_ATQLEN_S 0
42 #define PF_FW_ATQLEN_ATQLEN_M GENMASK(9, 0)
51 #define PF_FW_ATQH (PF_FW_BASE + 0x20)
52 #define PF_FW_ATQH_ATQH_S 0
53 #define PF_FW_ATQH_ATQH_M GENMASK(9, 0)
54 #define PF_FW_ATQT (PF_FW_BASE + 0x24)
57 #define PF_GLINT_BASE 0x08900000
58 #define PF_GLINT_DYN_CTL(_INT) (PF_GLINT_BASE + ((_INT) * 0x1000))
59 #define PF_GLINT_DYN_CTL_INTENA_S 0
82 /* For PF, itrn_indx_spacing is 4 and itrn_reg_spacing is 0x1000 */
84 (PF_GLINT_BASE + (((_ITR) + 1) * 4) + ((_INT) * 0x1000))
86 #define PF_GLINT_ITR_INTERVAL_S 0
87 #define PF_GLINT_ITR_INTERVAL_M GENMASK(11, 0)
90 #define PF_INT_DIR_OICR_ENA 0x08406000
91 #define PF_INT_DIR_OICR_ENA_S 0
92 #define PF_INT_DIR_OICR_ENA_M GENMASK(31, 0)
93 #define PF_INT_DIR_OICR 0x08406004
94 #define PF_INT_DIR_OICR_TSYN_EVNT 0
97 #define PF_INT_DIR_OICR_CAUSE 0x08406008
98 #define PF_INT_DIR_OICR_CAUSE_CAUSE_S 0
99 #define PF_INT_DIR_OICR_CAUSE_CAUSE_M GENMASK(31, 0)
100 #define PF_INT_PBA_CLEAR 0x0840600C
102 #define PF_FUNC_RID 0x08406010
103 #define PF_FUNC_RID_FUNCTION_NUMBER_S 0
104 #define PF_FUNC_RID_FUNCTION_NUMBER_M GENMASK(2, 0)
111 #define PFGEN_RTRIG 0x08407000
112 #define PFGEN_RTRIG_CORER_S 0
113 #define PFGEN_RTRIG_CORER_M BIT(0)
118 #define PFGEN_RSTAT 0x08407008 /* PFR Status */
119 #define PFGEN_RSTAT_PFR_STATE_S 0
120 #define PFGEN_RSTAT_PFR_STATE_M GENMASK(1, 0)
121 #define PFGEN_CTRL 0x0840700C
122 #define PFGEN_CTRL_PFSWR BIT(0)