ethernet/cortina/gemini.h

1 /* SPDX-License-Identifier: GPL-2.0 */
5  * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
6  * Copyright (C) 2010 Michał Mirosław <mirq-linux@rere.qmqm.pl>
49  *		GMAC 0/1 SW TX Q0-5, and GMAC 0/1 HW TX Q0-5
58 #define __RWPTR_PREV(x, mask)		(((unsigned int)(x) - 1) & (mask))
59 #define __RWPTR_DISTANCE(r, w, mask)	(((unsigned int)(w) - (r)) & (mask))
60 #define __RWPTR_MASK(order)		((1 << (order)) - 1)
145 /* GMAC Hash/Rx/Tx AHB Weighting register */
274 #define TOE_QH_FULL_INT_BIT(x)		BIT(x - 32)
321 		/*  7:0 Software Free Queue Empty Threshold */
323 		/* 15:8 Hardware Free Queue Empty Threshold */
359 		/* bit 30 Tx DMA Enable */
366 /* GMAC Tx Weighting Control Register 0
373 		/* bit 5:0 HW TX Queue 3 */
375 		/* bit 11:6 HW TX Queue 2 */
377 		/* bit 17:12 HW TX Queue 1 */
379 		/* bit 23:18 HW TX Queue 0 */
386 /* GMAC Tx Weighting Control Register 1
393 		/* bit 4:0 SW TX Queue 0 */
395 		/* bit 9:5 SW TX Queue 1 */
397 		/* bit 14:10 SW TX Queue 2 */
399 		/* bit 19:15 SW TX Queue 3 */
401 		/* bit 24:20 SW TX Queue 4 */
403 		/* bit 29:25 SW TX Queue 5 */
410 /* GMAC DMA Tx Description Word 0 Register
421 		/* bit 22 Tx Status, 1: Successful 0: Failed */
423 		/* bit 28:23 Tx Status, Reserved bits */
434 /* GMAC DMA Tx Description Word 1 Register
441 		/* bit 15: 0 Tx Frame Byte Count */
447 		/* bit 18 IPV6 Tx Enable */
457 		/* bit 31:23 Tx Flag, Reserved */
474 /* GMAC DMA Tx Description Word 2 Register
483 /* GMAC DMA Tx Description Word 3 Register
490 		/* bit 12: 0 Tx Frame Byte Count */
507 /* GMAC Tx Descriptor */
682 		/* 19:15 Rx Data Pre Request FIFO Threshold */
684 		/* 24:20 DMA TqCtrl to Start tqDV FIFO Threshold */
731 		/* 4-7: adjust IFG from 96+/-56 */
733 		/* 8-10 maximum receive frame length allowed */
735 		/* 11: disable back-off function */
743 		/* 15: TX flow control enable */
745 		/* 16: RGMII in-band status enable */
803 		/* Flow control set threshold */
805 		/* Flow control release threshold */
823 		/* Flow control set threshold */
825 		/* Flow control release threshold */
837 		/* Flow control set threshold */
839 		/* Flow control release threshold */
853 		/* Link speed(00->2.5M 01->25M 10->125M) */
875  *	(2) Non-TOE Queue Header
880  *		     0x60003000 +---------------------------+ 0x0000
883  *				+---------------------------+ 0x0020
886  *				+---------------------------+ 0x0040
889  *				+---------------------------+
892  *		     0x60002000 +---------------------------+ 0x0000
895  *				+---------------------------+ 0x0008
898  *				+---------------------------+ 0x0010
901  *				+---------------------------+
904  *				+---------------------------+ (n * 8 + 0x10)
907  *				+---------------------------+ (13 * 8 + 0x10)
910  *				+---------------------------+ 0x80
913  *				+---------------------------+
916  *				+---------------------------+
919  *				+---------------------------+
922  *				+---------------------------+
952 /* Non-TOE Queue Header */