Lines Matching +full:layers +full:- +full:configurable
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
25 #include <linux/dma-mapping.h>
40 #include <linux/firmware/xlnx-zynqmp.h>
57 * (bp)->rx_ring_size)
63 * (bp)->tx_ring_size)
66 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
77 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
94 * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
133 switch (bp->hw_dma_cap) { in macb_dma_desc_get_size()
158 switch (bp->hw_dma_cap) { in macb_adj_dma_desc_idx()
184 return index & (bp->tx_ring_size - 1); in macb_tx_ring_wrap()
190 index = macb_tx_ring_wrap(queue->bp, index); in macb_tx_desc()
191 index = macb_adj_dma_desc_idx(queue->bp, index); in macb_tx_desc()
192 return &queue->tx_ring[index]; in macb_tx_desc()
198 return &queue->tx_skb[macb_tx_ring_wrap(queue->bp, index)]; in macb_tx_skb()
205 offset = macb_tx_ring_wrap(queue->bp, index) * in macb_tx_dma()
206 macb_dma_desc_get_size(queue->bp); in macb_tx_dma()
208 return queue->tx_ring_dma + offset; in macb_tx_dma()
213 return index & (bp->rx_ring_size - 1); in macb_rx_ring_wrap()
218 index = macb_rx_ring_wrap(queue->bp, index); in macb_rx_desc()
219 index = macb_adj_dma_desc_idx(queue->bp, index); in macb_rx_desc()
220 return &queue->rx_ring[index]; in macb_rx_desc()
225 return queue->rx_buffers + queue->bp->rx_buffer_size * in macb_rx_buffer()
226 macb_rx_ring_wrap(queue->bp, index); in macb_rx_buffer()
232 return __raw_readl(bp->regs + offset); in hw_readl_native()
237 __raw_writel(value, bp->regs + offset); in hw_writel_native()
242 return readl_relaxed(bp->regs + offset); in hw_readl()
247 writel_relaxed(value, bp->regs + offset); in hw_writel()
284 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); in macb_set_hwaddr()
286 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); in macb_set_hwaddr()
323 eth_hw_addr_set(bp->dev, addr); in macb_get_hwaddr()
328 dev_info(&bp->pdev->dev, "invalid hw address, using random\n"); in macb_get_hwaddr()
329 eth_hw_addr_random(bp->dev); in macb_get_hwaddr()
342 struct macb *bp = bus->priv; in macb_mdio_read_c22()
345 status = pm_runtime_resume_and_get(&bp->pdev->dev); in macb_mdio_read_c22()
366 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_read_c22()
367 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_read_c22()
375 struct macb *bp = bus->priv; in macb_mdio_read_c45()
378 status = pm_runtime_get_sync(&bp->pdev->dev); in macb_mdio_read_c45()
380 pm_runtime_put_noidle(&bp->pdev->dev); in macb_mdio_read_c45()
412 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_read_c45()
413 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_read_c45()
421 struct macb *bp = bus->priv; in macb_mdio_write_c22()
424 status = pm_runtime_resume_and_get(&bp->pdev->dev); in macb_mdio_write_c22()
444 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_write_c22()
445 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_write_c22()
454 struct macb *bp = bus->priv; in macb_mdio_write_c45()
457 status = pm_runtime_get_sync(&bp->pdev->dev); in macb_mdio_write_c45()
459 pm_runtime_put_noidle(&bp->pdev->dev); in macb_mdio_write_c45()
490 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_write_c45()
491 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_write_c45()
501 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_init_buffers()
502 queue_writel(queue, RBQP, lower_32_bits(queue->rx_ring_dma)); in macb_init_buffers()
504 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_init_buffers()
506 upper_32_bits(queue->rx_ring_dma)); in macb_init_buffers()
508 queue_writel(queue, TBQP, lower_32_bits(queue->tx_ring_dma)); in macb_init_buffers()
510 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_init_buffers()
512 upper_32_bits(queue->tx_ring_dma)); in macb_init_buffers()
518 * macb_set_tx_clk() - Set a clock to a new frequency
526 if (!bp->tx_clk || (bp->caps & MACB_CAPS_CLK_HW_CHG)) in macb_set_tx_clk()
530 if (bp->phy_interface == PHY_INTERFACE_MODE_MII) in macb_set_tx_clk()
547 rate_rounded = clk_round_rate(bp->tx_clk, rate); in macb_set_tx_clk()
554 ferr = abs(rate_rounded - rate); in macb_set_tx_clk()
557 netdev_warn(bp->dev, in macb_set_tx_clk()
561 if (clk_set_rate(bp->tx_clk, rate_rounded)) in macb_set_tx_clk()
562 netdev_err(bp->dev, "adjusting tx_clk failed.\n"); in macb_set_tx_clk()
586 state->speed = SPEED_10000; in macb_usx_pcs_get_state()
587 state->duplex = 1; in macb_usx_pcs_get_state()
588 state->an_complete = 1; in macb_usx_pcs_get_state()
591 state->link = !!(val & GEM_BIT(USX_BLOCK_LOCK)); in macb_usx_pcs_get_state()
594 state->pause = MLO_PAUSE_RX; in macb_usx_pcs_get_state()
614 state->link = 0; in macb_pcs_get_state()
646 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_config()
652 spin_lock_irqsave(&bp->lock, flags); in macb_mac_config()
657 if (bp->caps & MACB_CAPS_MACB_IS_EMAC) { in macb_mac_config()
658 if (state->interface == PHY_INTERFACE_MODE_RMII) in macb_mac_config()
664 if (state->interface == PHY_INTERFACE_MODE_SGMII) { in macb_mac_config()
666 } else if (state->interface == PHY_INTERFACE_MODE_10GBASER) { in macb_mac_config()
669 } else if (bp->caps & MACB_CAPS_MIIONRGMII && in macb_mac_config()
670 bp->phy_interface == PHY_INTERFACE_MODE_MII) { in macb_mac_config()
686 if (macb_is_gem(bp) && state->interface == PHY_INTERFACE_MODE_SGMII) { in macb_mac_config()
698 spin_unlock_irqrestore(&bp->lock, flags); in macb_mac_config()
704 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_link_down()
710 if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) in macb_mac_link_down()
711 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_mac_link_down()
713 bp->rx_intr_mask | MACB_TX_INT_FLAGS | MACB_BIT(HRESP)); in macb_mac_link_down()
728 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_link_up()
735 spin_lock_irqsave(&bp->lock, flags); in macb_mac_link_up()
747 if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) { in macb_mac_link_up()
762 bp->macbgem_ops.mog_init_rings(bp); in macb_mac_link_up()
765 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_mac_link_up()
767 bp->rx_intr_mask | MACB_TX_INT_FLAGS | MACB_BIT(HRESP)); in macb_mac_link_up()
772 if (bp->phy_interface == PHY_INTERFACE_MODE_10GBASER) in macb_mac_link_up()
776 spin_unlock_irqrestore(&bp->lock, flags); in macb_mac_link_up()
778 if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) in macb_mac_link_up()
794 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_select_pcs()
798 return &bp->phylink_usx_pcs; in macb_mac_select_pcs()
800 return &bp->phylink_sgmii_pcs; in macb_mac_select_pcs()
814 dn = of_parse_phandle(dn, "phy-handle", 0); in macb_phy_handle_exists()
821 struct device_node *dn = bp->pdev->dev.of_node; in macb_phylink_connect()
822 struct net_device *dev = bp->dev; in macb_phylink_connect()
827 ret = phylink_of_phy_connect(bp->phylink, dn, 0); in macb_phylink_connect()
830 phydev = phy_find_first(bp->mii_bus); in macb_phylink_connect()
833 return -ENXIO; in macb_phylink_connect()
837 ret = phylink_connect_phy(bp->phylink, phydev); in macb_phylink_connect()
845 phylink_start(bp->phylink); in macb_phylink_connect()
853 struct net_device *ndev = to_net_dev(config->dev); in macb_get_pcs_fixed_state()
856 state->link = (macb_readl(bp, NSR) & MACB_BIT(NSR_LINK)) != 0; in macb_get_pcs_fixed_state()
864 bp->phylink_sgmii_pcs.ops = &macb_phylink_pcs_ops; in macb_mii_probe()
865 bp->phylink_sgmii_pcs.neg_mode = true; in macb_mii_probe()
866 bp->phylink_usx_pcs.ops = &macb_phylink_usx_pcs_ops; in macb_mii_probe()
867 bp->phylink_usx_pcs.neg_mode = true; in macb_mii_probe()
869 bp->phylink_config.dev = &dev->dev; in macb_mii_probe()
870 bp->phylink_config.type = PHYLINK_NETDEV; in macb_mii_probe()
871 bp->phylink_config.mac_managed_pm = true; in macb_mii_probe()
873 if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { in macb_mii_probe()
874 bp->phylink_config.poll_fixed_state = true; in macb_mii_probe()
875 bp->phylink_config.get_fixed_state = macb_get_pcs_fixed_state; in macb_mii_probe()
878 bp->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | in macb_mii_probe()
882 bp->phylink_config.supported_interfaces); in macb_mii_probe()
884 bp->phylink_config.supported_interfaces); in macb_mii_probe()
887 if (macb_is_gem(bp) && (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE)) { in macb_mii_probe()
888 bp->phylink_config.mac_capabilities |= MAC_1000FD; in macb_mii_probe()
889 if (!(bp->caps & MACB_CAPS_NO_GIGABIT_HALF)) in macb_mii_probe()
890 bp->phylink_config.mac_capabilities |= MAC_1000HD; in macb_mii_probe()
893 bp->phylink_config.supported_interfaces); in macb_mii_probe()
894 phy_interface_set_rgmii(bp->phylink_config.supported_interfaces); in macb_mii_probe()
896 if (bp->caps & MACB_CAPS_PCS) in macb_mii_probe()
898 bp->phylink_config.supported_interfaces); in macb_mii_probe()
900 if (bp->caps & MACB_CAPS_HIGH_SPEED) { in macb_mii_probe()
902 bp->phylink_config.supported_interfaces); in macb_mii_probe()
903 bp->phylink_config.mac_capabilities |= MAC_10000FD; in macb_mii_probe()
907 bp->phylink = phylink_create(&bp->phylink_config, bp->pdev->dev.fwnode, in macb_mii_probe()
908 bp->phy_interface, &macb_phylink_ops); in macb_mii_probe()
909 if (IS_ERR(bp->phylink)) { in macb_mii_probe()
911 PTR_ERR(bp->phylink)); in macb_mii_probe()
912 return PTR_ERR(bp->phylink); in macb_mii_probe()
920 struct device_node *child, *np = bp->pdev->dev.of_node; in macb_mdiobus_register()
927 int ret = of_mdiobus_register(bp->mii_bus, child); in macb_mdiobus_register()
934 return mdiobus_register(bp->mii_bus); in macb_mdiobus_register()
948 return of_mdiobus_register(bp->mii_bus, np); in macb_mdiobus_register()
951 return mdiobus_register(bp->mii_bus); in macb_mdiobus_register()
956 int err = -ENXIO; in macb_mii_init()
961 bp->mii_bus = mdiobus_alloc(); in macb_mii_init()
962 if (!bp->mii_bus) { in macb_mii_init()
963 err = -ENOMEM; in macb_mii_init()
967 bp->mii_bus->name = "MACB_mii_bus"; in macb_mii_init()
968 bp->mii_bus->read = &macb_mdio_read_c22; in macb_mii_init()
969 bp->mii_bus->write = &macb_mdio_write_c22; in macb_mii_init()
970 bp->mii_bus->read_c45 = &macb_mdio_read_c45; in macb_mii_init()
971 bp->mii_bus->write_c45 = &macb_mdio_write_c45; in macb_mii_init()
972 snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in macb_mii_init()
973 bp->pdev->name, bp->pdev->id); in macb_mii_init()
974 bp->mii_bus->priv = bp; in macb_mii_init()
975 bp->mii_bus->parent = &bp->pdev->dev; in macb_mii_init()
977 dev_set_drvdata(&bp->dev->dev, bp->mii_bus); in macb_mii_init()
983 err = macb_mii_probe(bp->dev); in macb_mii_init()
990 mdiobus_unregister(bp->mii_bus); in macb_mii_init()
992 mdiobus_free(bp->mii_bus); in macb_mii_init()
999 u32 *p = &bp->hw_stats.macb.rx_pause_frames; in macb_update_stats()
1000 u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1; in macb_update_stats()
1003 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); in macb_update_stats()
1006 *p += bp->macb_reg_readl(bp, offset); in macb_update_stats()
1026 return -ETIMEDOUT; in macb_halt_tx()
1031 if (tx_skb->mapping) { in macb_tx_unmap()
1032 if (tx_skb->mapped_as_page) in macb_tx_unmap()
1033 dma_unmap_page(&bp->pdev->dev, tx_skb->mapping, in macb_tx_unmap()
1034 tx_skb->size, DMA_TO_DEVICE); in macb_tx_unmap()
1036 dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, in macb_tx_unmap()
1037 tx_skb->size, DMA_TO_DEVICE); in macb_tx_unmap()
1038 tx_skb->mapping = 0; in macb_tx_unmap()
1041 if (tx_skb->skb) { in macb_tx_unmap()
1042 napi_consume_skb(tx_skb->skb, budget); in macb_tx_unmap()
1043 tx_skb->skb = NULL; in macb_tx_unmap()
1052 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_set_addr()
1054 desc_64->addrh = upper_32_bits(addr); in macb_set_addr()
1062 desc->addr = lower_32_bits(addr); in macb_set_addr()
1071 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_get_addr()
1073 addr = ((u64)(desc_64->addrh) << 32); in macb_get_addr()
1076 addr |= MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); in macb_get_addr()
1078 if (bp->hw_dma_cap & HW_DMA_CAP_PTP) in macb_get_addr()
1089 struct macb *bp = queue->bp; in macb_tx_error_task()
1096 netdev_vdbg(bp->dev, "macb_tx_error_task: q = %u, t = %u, h = %u\n", in macb_tx_error_task()
1097 (unsigned int)(queue - bp->queues), in macb_tx_error_task()
1098 queue->tx_tail, queue->tx_head); in macb_tx_error_task()
1106 napi_disable(&queue->napi_tx); in macb_tx_error_task()
1107 spin_lock_irqsave(&bp->lock, flags); in macb_tx_error_task()
1110 netif_tx_stop_all_queues(bp->dev); in macb_tx_error_task()
1117 netdev_err(bp->dev, "BUG: halt tx timed out\n"); in macb_tx_error_task()
1125 for (tail = queue->tx_tail; tail != queue->tx_head; tail++) { in macb_tx_error_task()
1129 ctrl = desc->ctrl; in macb_tx_error_task()
1131 skb = tx_skb->skb; in macb_tx_error_task()
1139 skb = tx_skb->skb; in macb_tx_error_task()
1146 netdev_vdbg(bp->dev, "txerr skb %u (data %p) TX complete\n", in macb_tx_error_task()
1148 skb->data); in macb_tx_error_task()
1149 bp->dev->stats.tx_packets++; in macb_tx_error_task()
1150 queue->stats.tx_packets++; in macb_tx_error_task()
1151 bp->dev->stats.tx_bytes += skb->len; in macb_tx_error_task()
1152 queue->stats.tx_bytes += skb->len; in macb_tx_error_task()
1155 /* "Buffers exhausted mid-frame" errors may only happen in macb_tx_error_task()
1160 netdev_err(bp->dev, in macb_tx_error_task()
1161 "BUG: TX buffers exhausted mid-frame\n"); in macb_tx_error_task()
1163 desc->ctrl = ctrl | MACB_BIT(TX_USED); in macb_tx_error_task()
1172 desc->ctrl = MACB_BIT(TX_USED); in macb_tx_error_task()
1178 queue_writel(queue, TBQP, lower_32_bits(queue->tx_ring_dma)); in macb_tx_error_task()
1180 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_tx_error_task()
1181 queue_writel(queue, TBQPH, upper_32_bits(queue->tx_ring_dma)); in macb_tx_error_task()
1184 queue->tx_head = 0; in macb_tx_error_task()
1185 queue->tx_tail = 0; in macb_tx_error_task()
1195 netif_tx_start_all_queues(bp->dev); in macb_tx_error_task()
1198 spin_unlock_irqrestore(&bp->lock, flags); in macb_tx_error_task()
1199 napi_enable(&queue->napi_tx); in macb_tx_error_task()
1209 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) in ptp_one_step_sync()
1221 if (hdr->flag_field[0] & PTP_FLAG_TWOSTEP) in ptp_one_step_sync()
1234 struct macb *bp = queue->bp; in macb_tx_complete()
1235 u16 queue_index = queue - bp->queues; in macb_tx_complete()
1240 spin_lock(&queue->tx_ptr_lock); in macb_tx_complete()
1241 head = queue->tx_head; in macb_tx_complete()
1242 for (tail = queue->tx_tail; tail != head && packets < budget; tail++) { in macb_tx_complete()
1253 ctrl = desc->ctrl; in macb_tx_complete()
1264 skb = tx_skb->skb; in macb_tx_complete()
1268 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && in macb_tx_complete()
1272 netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n", in macb_tx_complete()
1274 skb->data); in macb_tx_complete()
1275 bp->dev->stats.tx_packets++; in macb_tx_complete()
1276 queue->stats.tx_packets++; in macb_tx_complete()
1277 bp->dev->stats.tx_bytes += skb->len; in macb_tx_complete()
1278 queue->stats.tx_bytes += skb->len; in macb_tx_complete()
1294 queue->tx_tail = tail; in macb_tx_complete()
1295 if (__netif_subqueue_stopped(bp->dev, queue_index) && in macb_tx_complete()
1296 CIRC_CNT(queue->tx_head, queue->tx_tail, in macb_tx_complete()
1297 bp->tx_ring_size) <= MACB_TX_WAKEUP_THRESH(bp)) in macb_tx_complete()
1298 netif_wake_subqueue(bp->dev, queue_index); in macb_tx_complete()
1299 spin_unlock(&queue->tx_ptr_lock); in macb_tx_complete()
1309 struct macb *bp = queue->bp; in gem_rx_refill()
1312 while (CIRC_SPACE(queue->rx_prepared_head, queue->rx_tail, in gem_rx_refill()
1313 bp->rx_ring_size) > 0) { in gem_rx_refill()
1314 entry = macb_rx_ring_wrap(bp, queue->rx_prepared_head); in gem_rx_refill()
1321 if (!queue->rx_skbuff[entry]) { in gem_rx_refill()
1323 skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); in gem_rx_refill()
1325 netdev_err(bp->dev, in gem_rx_refill()
1331 paddr = dma_map_single(&bp->pdev->dev, skb->data, in gem_rx_refill()
1332 bp->rx_buffer_size, in gem_rx_refill()
1334 if (dma_mapping_error(&bp->pdev->dev, paddr)) { in gem_rx_refill()
1339 queue->rx_skbuff[entry] = skb; in gem_rx_refill()
1341 if (entry == bp->rx_ring_size - 1) in gem_rx_refill()
1343 desc->ctrl = 0; in gem_rx_refill()
1353 desc->ctrl = 0; in gem_rx_refill()
1355 desc->addr &= ~MACB_BIT(RX_USED); in gem_rx_refill()
1357 queue->rx_prepared_head++; in gem_rx_refill()
1363 netdev_vdbg(bp->dev, "rx ring: queue: %p, prepared head %d, tail %d\n", in gem_rx_refill()
1364 queue, queue->rx_prepared_head, queue->rx_tail); in gem_rx_refill()
1376 desc->addr &= ~MACB_BIT(RX_USED); in discard_partial_frame()
1391 struct macb *bp = queue->bp; in gem_rx()
1403 entry = macb_rx_ring_wrap(bp, queue->rx_tail); in gem_rx()
1409 rxused = (desc->addr & MACB_BIT(RX_USED)) ? true : false; in gem_rx()
1415 /* Ensure ctrl is at least as up-to-date as rxused */ in gem_rx()
1418 ctrl = desc->ctrl; in gem_rx()
1420 queue->rx_tail++; in gem_rx()
1424 netdev_err(bp->dev, in gem_rx()
1426 bp->dev->stats.rx_dropped++; in gem_rx()
1427 queue->stats.rx_dropped++; in gem_rx()
1430 skb = queue->rx_skbuff[entry]; in gem_rx()
1432 netdev_err(bp->dev, in gem_rx()
1434 bp->dev->stats.rx_dropped++; in gem_rx()
1435 queue->stats.rx_dropped++; in gem_rx()
1439 queue->rx_skbuff[entry] = NULL; in gem_rx()
1440 len = ctrl & bp->rx_frm_len_mask; in gem_rx()
1442 netdev_vdbg(bp->dev, "gem_rx %u (len %u)\n", entry, len); in gem_rx()
1445 dma_unmap_single(&bp->pdev->dev, addr, in gem_rx()
1446 bp->rx_buffer_size, DMA_FROM_DEVICE); in gem_rx()
1448 skb->protocol = eth_type_trans(skb, bp->dev); in gem_rx()
1450 if (bp->dev->features & NETIF_F_RXCSUM && in gem_rx()
1451 !(bp->dev->flags & IFF_PROMISC) && in gem_rx()
1453 skb->ip_summed = CHECKSUM_UNNECESSARY; in gem_rx()
1455 bp->dev->stats.rx_packets++; in gem_rx()
1456 queue->stats.rx_packets++; in gem_rx()
1457 bp->dev->stats.rx_bytes += skb->len; in gem_rx()
1458 queue->stats.rx_bytes += skb->len; in gem_rx()
1463 netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", in gem_rx()
1464 skb->len, skb->csum); in gem_rx()
1468 skb->data, 32, true); in gem_rx()
1487 struct macb *bp = queue->bp; in macb_rx_frame()
1490 len = desc->ctrl & bp->rx_frm_len_mask; in macb_rx_frame()
1492 netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", in macb_rx_frame()
1498 * payload word-aligned. in macb_rx_frame()
1504 skb = netdev_alloc_skb(bp->dev, len + NET_IP_ALIGN); in macb_rx_frame()
1506 bp->dev->stats.rx_dropped++; in macb_rx_frame()
1509 desc->addr &= ~MACB_BIT(RX_USED); in macb_rx_frame()
1526 unsigned int frag_len = bp->rx_buffer_size; in macb_rx_frame()
1531 return -1; in macb_rx_frame()
1533 frag_len = len - offset; in macb_rx_frame()
1538 offset += bp->rx_buffer_size; in macb_rx_frame()
1540 desc->addr &= ~MACB_BIT(RX_USED); in macb_rx_frame()
1550 skb->protocol = eth_type_trans(skb, bp->dev); in macb_rx_frame()
1552 bp->dev->stats.rx_packets++; in macb_rx_frame()
1553 bp->dev->stats.rx_bytes += skb->len; in macb_rx_frame()
1554 netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", in macb_rx_frame()
1555 skb->len, skb->csum); in macb_rx_frame()
1563 struct macb *bp = queue->bp; in macb_init_rx_ring()
1568 addr = queue->rx_buffers_dma; in macb_init_rx_ring()
1569 for (i = 0; i < bp->rx_ring_size; i++) { in macb_init_rx_ring()
1572 desc->ctrl = 0; in macb_init_rx_ring()
1573 addr += bp->rx_buffer_size; in macb_init_rx_ring()
1575 desc->addr |= MACB_BIT(RX_WRAP); in macb_init_rx_ring()
1576 queue->rx_tail = 0; in macb_init_rx_ring()
1582 struct macb *bp = queue->bp; in macb_rx()
1586 int first_frag = -1; in macb_rx()
1588 for (tail = queue->rx_tail; budget > 0; tail++) { in macb_rx()
1595 if (!(desc->addr & MACB_BIT(RX_USED))) in macb_rx()
1598 /* Ensure ctrl is at least as up-to-date as addr */ in macb_rx()
1601 ctrl = desc->ctrl; in macb_rx()
1604 if (first_frag != -1) in macb_rx()
1612 if (unlikely(first_frag == -1)) { in macb_rx()
1618 first_frag = -1; in macb_rx()
1625 budget--; in macb_rx()
1634 netdev_err(bp->dev, "RX queue corruption: reset it\n"); in macb_rx()
1636 spin_lock_irqsave(&bp->lock, flags); in macb_rx()
1642 queue_writel(queue, RBQP, queue->rx_ring_dma); in macb_rx()
1646 spin_unlock_irqrestore(&bp->lock, flags); in macb_rx()
1650 if (first_frag != -1) in macb_rx()
1651 queue->rx_tail = first_frag; in macb_rx()
1653 queue->rx_tail = tail; in macb_rx()
1660 struct macb *bp = queue->bp; in macb_rx_pending()
1664 entry = macb_rx_ring_wrap(bp, queue->rx_tail); in macb_rx_pending()
1670 return (desc->addr & MACB_BIT(RX_USED)) != 0; in macb_rx_pending()
1676 struct macb *bp = queue->bp; in macb_rx_poll()
1679 work_done = bp->macbgem_ops.mog_rx(queue, napi, budget); in macb_rx_poll()
1681 netdev_vdbg(bp->dev, "RX poll: queue = %u, work_done = %d, budget = %d\n", in macb_rx_poll()
1682 (unsigned int)(queue - bp->queues), work_done, budget); in macb_rx_poll()
1685 queue_writel(queue, IER, bp->rx_intr_mask); in macb_rx_poll()
1691 * interrupts are re-enabled. in macb_rx_poll()
1698 queue_writel(queue, IDR, bp->rx_intr_mask); in macb_rx_poll()
1699 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_rx_poll()
1701 netdev_vdbg(bp->dev, "poll: packets pending, reschedule\n"); in macb_rx_poll()
1713 struct macb *bp = queue->bp; in macb_tx_restart()
1716 spin_lock(&queue->tx_ptr_lock); in macb_tx_restart()
1718 if (queue->tx_head == queue->tx_tail) in macb_tx_restart()
1723 head_idx = macb_adj_dma_desc_idx(bp, macb_tx_ring_wrap(bp, queue->tx_head)); in macb_tx_restart()
1728 spin_lock_irq(&bp->lock); in macb_tx_restart()
1730 spin_unlock_irq(&bp->lock); in macb_tx_restart()
1733 spin_unlock(&queue->tx_ptr_lock); in macb_tx_restart()
1740 spin_lock(&queue->tx_ptr_lock); in macb_tx_complete_pending()
1741 if (queue->tx_head != queue->tx_tail) { in macb_tx_complete_pending()
1745 if (macb_tx_desc(queue, queue->tx_tail)->ctrl & MACB_BIT(TX_USED)) in macb_tx_complete_pending()
1748 spin_unlock(&queue->tx_ptr_lock); in macb_tx_complete_pending()
1755 struct macb *bp = queue->bp; in macb_tx_poll()
1761 if (queue->txubr_pending) { in macb_tx_poll()
1762 queue->txubr_pending = false; in macb_tx_poll()
1763 netdev_vdbg(bp->dev, "poll: tx restart\n"); in macb_tx_poll()
1767 netdev_vdbg(bp->dev, "TX poll: queue = %u, work_done = %d, budget = %d\n", in macb_tx_poll()
1768 (unsigned int)(queue - bp->queues), work_done, budget); in macb_tx_poll()
1777 * interrupts are re-enabled. in macb_tx_poll()
1785 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_tx_poll()
1787 netdev_vdbg(bp->dev, "TX poll: packets pending, reschedule\n"); in macb_tx_poll()
1798 struct net_device *dev = bp->dev; in macb_hresp_error_task()
1803 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_hresp_error_task()
1804 queue_writel(queue, IDR, bp->rx_intr_mask | in macb_hresp_error_task()
1815 bp->macbgem_ops.mog_init_rings(bp); in macb_hresp_error_task()
1821 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_hresp_error_task()
1823 bp->rx_intr_mask | in macb_hresp_error_task()
1837 struct macb *bp = queue->bp; in macb_wol_interrupt()
1845 spin_lock(&bp->lock); in macb_wol_interrupt()
1850 netdev_vdbg(bp->dev, "MACB WoL: queue = %u, isr = 0x%08lx\n", in macb_wol_interrupt()
1851 (unsigned int)(queue - bp->queues), in macb_wol_interrupt()
1853 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_wol_interrupt()
1855 pm_wakeup_event(&bp->pdev->dev, 0); in macb_wol_interrupt()
1858 spin_unlock(&bp->lock); in macb_wol_interrupt()
1866 struct macb *bp = queue->bp; in gem_wol_interrupt()
1874 spin_lock(&bp->lock); in gem_wol_interrupt()
1879 netdev_vdbg(bp->dev, "GEM WoL: queue = %u, isr = 0x%08lx\n", in gem_wol_interrupt()
1880 (unsigned int)(queue - bp->queues), in gem_wol_interrupt()
1882 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in gem_wol_interrupt()
1884 pm_wakeup_event(&bp->pdev->dev, 0); in gem_wol_interrupt()
1887 spin_unlock(&bp->lock); in gem_wol_interrupt()
1895 struct macb *bp = queue->bp; in macb_interrupt()
1896 struct net_device *dev = bp->dev; in macb_interrupt()
1904 spin_lock(&bp->lock); in macb_interrupt()
1909 queue_writel(queue, IDR, -1); in macb_interrupt()
1910 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1911 queue_writel(queue, ISR, -1); in macb_interrupt()
1915 netdev_vdbg(bp->dev, "queue = %u, isr = 0x%08lx\n", in macb_interrupt()
1916 (unsigned int)(queue - bp->queues), in macb_interrupt()
1919 if (status & bp->rx_intr_mask) { in macb_interrupt()
1926 queue_writel(queue, IDR, bp->rx_intr_mask); in macb_interrupt()
1927 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1930 if (napi_schedule_prep(&queue->napi_rx)) { in macb_interrupt()
1931 netdev_vdbg(bp->dev, "scheduling RX softirq\n"); in macb_interrupt()
1932 __napi_schedule(&queue->napi_rx); in macb_interrupt()
1939 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1944 queue->txubr_pending = true; in macb_interrupt()
1948 if (napi_schedule_prep(&queue->napi_tx)) { in macb_interrupt()
1949 netdev_vdbg(bp->dev, "scheduling TX softirq\n"); in macb_interrupt()
1950 __napi_schedule(&queue->napi_tx); in macb_interrupt()
1956 schedule_work(&queue->tx_error_task); in macb_interrupt()
1958 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1965 * add that if/when we get our hands on a full-blown MII PHY. in macb_interrupt()
1970 * interrupts but it can be cleared by re-enabling RX. See in macb_interrupt()
1981 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1988 bp->hw_stats.gem.rx_overruns++; in macb_interrupt()
1990 bp->hw_stats.macb.rx_overruns++; in macb_interrupt()
1992 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1997 tasklet_schedule(&bp->hresp_err_tasklet); in macb_interrupt()
2000 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
2006 spin_unlock(&bp->lock); in macb_interrupt()
2012 /* Polling receive - used by netconsole and other diagnostic tools
2023 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_poll_controller()
2024 macb_interrupt(dev->irq, queue); in macb_poll_controller()
2035 unsigned int len, entry, i, tx_head = queue->tx_head; in macb_tx_map()
2039 unsigned int f, nr_frags = skb_shinfo(skb)->nr_frags; in macb_tx_map()
2044 if (skb_shinfo(skb)->gso_size != 0) { in macb_tx_map()
2045 if (ip_hdr(skb)->protocol == IPPROTO_UDP) in macb_tx_map()
2046 /* UDP - UFO */ in macb_tx_map()
2049 /* TCP - TSO */ in macb_tx_map()
2053 /* First, map non-paged data */ in macb_tx_map()
2062 tx_skb = &queue->tx_skb[entry]; in macb_tx_map()
2064 mapping = dma_map_single(&bp->pdev->dev, in macb_tx_map()
2065 skb->data + offset, in macb_tx_map()
2067 if (dma_mapping_error(&bp->pdev->dev, mapping)) in macb_tx_map()
2071 tx_skb->skb = NULL; in macb_tx_map()
2072 tx_skb->mapping = mapping; in macb_tx_map()
2073 tx_skb->size = size; in macb_tx_map()
2074 tx_skb->mapped_as_page = false; in macb_tx_map()
2076 len -= size; in macb_tx_map()
2081 size = min(len, bp->max_tx_length); in macb_tx_map()
2086 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; in macb_tx_map()
2091 size = min(len, bp->max_tx_length); in macb_tx_map()
2093 tx_skb = &queue->tx_skb[entry]; in macb_tx_map()
2095 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, in macb_tx_map()
2097 if (dma_mapping_error(&bp->pdev->dev, mapping)) in macb_tx_map()
2101 tx_skb->skb = NULL; in macb_tx_map()
2102 tx_skb->mapping = mapping; in macb_tx_map()
2103 tx_skb->size = size; in macb_tx_map()
2104 tx_skb->mapped_as_page = true; in macb_tx_map()
2106 len -= size; in macb_tx_map()
2115 netdev_err(bp->dev, "BUG! empty skb!\n"); in macb_tx_map()
2120 tx_skb->skb = skb; in macb_tx_map()
2133 desc->ctrl = ctrl; in macb_tx_map()
2138 mss_mfs = skb_shinfo(skb)->gso_size + in macb_tx_map()
2142 mss_mfs = skb_shinfo(skb)->gso_size; in macb_tx_map()
2151 i--; in macb_tx_map()
2153 tx_skb = &queue->tx_skb[entry]; in macb_tx_map()
2156 ctrl = (u32)tx_skb->size; in macb_tx_map()
2161 if (unlikely(entry == (bp->tx_ring_size - 1))) in macb_tx_map()
2165 if (i == queue->tx_head) { in macb_tx_map()
2168 if ((bp->dev->features & NETIF_F_HW_CSUM) && in macb_tx_map()
2169 skb->ip_summed != CHECKSUM_PARTIAL && !lso_ctrl && in macb_tx_map()
2179 macb_set_addr(bp, desc, tx_skb->mapping); in macb_tx_map()
2180 /* desc->addr must be visible to hardware before clearing in macb_tx_map()
2181 * 'TX_USED' bit in desc->ctrl. in macb_tx_map()
2184 desc->ctrl = ctrl; in macb_tx_map()
2185 } while (i != queue->tx_head); in macb_tx_map()
2187 queue->tx_head = tx_head; in macb_tx_map()
2192 netdev_err(bp->dev, "TX DMA map failed\n"); in macb_tx_map()
2194 for (i = queue->tx_head; i != tx_head; i++) { in macb_tx_map()
2213 if (!skb_is_nonlinear(skb) || (ip_hdr(skb)->protocol != IPPROTO_UDP)) in macb_features_check()
2223 if (!IS_ALIGNED(skb_headlen(skb) - hdrlen, MACB_TX_LEN_ALIGN)) in macb_features_check()
2226 nr_frags = skb_shinfo(skb)->nr_frags; in macb_features_check()
2228 nr_frags--; in macb_features_check()
2230 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; in macb_features_check()
2241 if (skb->ip_summed != CHECKSUM_PARTIAL) in macb_clear_csum()
2246 return -1; in macb_clear_csum()
2249 * This is required - at least for Zynq, which otherwise calculates in macb_clear_csum()
2252 *(__sum16 *)(skb_checksum_start(skb) + skb->csum_offset) = 0; in macb_clear_csum()
2260 int padlen = ETH_ZLEN - (*skb)->len; in macb_pad_and_fcs()
2265 if (!(ndev->features & NETIF_F_HW_CSUM) || in macb_pad_and_fcs()
2266 !((*skb)->ip_summed != CHECKSUM_PARTIAL) || in macb_pad_and_fcs()
2267 skb_shinfo(*skb)->gso_size || ptp_one_step_sync(*skb)) in macb_pad_and_fcs()
2285 return -ENOMEM; in macb_pad_and_fcs()
2292 skb_put_zero(*skb, padlen - ETH_FCS_LEN); in macb_pad_and_fcs()
2296 fcs = crc32_le(~0, (*skb)->data, (*skb)->len); in macb_pad_and_fcs()
2311 struct macb_queue *queue = &bp->queues[queue_index]; in macb_start_xmit()
2328 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && in macb_start_xmit()
2329 (bp->hw_dma_cap & HW_DMA_CAP_PTP)) in macb_start_xmit()
2330 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in macb_start_xmit()
2333 is_lso = (skb_shinfo(skb)->gso_size != 0); in macb_start_xmit()
2337 if (ip_hdr(skb)->protocol == IPPROTO_UDP) in macb_start_xmit()
2343 netdev_err(bp->dev, "Error - LSO headers fragmented!!!\n"); in macb_start_xmit()
2348 hdrlen = min(skb_headlen(skb), bp->max_tx_length); in macb_start_xmit()
2351 netdev_vdbg(bp->dev, in macb_start_xmit()
2353 queue_index, skb->len, skb->head, skb->data, in macb_start_xmit()
2356 skb->data, 16, true); in macb_start_xmit()
2365 desc_cnt = DIV_ROUND_UP((skb_headlen(skb) - hdrlen), bp->max_tx_length) + 1; in macb_start_xmit()
2367 desc_cnt = DIV_ROUND_UP(skb_headlen(skb), bp->max_tx_length); in macb_start_xmit()
2368 nr_frags = skb_shinfo(skb)->nr_frags; in macb_start_xmit()
2370 frag_size = skb_frag_size(&skb_shinfo(skb)->frags[f]); in macb_start_xmit()
2371 desc_cnt += DIV_ROUND_UP(frag_size, bp->max_tx_length); in macb_start_xmit()
2374 spin_lock_bh(&queue->tx_ptr_lock); in macb_start_xmit()
2377 if (CIRC_SPACE(queue->tx_head, queue->tx_tail, in macb_start_xmit()
2378 bp->tx_ring_size) < desc_cnt) { in macb_start_xmit()
2380 netdev_dbg(bp->dev, "tx_head = %u, tx_tail = %u\n", in macb_start_xmit()
2381 queue->tx_head, queue->tx_tail); in macb_start_xmit()
2396 spin_lock_irq(&bp->lock); in macb_start_xmit()
2398 spin_unlock_irq(&bp->lock); in macb_start_xmit()
2400 if (CIRC_SPACE(queue->tx_head, queue->tx_tail, bp->tx_ring_size) < 1) in macb_start_xmit()
2404 spin_unlock_bh(&queue->tx_ptr_lock); in macb_start_xmit()
2412 bp->rx_buffer_size = MACB_RX_BUFFER_SIZE; in macb_init_rx_buffer_size()
2414 bp->rx_buffer_size = size; in macb_init_rx_buffer_size()
2416 if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) { in macb_init_rx_buffer_size()
2417 netdev_dbg(bp->dev, in macb_init_rx_buffer_size()
2420 bp->rx_buffer_size = in macb_init_rx_buffer_size()
2421 roundup(bp->rx_buffer_size, RX_BUFFER_MULTIPLE); in macb_init_rx_buffer_size()
2425 netdev_dbg(bp->dev, "mtu [%u] rx_buffer_size [%zu]\n", in macb_init_rx_buffer_size()
2426 bp->dev->mtu, bp->rx_buffer_size); in macb_init_rx_buffer_size()
2438 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_free_rx_buffers()
2439 if (!queue->rx_skbuff) in gem_free_rx_buffers()
2442 for (i = 0; i < bp->rx_ring_size; i++) { in gem_free_rx_buffers()
2443 skb = queue->rx_skbuff[i]; in gem_free_rx_buffers()
2451 dma_unmap_single(&bp->pdev->dev, addr, bp->rx_buffer_size, in gem_free_rx_buffers()
2457 kfree(queue->rx_skbuff); in gem_free_rx_buffers()
2458 queue->rx_skbuff = NULL; in gem_free_rx_buffers()
2464 struct macb_queue *queue = &bp->queues[0]; in macb_free_rx_buffers()
2466 if (queue->rx_buffers) { in macb_free_rx_buffers()
2467 dma_free_coherent(&bp->pdev->dev, in macb_free_rx_buffers()
2468 bp->rx_ring_size * bp->rx_buffer_size, in macb_free_rx_buffers()
2469 queue->rx_buffers, queue->rx_buffers_dma); in macb_free_rx_buffers()
2470 queue->rx_buffers = NULL; in macb_free_rx_buffers()
2480 bp->macbgem_ops.mog_free_rx_buffers(bp); in macb_free_consistent()
2482 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_free_consistent()
2483 kfree(queue->tx_skb); in macb_free_consistent()
2484 queue->tx_skb = NULL; in macb_free_consistent()
2485 if (queue->tx_ring) { in macb_free_consistent()
2486 size = TX_RING_BYTES(bp) + bp->tx_bd_rd_prefetch; in macb_free_consistent()
2487 dma_free_coherent(&bp->pdev->dev, size, in macb_free_consistent()
2488 queue->tx_ring, queue->tx_ring_dma); in macb_free_consistent()
2489 queue->tx_ring = NULL; in macb_free_consistent()
2491 if (queue->rx_ring) { in macb_free_consistent()
2492 size = RX_RING_BYTES(bp) + bp->rx_bd_rd_prefetch; in macb_free_consistent()
2493 dma_free_coherent(&bp->pdev->dev, size, in macb_free_consistent()
2494 queue->rx_ring, queue->rx_ring_dma); in macb_free_consistent()
2495 queue->rx_ring = NULL; in macb_free_consistent()
2506 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_alloc_rx_buffers()
2507 size = bp->rx_ring_size * sizeof(struct sk_buff *); in gem_alloc_rx_buffers()
2508 queue->rx_skbuff = kzalloc(size, GFP_KERNEL); in gem_alloc_rx_buffers()
2509 if (!queue->rx_skbuff) in gem_alloc_rx_buffers()
2510 return -ENOMEM; in gem_alloc_rx_buffers()
2512 netdev_dbg(bp->dev, in gem_alloc_rx_buffers()
2514 bp->rx_ring_size, queue->rx_skbuff); in gem_alloc_rx_buffers()
2521 struct macb_queue *queue = &bp->queues[0]; in macb_alloc_rx_buffers()
2524 size = bp->rx_ring_size * bp->rx_buffer_size; in macb_alloc_rx_buffers()
2525 queue->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, in macb_alloc_rx_buffers()
2526 &queue->rx_buffers_dma, GFP_KERNEL); in macb_alloc_rx_buffers()
2527 if (!queue->rx_buffers) in macb_alloc_rx_buffers()
2528 return -ENOMEM; in macb_alloc_rx_buffers()
2530 netdev_dbg(bp->dev, in macb_alloc_rx_buffers()
2532 size, (unsigned long)queue->rx_buffers_dma, queue->rx_buffers); in macb_alloc_rx_buffers()
2542 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_alloc_consistent()
2543 size = TX_RING_BYTES(bp) + bp->tx_bd_rd_prefetch; in macb_alloc_consistent()
2544 queue->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, in macb_alloc_consistent()
2545 &queue->tx_ring_dma, in macb_alloc_consistent()
2547 if (!queue->tx_ring) in macb_alloc_consistent()
2549 netdev_dbg(bp->dev, in macb_alloc_consistent()
2551 q, size, (unsigned long)queue->tx_ring_dma, in macb_alloc_consistent()
2552 queue->tx_ring); in macb_alloc_consistent()
2554 size = bp->tx_ring_size * sizeof(struct macb_tx_skb); in macb_alloc_consistent()
2555 queue->tx_skb = kmalloc(size, GFP_KERNEL); in macb_alloc_consistent()
2556 if (!queue->tx_skb) in macb_alloc_consistent()
2559 size = RX_RING_BYTES(bp) + bp->rx_bd_rd_prefetch; in macb_alloc_consistent()
2560 queue->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size, in macb_alloc_consistent()
2561 &queue->rx_ring_dma, GFP_KERNEL); in macb_alloc_consistent()
2562 if (!queue->rx_ring) in macb_alloc_consistent()
2564 netdev_dbg(bp->dev, in macb_alloc_consistent()
2566 size, (unsigned long)queue->rx_ring_dma, queue->rx_ring); in macb_alloc_consistent()
2568 if (bp->macbgem_ops.mog_alloc_rx_buffers(bp)) in macb_alloc_consistent()
2575 return -ENOMEM; in macb_alloc_consistent()
2585 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_init_rings()
2586 for (i = 0; i < bp->tx_ring_size; i++) { in gem_init_rings()
2589 desc->ctrl = MACB_BIT(TX_USED); in gem_init_rings()
2591 desc->ctrl |= MACB_BIT(TX_WRAP); in gem_init_rings()
2592 queue->tx_head = 0; in gem_init_rings()
2593 queue->tx_tail = 0; in gem_init_rings()
2595 queue->rx_tail = 0; in gem_init_rings()
2596 queue->rx_prepared_head = 0; in gem_init_rings()
2608 macb_init_rx_ring(&bp->queues[0]); in macb_init_rings()
2610 for (i = 0; i < bp->tx_ring_size; i++) { in macb_init_rings()
2611 desc = macb_tx_desc(&bp->queues[0], i); in macb_init_rings()
2613 desc->ctrl = MACB_BIT(TX_USED); in macb_init_rings()
2615 bp->queues[0].tx_head = 0; in macb_init_rings()
2616 bp->queues[0].tx_tail = 0; in macb_init_rings()
2617 desc->ctrl |= MACB_BIT(TX_WRAP); in macb_init_rings()
2637 macb_writel(bp, TSR, -1); in macb_reset_hw()
2638 macb_writel(bp, RSR, -1); in macb_reset_hw()
2644 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_reset_hw()
2645 queue_writel(queue, IDR, -1); in macb_reset_hw()
2647 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_reset_hw()
2648 queue_writel(queue, ISR, -1); in macb_reset_hw()
2655 unsigned long pclk_hz = clk_get_rate(bp->pclk); in gem_mdc_clk_div()
2685 pclk_hz = clk_get_rate(bp->pclk); in macb_mdc_clk_div()
2719 * - use the correct receive buffer size
2720 * - set best burst length for DMA operations
2722 * - set both rx/tx packet buffers to full memory size
2723 * These are configurable parameters for GEM.
2732 buffer_size = bp->rx_buffer_size / RX_BUFFER_MULTIPLE; in macb_configure_dma()
2734 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); in macb_configure_dma()
2735 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_configure_dma()
2741 if (bp->dma_burst_length) in macb_configure_dma()
2742 dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg); in macb_configure_dma()
2743 dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); in macb_configure_dma()
2746 if (bp->native_io) in macb_configure_dma()
2751 if (bp->dev->features & NETIF_F_HW_CSUM) in macb_configure_dma()
2758 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_configure_dma()
2762 if (bp->hw_dma_cap & HW_DMA_CAP_PTP) in macb_configure_dma()
2765 netdev_dbg(bp->dev, "Cadence configure DMA with 0x%08x\n", in macb_configure_dma()
2781 if (bp->caps & MACB_CAPS_JUMBO) in macb_init_hw()
2785 if (bp->dev->flags & IFF_PROMISC) in macb_init_hw()
2787 else if (macb_is_gem(bp) && bp->dev->features & NETIF_F_RXCSUM) in macb_init_hw()
2789 if (!(bp->dev->flags & IFF_BROADCAST)) in macb_init_hw()
2793 if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) in macb_init_hw()
2794 gem_writel(bp, JML, bp->jumbo_max_len); in macb_init_hw()
2795 bp->rx_frm_len_mask = MACB_RX_FRMLEN_MASK; in macb_init_hw()
2796 if (bp->caps & MACB_CAPS_JUMBO) in macb_init_hw()
2797 bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK; in macb_init_hw()
2802 if (bp->rx_watermark) in macb_init_hw()
2803 gem_writel(bp, PBUFRXCUT, (bp->rx_watermark | GEM_BIT(ENCUTTHRU))); in macb_init_hw()
2862 /* Add multicast addresses to the internal multicast-hash table. */
2874 bitnr = hash_get_index(ha->addr); in macb_sethashtable()
2890 if (dev->flags & IFF_PROMISC) { in macb_set_rx_mode()
2902 if (macb_is_gem(bp) && dev->features & NETIF_F_RXCSUM) in macb_set_rx_mode()
2906 if (dev->flags & IFF_ALLMULTI) { in macb_set_rx_mode()
2908 macb_or_gem_writel(bp, HRB, -1); in macb_set_rx_mode()
2909 macb_or_gem_writel(bp, HRT, -1); in macb_set_rx_mode()
2915 } else if (dev->flags & (~IFF_ALLMULTI)) { in macb_set_rx_mode()
2927 size_t bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + NET_IP_ALIGN; in macb_open()
2933 netdev_dbg(bp->dev, "open\n"); in macb_open()
2935 err = pm_runtime_resume_and_get(&bp->pdev->dev); in macb_open()
2949 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_open()
2950 napi_enable(&queue->napi_rx); in macb_open()
2951 napi_enable(&queue->napi_tx); in macb_open()
2956 err = phy_power_on(bp->sgmii_phy); in macb_open()
2966 if (bp->ptp_info) in macb_open()
2967 bp->ptp_info->ptp_init(dev); in macb_open()
2972 phy_power_off(bp->sgmii_phy); in macb_open()
2976 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_open()
2977 napi_disable(&queue->napi_rx); in macb_open()
2978 napi_disable(&queue->napi_tx); in macb_open()
2982 pm_runtime_put_sync(&bp->pdev->dev); in macb_open()
2995 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_close()
2996 napi_disable(&queue->napi_rx); in macb_close()
2997 napi_disable(&queue->napi_tx); in macb_close()
3000 phylink_stop(bp->phylink); in macb_close()
3001 phylink_disconnect_phy(bp->phylink); in macb_close()
3003 phy_power_off(bp->sgmii_phy); in macb_close()
3005 spin_lock_irqsave(&bp->lock, flags); in macb_close()
3008 spin_unlock_irqrestore(&bp->lock, flags); in macb_close()
3012 if (bp->ptp_info) in macb_close()
3013 bp->ptp_info->ptp_remove(dev); in macb_close()
3015 pm_runtime_put(&bp->pdev->dev); in macb_close()
3023 return -EBUSY; in macb_change_mtu()
3025 dev->mtu = new_mtu; in macb_change_mtu()
3048 u32 *p = &bp->hw_stats.gem.tx_octets_31_0; in gem_update_stats()
3052 u64 val = bp->macb_reg_readl(bp, offset); in gem_update_stats()
3054 bp->ethtool_stats[i] += val; in gem_update_stats()
3059 val = bp->macb_reg_readl(bp, offset + 4); in gem_update_stats()
3060 bp->ethtool_stats[i] += ((u64)val) << 32; in gem_update_stats()
3066 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in gem_update_stats()
3067 for (i = 0, stat = &queue->stats.first; i < QUEUE_STATS_LEN; ++i, ++stat) in gem_update_stats()
3068 bp->ethtool_stats[idx++] = *stat; in gem_update_stats()
3073 struct gem_stats *hwstat = &bp->hw_stats.gem; in gem_get_stats()
3074 struct net_device_stats *nstat = &bp->dev->stats; in gem_get_stats()
3076 if (!netif_running(bp->dev)) in gem_get_stats()
3081 nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors + in gem_get_stats()
3082 hwstat->rx_alignment_errors + in gem_get_stats()
3083 hwstat->rx_resource_errors + in gem_get_stats()
3084 hwstat->rx_overruns + in gem_get_stats()
3085 hwstat->rx_oversize_frames + in gem_get_stats()
3086 hwstat->rx_jabbers + in gem_get_stats()
3087 hwstat->rx_undersized_frames + in gem_get_stats()
3088 hwstat->rx_length_field_frame_errors); in gem_get_stats()
3089 nstat->tx_errors = (hwstat->tx_late_collisions + in gem_get_stats()
3090 hwstat->tx_excessive_collisions + in gem_get_stats()
3091 hwstat->tx_underrun + in gem_get_stats()
3092 hwstat->tx_carrier_sense_errors); in gem_get_stats()
3093 nstat->multicast = hwstat->rx_multicast_frames; in gem_get_stats()
3094 nstat->collisions = (hwstat->tx_single_collision_frames + in gem_get_stats()
3095 hwstat->tx_multiple_collision_frames + in gem_get_stats()
3096 hwstat->tx_excessive_collisions); in gem_get_stats()
3097 nstat->rx_length_errors = (hwstat->rx_oversize_frames + in gem_get_stats()
3098 hwstat->rx_jabbers + in gem_get_stats()
3099 hwstat->rx_undersized_frames + in gem_get_stats()
3100 hwstat->rx_length_field_frame_errors); in gem_get_stats()
3101 nstat->rx_over_errors = hwstat->rx_resource_errors; in gem_get_stats()
3102 nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors; in gem_get_stats()
3103 nstat->rx_frame_errors = hwstat->rx_alignment_errors; in gem_get_stats()
3104 nstat->rx_fifo_errors = hwstat->rx_overruns; in gem_get_stats()
3105 nstat->tx_aborted_errors = hwstat->tx_excessive_collisions; in gem_get_stats()
3106 nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors; in gem_get_stats()
3107 nstat->tx_fifo_errors = hwstat->tx_underrun; in gem_get_stats()
3119 memcpy(data, &bp->ethtool_stats, sizeof(u64) in gem_get_ethtool_stats()
3129 return GEM_STATS_LEN + bp->num_queues * QUEUE_STATS_LEN; in gem_get_sset_count()
3131 return -EOPNOTSUPP; in gem_get_sset_count()
3149 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_get_ethtool_strings()
3163 struct net_device_stats *nstat = &bp->dev->stats; in macb_get_stats()
3164 struct macb_stats *hwstat = &bp->hw_stats.macb; in macb_get_stats()
3173 nstat->rx_errors = (hwstat->rx_fcs_errors + in macb_get_stats()
3174 hwstat->rx_align_errors + in macb_get_stats()
3175 hwstat->rx_resource_errors + in macb_get_stats()
3176 hwstat->rx_overruns + in macb_get_stats()
3177 hwstat->rx_oversize_pkts + in macb_get_stats()
3178 hwstat->rx_jabbers + in macb_get_stats()
3179 hwstat->rx_undersize_pkts + in macb_get_stats()
3180 hwstat->rx_length_mismatch); in macb_get_stats()
3181 nstat->tx_errors = (hwstat->tx_late_cols + in macb_get_stats()
3182 hwstat->tx_excessive_cols + in macb_get_stats()
3183 hwstat->tx_underruns + in macb_get_stats()
3184 hwstat->tx_carrier_errors + in macb_get_stats()
3185 hwstat->sqe_test_errors); in macb_get_stats()
3186 nstat->collisions = (hwstat->tx_single_cols + in macb_get_stats()
3187 hwstat->tx_multiple_cols + in macb_get_stats()
3188 hwstat->tx_excessive_cols); in macb_get_stats()
3189 nstat->rx_length_errors = (hwstat->rx_oversize_pkts + in macb_get_stats()
3190 hwstat->rx_jabbers + in macb_get_stats()
3191 hwstat->rx_undersize_pkts + in macb_get_stats()
3192 hwstat->rx_length_mismatch); in macb_get_stats()
3193 nstat->rx_over_errors = hwstat->rx_resource_errors + in macb_get_stats()
3194 hwstat->rx_overruns; in macb_get_stats()
3195 nstat->rx_crc_errors = hwstat->rx_fcs_errors; in macb_get_stats()
3196 nstat->rx_frame_errors = hwstat->rx_align_errors; in macb_get_stats()
3197 nstat->rx_fifo_errors = hwstat->rx_overruns; in macb_get_stats()
3199 nstat->tx_aborted_errors = hwstat->tx_excessive_cols; in macb_get_stats()
3200 nstat->tx_carrier_errors = hwstat->tx_carrier_errors; in macb_get_stats()
3201 nstat->tx_fifo_errors = hwstat->tx_underruns; in macb_get_stats()
3219 regs->version = (macb_readl(bp, MID) & ((1 << MACB_REV_SIZE) - 1)) in macb_get_regs()
3222 tail = macb_tx_ring_wrap(bp, bp->queues[0].tx_tail); in macb_get_regs()
3223 head = macb_tx_ring_wrap(bp, bp->queues[0].tx_head); in macb_get_regs()
3236 regs_buff[10] = macb_tx_dma(&bp->queues[0], tail); in macb_get_regs()
3237 regs_buff[11] = macb_tx_dma(&bp->queues[0], head); in macb_get_regs()
3239 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) in macb_get_regs()
3249 if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET) { in macb_get_wol()
3250 phylink_ethtool_get_wol(bp->phylink, wol); in macb_get_wol()
3251 wol->supported |= WAKE_MAGIC; in macb_get_wol()
3253 if (bp->wol & MACB_WOL_ENABLED) in macb_get_wol()
3254 wol->wolopts |= WAKE_MAGIC; in macb_get_wol()
3264 ret = phylink_ethtool_set_wol(bp->phylink, wol); in macb_set_wol()
3268 if (!ret || ret != -EOPNOTSUPP) in macb_set_wol()
3271 if (!(bp->wol & MACB_WOL_HAS_MAGIC_PACKET) || in macb_set_wol()
3272 (wol->wolopts & ~WAKE_MAGIC)) in macb_set_wol()
3273 return -EOPNOTSUPP; in macb_set_wol()
3275 if (wol->wolopts & WAKE_MAGIC) in macb_set_wol()
3276 bp->wol |= MACB_WOL_ENABLED; in macb_set_wol()
3278 bp->wol &= ~MACB_WOL_ENABLED; in macb_set_wol()
3280 device_set_wakeup_enable(&bp->pdev->dev, bp->wol & MACB_WOL_ENABLED); in macb_set_wol()
3290 return phylink_ethtool_ksettings_get(bp->phylink, kset); in macb_get_link_ksettings()
3298 return phylink_ethtool_ksettings_set(bp->phylink, kset); in macb_set_link_ksettings()
3308 ring->rx_max_pending = MAX_RX_RING_SIZE; in macb_get_ringparam()
3309 ring->tx_max_pending = MAX_TX_RING_SIZE; in macb_get_ringparam()
3311 ring->rx_pending = bp->rx_ring_size; in macb_get_ringparam()
3312 ring->tx_pending = bp->tx_ring_size; in macb_get_ringparam()
3324 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) in macb_set_ringparam()
3325 return -EINVAL; in macb_set_ringparam()
3327 new_rx_size = clamp_t(u32, ring->rx_pending, in macb_set_ringparam()
3331 new_tx_size = clamp_t(u32, ring->tx_pending, in macb_set_ringparam()
3335 if ((new_tx_size == bp->tx_ring_size) && in macb_set_ringparam()
3336 (new_rx_size == bp->rx_ring_size)) { in macb_set_ringparam()
3341 if (netif_running(bp->dev)) { in macb_set_ringparam()
3343 macb_close(bp->dev); in macb_set_ringparam()
3346 bp->rx_ring_size = new_rx_size; in macb_set_ringparam()
3347 bp->tx_ring_size = new_tx_size; in macb_set_ringparam()
3350 macb_open(bp->dev); in macb_set_ringparam()
3361 tsu_clk = devm_clk_get(&bp->pdev->dev, "tsu_clk"); in gem_get_tsu_rate()
3365 else if (!IS_ERR(bp->pclk)) { in gem_get_tsu_rate()
3366 tsu_clk = bp->pclk; in gem_get_tsu_rate()
3369 return -ENOTSUPP; in gem_get_tsu_rate()
3383 if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0) { in gem_get_ts_info()
3388 info->so_timestamping = in gem_get_ts_info()
3395 info->tx_types = in gem_get_ts_info()
3399 info->rx_filters = in gem_get_ts_info()
3403 info->phc_index = bp->ptp_clock ? ptp_clock_index(bp->ptp_clock) : -1; in gem_get_ts_info()
3424 if (bp->ptp_info) in macb_get_ts_info()
3425 return bp->ptp_info->get_ts_info(netdev, info); in macb_get_ts_info()
3432 struct net_device *netdev = bp->dev; in gem_enable_flow_filters()
3437 if (!(netdev->features & NETIF_F_NTUPLE)) in gem_enable_flow_filters()
3442 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_enable_flow_filters()
3443 struct ethtool_rx_flow_spec *fs = &item->fs; in gem_enable_flow_filters()
3446 if (fs->location >= num_t2_scr) in gem_enable_flow_filters()
3449 t2_scr = gem_readl_n(bp, SCRT2, fs->location); in gem_enable_flow_filters()
3455 tp4sp_m = &(fs->m_u.tcp_ip4_spec); in gem_enable_flow_filters()
3457 if (enable && (tp4sp_m->ip4src == 0xFFFFFFFF)) in gem_enable_flow_filters()
3462 if (enable && (tp4sp_m->ip4dst == 0xFFFFFFFF)) in gem_enable_flow_filters()
3467 if (enable && ((tp4sp_m->psrc == 0xFFFF) || (tp4sp_m->pdst == 0xFFFF))) in gem_enable_flow_filters()
3472 gem_writel_n(bp, SCRT2, fs->location, t2_scr); in gem_enable_flow_filters()
3479 uint16_t index = fs->location; in gem_prog_cmp_regs()
3488 tp4sp_v = &(fs->h_u.tcp_ip4_spec); in gem_prog_cmp_regs()
3489 tp4sp_m = &(fs->m_u.tcp_ip4_spec); in gem_prog_cmp_regs()
3492 if (tp4sp_m->ip4src == 0xFFFFFFFF) { in gem_prog_cmp_regs()
3493 /* 1st compare reg - IP source address */ in gem_prog_cmp_regs()
3496 w0 = tp4sp_v->ip4src; in gem_prog_cmp_regs()
3497 w1 = GEM_BFINS(T2DISMSK, 1, w1); /* 32-bit compare */ in gem_prog_cmp_regs()
3506 if (tp4sp_m->ip4dst == 0xFFFFFFFF) { in gem_prog_cmp_regs()
3507 /* 2nd compare reg - IP destination address */ in gem_prog_cmp_regs()
3510 w0 = tp4sp_v->ip4dst; in gem_prog_cmp_regs()
3511 w1 = GEM_BFINS(T2DISMSK, 1, w1); /* 32-bit compare */ in gem_prog_cmp_regs()
3520 if ((tp4sp_m->psrc == 0xFFFF) || (tp4sp_m->pdst == 0xFFFF)) { in gem_prog_cmp_regs()
3521 /* 3rd compare reg - source port, destination port */ in gem_prog_cmp_regs()
3525 if (tp4sp_m->psrc == tp4sp_m->pdst) { in gem_prog_cmp_regs()
3526 w0 = GEM_BFINS(T2MASK, tp4sp_v->psrc, w0); in gem_prog_cmp_regs()
3527 w0 = GEM_BFINS(T2CMP, tp4sp_v->pdst, w0); in gem_prog_cmp_regs()
3528 w1 = GEM_BFINS(T2DISMSK, 1, w1); /* 32-bit compare */ in gem_prog_cmp_regs()
3532 w1 = GEM_BFINS(T2DISMSK, 0, w1); /* 16-bit compare */ in gem_prog_cmp_regs()
3534 if (tp4sp_m->psrc == 0xFFFF) { /* src port */ in gem_prog_cmp_regs()
3535 w0 = GEM_BFINS(T2CMP, tp4sp_v->psrc, w0); in gem_prog_cmp_regs()
3538 w0 = GEM_BFINS(T2CMP, tp4sp_v->pdst, w0); in gem_prog_cmp_regs()
3548 t2_scr = GEM_BFINS(QUEUE, (fs->ring_cookie) & 0xFF, t2_scr); in gem_prog_cmp_regs()
3563 struct ethtool_rx_flow_spec *fs = &cmd->fs; in gem_add_flow_filter()
3566 int ret = -EINVAL; in gem_add_flow_filter()
3571 return -ENOMEM; in gem_add_flow_filter()
3572 memcpy(&newfs->fs, fs, sizeof(newfs->fs)); in gem_add_flow_filter()
3576 fs->flow_type, (int)fs->ring_cookie, fs->location, in gem_add_flow_filter()
3577 htonl(fs->h_u.tcp_ip4_spec.ip4src), in gem_add_flow_filter()
3578 htonl(fs->h_u.tcp_ip4_spec.ip4dst), in gem_add_flow_filter()
3579 be16_to_cpu(fs->h_u.tcp_ip4_spec.psrc), in gem_add_flow_filter()
3580 be16_to_cpu(fs->h_u.tcp_ip4_spec.pdst)); in gem_add_flow_filter()
3582 spin_lock_irqsave(&bp->rx_fs_lock, flags); in gem_add_flow_filter()
3585 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_add_flow_filter()
3586 if (item->fs.location > newfs->fs.location) { in gem_add_flow_filter()
3587 list_add_tail(&newfs->list, &item->list); in gem_add_flow_filter()
3590 } else if (item->fs.location == fs->location) { in gem_add_flow_filter()
3592 fs->location); in gem_add_flow_filter()
3593 ret = -EBUSY; in gem_add_flow_filter()
3598 list_add_tail(&newfs->list, &bp->rx_fs_list.list); in gem_add_flow_filter()
3601 bp->rx_fs_list.count++; in gem_add_flow_filter()
3605 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_add_flow_filter()
3609 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_add_flow_filter()
3622 spin_lock_irqsave(&bp->rx_fs_lock, flags); in gem_del_flow_filter()
3624 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_del_flow_filter()
3625 if (item->fs.location == cmd->fs.location) { in gem_del_flow_filter()
3627 fs = &(item->fs); in gem_del_flow_filter()
3630 fs->flow_type, (int)fs->ring_cookie, fs->location, in gem_del_flow_filter()
3631 htonl(fs->h_u.tcp_ip4_spec.ip4src), in gem_del_flow_filter()
3632 htonl(fs->h_u.tcp_ip4_spec.ip4dst), in gem_del_flow_filter()
3633 be16_to_cpu(fs->h_u.tcp_ip4_spec.psrc), in gem_del_flow_filter()
3634 be16_to_cpu(fs->h_u.tcp_ip4_spec.pdst)); in gem_del_flow_filter()
3636 gem_writel_n(bp, SCRT2, fs->location, 0); in gem_del_flow_filter()
3638 list_del(&item->list); in gem_del_flow_filter()
3639 bp->rx_fs_list.count--; in gem_del_flow_filter()
3640 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_del_flow_filter()
3646 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_del_flow_filter()
3647 return -EINVAL; in gem_del_flow_filter()
3656 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_get_flow_entry()
3657 if (item->fs.location == cmd->fs.location) { in gem_get_flow_entry()
3658 memcpy(&cmd->fs, &item->fs, sizeof(cmd->fs)); in gem_get_flow_entry()
3662 return -EINVAL; in gem_get_flow_entry()
3672 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_get_all_flow_entries()
3673 if (cnt == cmd->rule_cnt) in gem_get_all_flow_entries()
3674 return -EMSGSIZE; in gem_get_all_flow_entries()
3675 rule_locs[cnt] = item->fs.location; in gem_get_all_flow_entries()
3678 cmd->data = bp->max_tuples; in gem_get_all_flow_entries()
3679 cmd->rule_cnt = cnt; in gem_get_all_flow_entries()
3690 switch (cmd->cmd) { in gem_get_rxnfc()
3692 cmd->data = bp->num_queues; in gem_get_rxnfc()
3695 cmd->rule_cnt = bp->rx_fs_list.count; in gem_get_rxnfc()
3705 "Command parameter %d is not supported\n", cmd->cmd); in gem_get_rxnfc()
3706 ret = -EOPNOTSUPP; in gem_get_rxnfc()
3717 switch (cmd->cmd) { in gem_set_rxnfc()
3719 if ((cmd->fs.location >= bp->max_tuples) in gem_set_rxnfc()
3720 || (cmd->fs.ring_cookie >= bp->num_queues)) { in gem_set_rxnfc()
3721 ret = -EINVAL; in gem_set_rxnfc()
3731 "Command parameter %d is not supported\n", cmd->cmd); in gem_set_rxnfc()
3732 ret = -EOPNOTSUPP; in gem_set_rxnfc()
3774 return -EINVAL; in macb_ioctl()
3776 return phylink_mii_ioctl(bp->phylink, rq, cmd); in macb_ioctl()
3785 return -EINVAL; in macb_hwtstamp_get()
3787 if (!bp->ptp_info) in macb_hwtstamp_get()
3788 return -EOPNOTSUPP; in macb_hwtstamp_get()
3790 return bp->ptp_info->get_hwtst(dev, cfg); in macb_hwtstamp_get()
3800 return -EINVAL; in macb_hwtstamp_set()
3802 if (!bp->ptp_info) in macb_hwtstamp_set()
3803 return -EOPNOTSUPP; in macb_hwtstamp_set()
3805 return bp->ptp_info->set_hwtst(dev, cfg, extack); in macb_hwtstamp_set()
3828 struct net_device *netdev = bp->dev; in macb_set_rxcsum_feature()
3835 if ((features & NETIF_F_RXCSUM) && !(netdev->flags & IFF_PROMISC)) in macb_set_rxcsum_feature()
3856 netdev_features_t changed = features ^ netdev->features; in macb_set_features()
3875 struct net_device *netdev = bp->dev; in macb_restore_features()
3876 netdev_features_t features = netdev->features; in macb_restore_features()
3886 list_for_each_entry(item, &bp->rx_fs_list.list, list) in macb_restore_features()
3887 gem_prog_cmp_regs(bp, &item->fs); in macb_restore_features()
3920 bp->caps = dt_conf->caps; in macb_configure_caps()
3922 if (hw_is_gem(bp->regs, bp->native_io)) { in macb_configure_caps()
3923 bp->caps |= MACB_CAPS_MACB_IS_GEM; in macb_configure_caps()
3927 bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE; in macb_configure_caps()
3929 bp->caps |= MACB_CAPS_PCS; in macb_configure_caps()
3932 bp->caps |= MACB_CAPS_HIGH_SPEED; in macb_configure_caps()
3935 bp->caps |= MACB_CAPS_FIFO_MODE; in macb_configure_caps()
3938 dev_err(&bp->pdev->dev, in macb_configure_caps()
3942 bp->hw_dma_cap |= HW_DMA_CAP_PTP; in macb_configure_caps()
3943 bp->ptp_info = &gem_ptp_info; in macb_configure_caps()
3949 dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); in macb_configure_caps()
3995 pdata = dev_get_platdata(&pdev->dev); in macb_clk_init()
3997 *pclk = pdata->pclk; in macb_clk_init()
3998 *hclk = pdata->hclk; in macb_clk_init()
4000 *pclk = devm_clk_get(&pdev->dev, "pclk"); in macb_clk_init()
4001 *hclk = devm_clk_get(&pdev->dev, "hclk"); in macb_clk_init()
4005 return dev_err_probe(&pdev->dev, in macb_clk_init()
4006 IS_ERR(*pclk) ? PTR_ERR(*pclk) : -ENODEV, in macb_clk_init()
4010 return dev_err_probe(&pdev->dev, in macb_clk_init()
4011 IS_ERR(*hclk) ? PTR_ERR(*hclk) : -ENODEV, in macb_clk_init()
4014 *tx_clk = devm_clk_get_optional(&pdev->dev, "tx_clk"); in macb_clk_init()
4018 *rx_clk = devm_clk_get_optional(&pdev->dev, "rx_clk"); in macb_clk_init()
4022 *tsu_clk = devm_clk_get_optional(&pdev->dev, "tsu_clk"); in macb_clk_init()
4028 dev_err(&pdev->dev, "failed to enable pclk (%d)\n", err); in macb_clk_init()
4034 dev_err(&pdev->dev, "failed to enable hclk (%d)\n", err); in macb_clk_init()
4040 dev_err(&pdev->dev, "failed to enable tx_clk (%d)\n", err); in macb_clk_init()
4046 dev_err(&pdev->dev, "failed to enable rx_clk (%d)\n", err); in macb_clk_init()
4052 dev_err(&pdev->dev, "failed to enable tsu_clk (%d)\n", err); in macb_clk_init()
4082 bp->tx_ring_size = DEFAULT_TX_RING_SIZE; in macb_init()
4083 bp->rx_ring_size = DEFAULT_RX_RING_SIZE; in macb_init()
4090 if (!(bp->queue_mask & (1 << hw_q))) in macb_init()
4093 queue = &bp->queues[q]; in macb_init()
4094 queue->bp = bp; in macb_init()
4095 spin_lock_init(&queue->tx_ptr_lock); in macb_init()
4096 netif_napi_add(dev, &queue->napi_rx, macb_rx_poll); in macb_init()
4097 netif_napi_add(dev, &queue->napi_tx, macb_tx_poll); in macb_init()
4099 queue->ISR = GEM_ISR(hw_q - 1); in macb_init()
4100 queue->IER = GEM_IER(hw_q - 1); in macb_init()
4101 queue->IDR = GEM_IDR(hw_q - 1); in macb_init()
4102 queue->IMR = GEM_IMR(hw_q - 1); in macb_init()
4103 queue->TBQP = GEM_TBQP(hw_q - 1); in macb_init()
4104 queue->RBQP = GEM_RBQP(hw_q - 1); in macb_init()
4105 queue->RBQS = GEM_RBQS(hw_q - 1); in macb_init()
4107 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_init()
4108 queue->TBQPH = GEM_TBQPH(hw_q - 1); in macb_init()
4109 queue->RBQPH = GEM_RBQPH(hw_q - 1); in macb_init()
4114 queue->ISR = MACB_ISR; in macb_init()
4115 queue->IER = MACB_IER; in macb_init()
4116 queue->IDR = MACB_IDR; in macb_init()
4117 queue->IMR = MACB_IMR; in macb_init()
4118 queue->TBQP = MACB_TBQP; in macb_init()
4119 queue->RBQP = MACB_RBQP; in macb_init()
4121 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_init()
4122 queue->TBQPH = MACB_TBQPH; in macb_init()
4123 queue->RBQPH = MACB_RBQPH; in macb_init()
4133 queue->irq = platform_get_irq(pdev, q); in macb_init()
4134 err = devm_request_irq(&pdev->dev, queue->irq, macb_interrupt, in macb_init()
4135 IRQF_SHARED, dev->name, queue); in macb_init()
4137 dev_err(&pdev->dev, in macb_init()
4139 queue->irq, err); in macb_init()
4143 INIT_WORK(&queue->tx_error_task, macb_tx_error_task); in macb_init()
4147 dev->netdev_ops = &macb_netdev_ops; in macb_init()
4151 bp->macbgem_ops.mog_alloc_rx_buffers = gem_alloc_rx_buffers; in macb_init()
4152 bp->macbgem_ops.mog_free_rx_buffers = gem_free_rx_buffers; in macb_init()
4153 bp->macbgem_ops.mog_init_rings = gem_init_rings; in macb_init()
4154 bp->macbgem_ops.mog_rx = gem_rx; in macb_init()
4155 dev->ethtool_ops = &gem_ethtool_ops; in macb_init()
4157 bp->macbgem_ops.mog_alloc_rx_buffers = macb_alloc_rx_buffers; in macb_init()
4158 bp->macbgem_ops.mog_free_rx_buffers = macb_free_rx_buffers; in macb_init()
4159 bp->macbgem_ops.mog_init_rings = macb_init_rings; in macb_init()
4160 bp->macbgem_ops.mog_rx = macb_rx; in macb_init()
4161 dev->ethtool_ops = &macb_ethtool_ops; in macb_init()
4164 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in macb_init()
4167 dev->hw_features = NETIF_F_SG; in macb_init()
4171 dev->hw_features |= MACB_NETIF_LSO; in macb_init()
4174 if (macb_is_gem(bp) && !(bp->caps & MACB_CAPS_FIFO_MODE)) in macb_init()
4175 dev->hw_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM; in macb_init()
4176 if (bp->caps & MACB_CAPS_SG_DISABLED) in macb_init()
4177 dev->hw_features &= ~NETIF_F_SG; in macb_init()
4178 dev->features = dev->hw_features; in macb_init()
4182 * each 4-tuple define requires 1 T2 screener reg + 3 compare regs in macb_init()
4185 bp->max_tuples = min((GEM_BFEXT(SCR2CMP, reg) / 3), in macb_init()
4187 INIT_LIST_HEAD(&bp->rx_fs_list.list); in macb_init()
4188 if (bp->max_tuples > 0) { in macb_init()
4196 dev->hw_features |= NETIF_F_NTUPLE; in macb_init()
4198 bp->rx_fs_list.count = 0; in macb_init()
4199 spin_lock_init(&bp->rx_fs_lock); in macb_init()
4201 bp->max_tuples = 0; in macb_init()
4204 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { in macb_init()
4206 if (phy_interface_mode_is_rgmii(bp->phy_interface)) in macb_init()
4207 val = bp->usrio->rgmii; in macb_init()
4208 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && in macb_init()
4209 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) in macb_init()
4210 val = bp->usrio->rmii; in macb_init()
4211 else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) in macb_init()
4212 val = bp->usrio->mii; in macb_init()
4214 if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) in macb_init()
4215 val |= bp->usrio->refclk; in macb_init()
4223 if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) in macb_init()
4247 struct macb_queue *q = &lp->queues[0]; in at91ether_alloc_coherent()
4249 q->rx_ring = dma_alloc_coherent(&lp->pdev->dev, in at91ether_alloc_coherent()
4252 &q->rx_ring_dma, GFP_KERNEL); in at91ether_alloc_coherent()
4253 if (!q->rx_ring) in at91ether_alloc_coherent()
4254 return -ENOMEM; in at91ether_alloc_coherent()
4256 q->rx_buffers = dma_alloc_coherent(&lp->pdev->dev, in at91ether_alloc_coherent()
4259 &q->rx_buffers_dma, GFP_KERNEL); in at91ether_alloc_coherent()
4260 if (!q->rx_buffers) { in at91ether_alloc_coherent()
4261 dma_free_coherent(&lp->pdev->dev, in at91ether_alloc_coherent()
4264 q->rx_ring, q->rx_ring_dma); in at91ether_alloc_coherent()
4265 q->rx_ring = NULL; in at91ether_alloc_coherent()
4266 return -ENOMEM; in at91ether_alloc_coherent()
4274 struct macb_queue *q = &lp->queues[0]; in at91ether_free_coherent()
4276 if (q->rx_ring) { in at91ether_free_coherent()
4277 dma_free_coherent(&lp->pdev->dev, in at91ether_free_coherent()
4280 q->rx_ring, q->rx_ring_dma); in at91ether_free_coherent()
4281 q->rx_ring = NULL; in at91ether_free_coherent()
4284 if (q->rx_buffers) { in at91ether_free_coherent()
4285 dma_free_coherent(&lp->pdev->dev, in at91ether_free_coherent()
4288 q->rx_buffers, q->rx_buffers_dma); in at91ether_free_coherent()
4289 q->rx_buffers = NULL; in at91ether_free_coherent()
4296 struct macb_queue *q = &lp->queues[0]; in at91ether_start()
4306 addr = q->rx_buffers_dma; in at91ether_start()
4310 desc->ctrl = 0; in at91ether_start()
4315 desc->addr |= MACB_BIT(RX_WRAP); in at91ether_start()
4318 q->rx_tail = 0; in at91ether_start()
4321 macb_writel(lp, RBQP, q->rx_ring_dma); in at91ether_start()
4367 ret = pm_runtime_resume_and_get(&lp->pdev->dev); in at91ether_open()
4392 pm_runtime_put_sync(&lp->pdev->dev); in at91ether_open()
4403 phylink_stop(lp->phylink); in at91ether_close()
4404 phylink_disconnect_phy(lp->phylink); in at91ether_close()
4408 return pm_runtime_put(&lp->pdev->dev); in at91ether_close()
4423 lp->rm9200_txq[desc].skb = skb; in at91ether_start_xmit()
4424 lp->rm9200_txq[desc].size = skb->len; in at91ether_start_xmit()
4425 lp->rm9200_txq[desc].mapping = dma_map_single(&lp->pdev->dev, skb->data, in at91ether_start_xmit()
4426 skb->len, DMA_TO_DEVICE); in at91ether_start_xmit()
4427 if (dma_mapping_error(&lp->pdev->dev, lp->rm9200_txq[desc].mapping)) { in at91ether_start_xmit()
4429 dev->stats.tx_dropped++; in at91ether_start_xmit()
4435 macb_writel(lp, TAR, lp->rm9200_txq[desc].mapping); in at91ether_start_xmit()
4437 macb_writel(lp, TCR, skb->len); in at91ether_start_xmit()
4447 /* Extract received frame from buffer descriptors and sent to upper layers.
4453 struct macb_queue *q = &lp->queues[0]; in at91ether_rx()
4459 desc = macb_rx_desc(q, q->rx_tail); in at91ether_rx()
4460 while (desc->addr & MACB_BIT(RX_USED)) { in at91ether_rx()
4461 p_recv = q->rx_buffers + q->rx_tail * AT91ETHER_MAX_RBUFF_SZ; in at91ether_rx()
4462 pktlen = MACB_BF(RX_FRMLEN, desc->ctrl); in at91ether_rx()
4468 skb->protocol = eth_type_trans(skb, dev); in at91ether_rx()
4469 dev->stats.rx_packets++; in at91ether_rx()
4470 dev->stats.rx_bytes += pktlen; in at91ether_rx()
4473 dev->stats.rx_dropped++; in at91ether_rx()
4476 if (desc->ctrl & MACB_BIT(RX_MHASH_MATCH)) in at91ether_rx()
4477 dev->stats.multicast++; in at91ether_rx()
4480 desc->addr &= ~MACB_BIT(RX_USED); in at91ether_rx()
4483 if (q->rx_tail == AT91ETHER_MAX_RX_DESCR - 1) in at91ether_rx()
4484 q->rx_tail = 0; in at91ether_rx()
4486 q->rx_tail++; in at91ether_rx()
4488 desc = macb_rx_desc(q, q->rx_tail); in at91ether_rx()
4513 dev->stats.tx_errors++; in at91ether_interrupt()
4516 if (lp->rm9200_txq[desc].skb) { in at91ether_interrupt()
4517 dev_consume_skb_irq(lp->rm9200_txq[desc].skb); in at91ether_interrupt()
4518 lp->rm9200_txq[desc].skb = NULL; in at91ether_interrupt()
4519 dma_unmap_single(&lp->pdev->dev, lp->rm9200_txq[desc].mapping, in at91ether_interrupt()
4520 lp->rm9200_txq[desc].size, DMA_TO_DEVICE); in at91ether_interrupt()
4521 dev->stats.tx_packets++; in at91ether_interrupt()
4522 dev->stats.tx_bytes += lp->rm9200_txq[desc].size; in at91ether_interrupt()
4527 /* Work-around for EMAC Errata section 41.3.1 */ in at91ether_interrupt()
4547 at91ether_interrupt(dev->irq, dev); in at91ether_poll_controller()
4579 *pclk = devm_clk_get(&pdev->dev, "ether_clk"); in at91ether_clk_init()
4585 dev_err(&pdev->dev, "failed to enable pclk (%d)\n", err); in at91ether_clk_init()
4598 bp->queues[0].bp = bp; in at91ether_init()
4600 dev->netdev_ops = &at91ether_netdev_ops; in at91ether_init()
4601 dev->ethtool_ops = &macb_ethtool_ops; in at91ether_init()
4603 err = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, in at91ether_init()
4604 0, dev->name, dev); in at91ether_init()
4618 return mgmt->rate; in fu540_macb_tx_recalc_rate()
4651 iowrite32(1, mgmt->reg); in fu540_macb_tx_set_rate()
4653 iowrite32(0, mgmt->reg); in fu540_macb_tx_set_rate()
4654 mgmt->rate = rate; in fu540_macb_tx_set_rate()
4676 mgmt = devm_kzalloc(&pdev->dev, sizeof(*mgmt), GFP_KERNEL); in fu540_c000_clk_init()
4678 err = -ENOMEM; in fu540_c000_clk_init()
4682 init.name = "sifive-gemgxl-mgmt"; in fu540_c000_clk_init()
4687 mgmt->rate = 0; in fu540_c000_clk_init()
4688 mgmt->hw.init = &init; in fu540_c000_clk_init()
4690 *tx_clk = devm_clk_register(&pdev->dev, &mgmt->hw); in fu540_c000_clk_init()
4698 dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err); in fu540_c000_clk_init()
4702 dev_info(&pdev->dev, "Registered clk switch '%s'\n", init.name); in fu540_c000_clk_init()
4715 mgmt->reg = devm_platform_ioremap_resource(pdev, 1); in fu540_c000_init()
4716 if (IS_ERR(mgmt->reg)) in fu540_c000_init()
4717 return PTR_ERR(mgmt->reg); in fu540_c000_init()
4728 if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { in init_reset_optional()
4730 bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); in init_reset_optional()
4732 if (IS_ERR(bp->sgmii_phy)) in init_reset_optional()
4733 return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), in init_reset_optional()
4736 ret = phy_init(bp->sgmii_phy); in init_reset_optional()
4738 return dev_err_probe(&pdev->dev, ret, in init_reset_optional()
4745 ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains", in init_reset_optional()
4748 dev_err(&pdev->dev, "Failed to read power management information\n"); in init_reset_optional()
4763 ret = device_reset_optional(&pdev->dev); in init_reset_optional()
4765 phy_exit(bp->sgmii_phy); in init_reset_optional()
4766 return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); in init_reset_optional()
4773 phy_exit(bp->sgmii_phy); in init_reset_optional()
4929 { .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
4931 { .compatible = "cdns,np4-macb", .data = &np4_config },
4932 { .compatible = "cdns,pc302-gem", .data = &pc302gem_config },
4934 { .compatible = "cdns,sam9x60-macb", .data = &at91sam9260_config },
4935 { .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
4936 { .compatible = "atmel,sama5d29-gem", .data = &sama5d29_config },
4937 { .compatible = "atmel,sama5d3-gem", .data = &sama5d3_config },
4938 { .compatible = "atmel,sama5d3-macb", .data = &sama5d3macb_config },
4939 { .compatible = "atmel,sama5d4-gem", .data = &sama5d4_config },
4940 { .compatible = "cdns,at91rm9200-emac", .data = &emac_config },
4942 { .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config}, /* deprecated */
4943 { .compatible = "cdns,zynq-gem", .data = &zynq_config }, /* deprecated */
4944 { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },
4945 { .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
4946 { .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
4947 { .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
4948 { .compatible = "xlnx,zynqmp-gem", .data = &zynqmp_config},
4949 { .compatible = "xlnx,zynq-gem", .data = &zynq_config },
4950 { .compatible = "xlnx,versal-gem", .data = &versal_config},
4972 struct clk **) = macb_config->clk_init; in macb_probe()
4973 int (*init)(struct platform_device *) = macb_config->init; in macb_probe()
4974 struct device_node *np = pdev->dev.of_node; in macb_probe()
4995 if (match && match->data) { in macb_probe()
4996 macb_config = match->data; in macb_probe()
4997 clk_init = macb_config->clk_init; in macb_probe()
4998 init = macb_config->init; in macb_probe()
5006 pm_runtime_set_autosuspend_delay(&pdev->dev, MACB_PM_TIMEOUT); in macb_probe()
5007 pm_runtime_use_autosuspend(&pdev->dev); in macb_probe()
5008 pm_runtime_get_noresume(&pdev->dev); in macb_probe()
5009 pm_runtime_set_active(&pdev->dev); in macb_probe()
5010 pm_runtime_enable(&pdev->dev); in macb_probe()
5016 err = -ENOMEM; in macb_probe()
5020 dev->base_addr = regs->start; in macb_probe()
5022 SET_NETDEV_DEV(dev, &pdev->dev); in macb_probe()
5025 bp->pdev = pdev; in macb_probe()
5026 bp->dev = dev; in macb_probe()
5027 bp->regs = mem; in macb_probe()
5028 bp->native_io = native_io; in macb_probe()
5030 bp->macb_reg_readl = hw_readl_native; in macb_probe()
5031 bp->macb_reg_writel = hw_writel_native; in macb_probe()
5033 bp->macb_reg_readl = hw_readl; in macb_probe()
5034 bp->macb_reg_writel = hw_writel; in macb_probe()
5036 bp->num_queues = num_queues; in macb_probe()
5037 bp->queue_mask = queue_mask; in macb_probe()
5039 bp->dma_burst_length = macb_config->dma_burst_length; in macb_probe()
5040 bp->pclk = pclk; in macb_probe()
5041 bp->hclk = hclk; in macb_probe()
5042 bp->tx_clk = tx_clk; in macb_probe()
5043 bp->rx_clk = rx_clk; in macb_probe()
5044 bp->tsu_clk = tsu_clk; in macb_probe()
5046 bp->jumbo_max_len = macb_config->jumbo_max_len; in macb_probe()
5048 if (!hw_is_gem(bp->regs, bp->native_io)) in macb_probe()
5049 bp->max_tx_length = MACB_MAX_TX_LEN; in macb_probe()
5050 else if (macb_config->max_tx_length) in macb_probe()
5051 bp->max_tx_length = macb_config->max_tx_length; in macb_probe()
5053 bp->max_tx_length = GEM_MAX_TX_LEN; in macb_probe()
5055 bp->wol = 0; in macb_probe()
5056 if (of_property_read_bool(np, "magic-packet")) in macb_probe()
5057 bp->wol |= MACB_WOL_HAS_MAGIC_PACKET; in macb_probe()
5058 device_set_wakeup_capable(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET); in macb_probe()
5060 bp->usrio = macb_config->usrio; in macb_probe()
5066 err = of_property_read_u32(bp->pdev->dev.of_node, in macb_probe()
5067 "cdns,rx-watermark", in macb_probe()
5068 &bp->rx_watermark); in macb_probe()
5074 wtrmrk_rst_val = (1 << (GEM_BFEXT(RX_PBUF_ADDR, gem_readl(bp, DCFG2)))) - 1; in macb_probe()
5075 if (bp->rx_watermark > wtrmrk_rst_val || !bp->rx_watermark) { in macb_probe()
5076 dev_info(&bp->pdev->dev, "Invalid watermark value\n"); in macb_probe()
5077 bp->rx_watermark = 0; in macb_probe()
5081 spin_lock_init(&bp->lock); in macb_probe()
5088 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44)); in macb_probe()
5089 bp->hw_dma_cap |= HW_DMA_CAP_64B; in macb_probe()
5094 dev->irq = platform_get_irq(pdev, 0); in macb_probe()
5095 if (dev->irq < 0) { in macb_probe()
5096 err = dev->irq; in macb_probe()
5100 /* MTU range: 68 - 1500 or 10240 */ in macb_probe()
5101 dev->min_mtu = GEM_MTU_MIN_SIZE; in macb_probe()
5102 if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) in macb_probe()
5103 dev->max_mtu = bp->jumbo_max_len - ETH_HLEN - ETH_FCS_LEN; in macb_probe()
5105 dev->max_mtu = ETH_DATA_LEN; in macb_probe()
5107 if (bp->caps & MACB_CAPS_BD_RD_PREFETCH) { in macb_probe()
5110 bp->rx_bd_rd_prefetch = (2 << (val - 1)) * in macb_probe()
5115 bp->tx_bd_rd_prefetch = (2 << (val - 1)) * in macb_probe()
5119 bp->rx_intr_mask = MACB_RX_INT_FLAGS; in macb_probe()
5120 if (bp->caps & MACB_CAPS_NEEDS_RSTONUBR) in macb_probe()
5121 bp->rx_intr_mask |= MACB_BIT(RXUBR); in macb_probe()
5123 err = of_get_ethdev_address(np, bp->dev); in macb_probe()
5124 if (err == -EPROBE_DEFER) in macb_probe()
5132 bp->phy_interface = PHY_INTERFACE_MODE_MII; in macb_probe()
5134 bp->phy_interface = interface; in macb_probe()
5149 dev_err(&pdev->dev, "Cannot register net device, aborting.\n"); in macb_probe()
5153 tasklet_setup(&bp->hresp_err_tasklet, macb_hresp_error_task); in macb_probe()
5157 dev->base_addr, dev->irq, dev->dev_addr); in macb_probe()
5159 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_probe()
5160 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_probe()
5165 mdiobus_unregister(bp->mii_bus); in macb_probe()
5166 mdiobus_free(bp->mii_bus); in macb_probe()
5169 phy_exit(bp->sgmii_phy); in macb_probe()
5176 pm_runtime_disable(&pdev->dev); in macb_probe()
5177 pm_runtime_set_suspended(&pdev->dev); in macb_probe()
5178 pm_runtime_dont_use_autosuspend(&pdev->dev); in macb_probe()
5192 phy_exit(bp->sgmii_phy); in macb_remove()
5193 mdiobus_unregister(bp->mii_bus); in macb_remove()
5194 mdiobus_free(bp->mii_bus); in macb_remove()
5197 tasklet_kill(&bp->hresp_err_tasklet); in macb_remove()
5198 pm_runtime_disable(&pdev->dev); in macb_remove()
5199 pm_runtime_dont_use_autosuspend(&pdev->dev); in macb_remove()
5200 if (!pm_runtime_suspended(&pdev->dev)) { in macb_remove()
5201 macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, in macb_remove()
5202 bp->rx_clk, bp->tsu_clk); in macb_remove()
5203 pm_runtime_set_suspended(&pdev->dev); in macb_remove()
5205 phylink_destroy(bp->phylink); in macb_remove()
5219 if (!device_may_wakeup(&bp->dev->dev)) in macb_suspend()
5220 phy_exit(bp->sgmii_phy); in macb_suspend()
5225 if (bp->wol & MACB_WOL_ENABLED) { in macb_suspend()
5226 spin_lock_irqsave(&bp->lock, flags); in macb_suspend()
5228 macb_writel(bp, TSR, -1); in macb_suspend()
5229 macb_writel(bp, RSR, -1); in macb_suspend()
5230 for (q = 0, queue = bp->queues; q < bp->num_queues; in macb_suspend()
5233 queue_writel(queue, IDR, -1); in macb_suspend()
5235 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_suspend()
5236 queue_writel(queue, ISR, -1); in macb_suspend()
5241 devm_free_irq(dev, bp->queues[0].irq, bp->queues); in macb_suspend()
5243 err = devm_request_irq(dev, bp->queues[0].irq, gem_wol_interrupt, in macb_suspend()
5244 IRQF_SHARED, netdev->name, bp->queues); in macb_suspend()
5248 bp->queues[0].irq, err); in macb_suspend()
5249 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5252 queue_writel(bp->queues, IER, GEM_BIT(WOL)); in macb_suspend()
5255 err = devm_request_irq(dev, bp->queues[0].irq, macb_wol_interrupt, in macb_suspend()
5256 IRQF_SHARED, netdev->name, bp->queues); in macb_suspend()
5260 bp->queues[0].irq, err); in macb_suspend()
5261 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5264 queue_writel(bp->queues, IER, MACB_BIT(WOL)); in macb_suspend()
5267 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5269 enable_irq_wake(bp->queues[0].irq); in macb_suspend()
5273 for (q = 0, queue = bp->queues; q < bp->num_queues; in macb_suspend()
5275 napi_disable(&queue->napi_rx); in macb_suspend()
5276 napi_disable(&queue->napi_tx); in macb_suspend()
5279 if (!(bp->wol & MACB_WOL_ENABLED)) { in macb_suspend()
5281 phylink_stop(bp->phylink); in macb_suspend()
5283 spin_lock_irqsave(&bp->lock, flags); in macb_suspend()
5285 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5288 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) in macb_suspend()
5289 bp->pm_data.usrio = macb_or_gem_readl(bp, USRIO); in macb_suspend()
5291 if (netdev->hw_features & NETIF_F_NTUPLE) in macb_suspend()
5292 bp->pm_data.scrt2 = gem_readl_n(bp, ETHT, SCRT2_ETHT); in macb_suspend()
5294 if (bp->ptp_info) in macb_suspend()
5295 bp->ptp_info->ptp_remove(netdev); in macb_suspend()
5311 if (!device_may_wakeup(&bp->dev->dev)) in macb_resume()
5312 phy_init(bp->sgmii_phy); in macb_resume()
5320 if (bp->wol & MACB_WOL_ENABLED) { in macb_resume()
5321 spin_lock_irqsave(&bp->lock, flags); in macb_resume()
5324 queue_writel(bp->queues, IDR, GEM_BIT(WOL)); in macb_resume()
5327 queue_writel(bp->queues, IDR, MACB_BIT(WOL)); in macb_resume()
5331 queue_readl(bp->queues, ISR); in macb_resume()
5332 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_resume()
5333 queue_writel(bp->queues, ISR, -1); in macb_resume()
5335 devm_free_irq(dev, bp->queues[0].irq, bp->queues); in macb_resume()
5336 err = devm_request_irq(dev, bp->queues[0].irq, macb_interrupt, in macb_resume()
5337 IRQF_SHARED, netdev->name, bp->queues); in macb_resume()
5341 bp->queues[0].irq, err); in macb_resume()
5342 spin_unlock_irqrestore(&bp->lock, flags); in macb_resume()
5345 spin_unlock_irqrestore(&bp->lock, flags); in macb_resume()
5347 disable_irq_wake(bp->queues[0].irq); in macb_resume()
5353 phylink_stop(bp->phylink); in macb_resume()
5357 for (q = 0, queue = bp->queues; q < bp->num_queues; in macb_resume()
5359 napi_enable(&queue->napi_rx); in macb_resume()
5360 napi_enable(&queue->napi_tx); in macb_resume()
5363 if (netdev->hw_features & NETIF_F_NTUPLE) in macb_resume()
5364 gem_writel_n(bp, ETHT, SCRT2_ETHT, bp->pm_data.scrt2); in macb_resume()
5366 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) in macb_resume()
5367 macb_or_gem_writel(bp, USRIO, bp->pm_data.usrio); in macb_resume()
5375 phylink_start(bp->phylink); in macb_resume()
5379 if (bp->ptp_info) in macb_resume()
5380 bp->ptp_info->ptp_init(netdev); in macb_resume()
5391 macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, bp->rx_clk, bp->tsu_clk); in macb_runtime_suspend()
5392 else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) in macb_runtime_suspend()
5393 macb_clks_disable(NULL, NULL, NULL, NULL, bp->tsu_clk); in macb_runtime_suspend()
5404 clk_prepare_enable(bp->pclk); in macb_runtime_resume()
5405 clk_prepare_enable(bp->hclk); in macb_runtime_resume()
5406 clk_prepare_enable(bp->tx_clk); in macb_runtime_resume()
5407 clk_prepare_enable(bp->rx_clk); in macb_runtime_resume()
5408 clk_prepare_enable(bp->tsu_clk); in macb_runtime_resume()
5409 } else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) { in macb_runtime_resume()
5410 clk_prepare_enable(bp->tsu_clk); in macb_runtime_resume()