Lines Matching +full:ocelot +full:- +full:1
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include <soc/mscc/ocelot.h>
10 #include <linux/mdio/mdio-mscc-miim.h>
13 #include <linux/pcs-lynx.h>
14 #include <linux/dsa/ocelot.h>
522 [ANA_ANEVENTS_DMAC_LOOKUP] = REG_FIELD(ANA_ANEVENTS, 1, 1),
537 [QSYS_SWITCH_PORT_MODE_TX_PFC_ENA] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 1, 8, 11, 4),
543 [SYS_PAUSE_CFG_PAUSE_STOP] = REG_FIELD_ID(SYS_PAUSE_CFG, 1, 10, 11, 4),
544 [SYS_PAUSE_CFG_PAUSE_ENA] = REG_FIELD_ID(SYS_PAUSE_CFG, 0, 1, 11, 4),
551 [VCAP_ES0_L2_MC] = { 10, 1},
552 [VCAP_ES0_L2_BC] = { 11, 1},
554 [VCAP_ES0_DP] = { 24, 1},
560 [VCAP_ES0_ACT_PUSH_INNER_TAG] = { 2, 1},
562 [VCAP_ES0_ACT_TAG_A_VID_SEL] = { 5, 1},
566 [VCAP_ES0_ACT_TAG_B_VID_SEL] = { 12, 1},
571 [VCAP_ES0_ACT_DEI_A_VAL] = { 32, 1},
574 [VCAP_ES0_ACT_DEI_B_VAL] = { 48, 1},
576 [VCAP_ES0_ACT_HIT_STICKY] = { 73, 1},
580 [VCAP_IS1_HK_TYPE] = { 0, 1},
581 [VCAP_IS1_HK_LOOKUP] = { 1, 2},
585 [VCAP_IS1_HK_L2_MC] = { 24, 1},
586 [VCAP_IS1_HK_L2_BC] = { 25, 1},
587 [VCAP_IS1_HK_IP_MC] = { 26, 1},
588 [VCAP_IS1_HK_VLAN_TAGGED] = { 27, 1},
589 [VCAP_IS1_HK_VLAN_DBL_TAGGED] = { 28, 1},
590 [VCAP_IS1_HK_TPID] = { 29, 1},
592 [VCAP_IS1_HK_DEI] = { 42, 1},
596 [VCAP_IS1_HK_ETYPE_LEN] = { 94, 1},
598 [VCAP_IS1_HK_IP_SNAP] = {111, 1},
599 [VCAP_IS1_HK_IP4] = {112, 1},
600 /* Layer-3 Information */
601 [VCAP_IS1_HK_L3_FRAGMENT] = {113, 1},
602 [VCAP_IS1_HK_L3_FRAG_OFS_GT0] = {114, 1},
603 [VCAP_IS1_HK_L3_OPTIONS] = {115, 1},
606 /* Layer-4 Information */
607 [VCAP_IS1_HK_TCP_UDP] = {154, 1},
608 [VCAP_IS1_HK_TCP] = {155, 1},
612 [VCAP_IS1_HK_IP4_INNER_TPID] = { 46, 1},
614 [VCAP_IS1_HK_IP4_INNER_DEI] = { 59, 1},
616 [VCAP_IS1_HK_IP4_IP4] = { 63, 1},
617 [VCAP_IS1_HK_IP4_L3_FRAGMENT] = { 64, 1},
618 [VCAP_IS1_HK_IP4_L3_FRAG_OFS_GT0] = { 65, 1},
619 [VCAP_IS1_HK_IP4_L3_OPTIONS] = { 66, 1},
624 [VCAP_IS1_HK_IP4_TCP_UDP] = {145, 1},
625 [VCAP_IS1_HK_IP4_TCP] = {146, 1},
631 [VCAP_IS1_ACT_DSCP_ENA] = { 0, 1},
632 [VCAP_IS1_ACT_DSCP_VAL] = { 1, 6},
633 [VCAP_IS1_ACT_QOS_ENA] = { 7, 1},
635 [VCAP_IS1_ACT_DP_ENA] = { 11, 1},
636 [VCAP_IS1_ACT_DP_VAL] = { 12, 1},
640 [VCAP_IS1_ACT_VID_REPLACE_ENA] = { 40, 1},
644 [VCAP_IS1_ACT_PCP_DEI_ENA] = { 68, 1},
646 [VCAP_IS1_ACT_DEI_VAL] = { 72, 1},
647 [VCAP_IS1_ACT_VLAN_POP_CNT_ENA] = { 73, 1},
650 [VCAP_IS1_ACT_HIT_STICKY] = { 80, 1},
656 [VCAP_IS2_HK_FIRST] = { 4, 1},
659 [VCAP_IS2_HK_RSV2] = { 24, 1},
660 [VCAP_IS2_HK_HOST_MATCH] = { 25, 1},
661 [VCAP_IS2_HK_L2_MC] = { 26, 1},
662 [VCAP_IS2_HK_L2_BC] = { 27, 1},
663 [VCAP_IS2_HK_VLAN_TAGGED] = { 28, 1},
665 [VCAP_IS2_HK_DEI] = { 41, 1},
681 [VCAP_IS2_HK_MAC_ARP_ADDR_SPACE_OK] = { 93, 1},
682 [VCAP_IS2_HK_MAC_ARP_PROTO_SPACE_OK] = { 94, 1},
683 [VCAP_IS2_HK_MAC_ARP_LEN_OK] = { 95, 1},
684 [VCAP_IS2_HK_MAC_ARP_TARGET_MATCH] = { 96, 1},
685 [VCAP_IS2_HK_MAC_ARP_SENDER_MATCH] = { 97, 1},
686 [VCAP_IS2_HK_MAC_ARP_OPCODE_UNKNOWN] = { 98, 1},
690 [VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP] = {165, 1},
692 [VCAP_IS2_HK_IP4] = { 45, 1},
693 [VCAP_IS2_HK_L3_FRAGMENT] = { 46, 1},
694 [VCAP_IS2_HK_L3_FRAG_OFS_GT0] = { 47, 1},
695 [VCAP_IS2_HK_L3_OPTIONS] = { 48, 1},
696 [VCAP_IS2_HK_IP4_L3_TTL_GT0] = { 49, 1},
700 [VCAP_IS2_HK_DIP_EQ_SIP] = {122, 1},
702 [VCAP_IS2_HK_TCP] = {123, 1},
706 [VCAP_IS2_HK_L4_SPORT_EQ_DPORT] = {164, 1},
707 [VCAP_IS2_HK_L4_SEQUENCE_EQ0] = {165, 1},
708 [VCAP_IS2_HK_L4_FIN] = {166, 1},
709 [VCAP_IS2_HK_L4_SYN] = {167, 1},
710 [VCAP_IS2_HK_L4_RST] = {168, 1},
711 [VCAP_IS2_HK_L4_PSH] = {169, 1},
712 [VCAP_IS2_HK_L4_ACK] = {170, 1},
713 [VCAP_IS2_HK_L4_URG] = {171, 1},
718 [VCAP_IS2_HK_IP6_L3_TTL_GT0] = { 45, 1},
724 [VCAP_IS2_ACT_HIT_ME_ONCE] = { 0, 1},
725 [VCAP_IS2_ACT_CPU_COPY_ENA] = { 1, 1},
728 [VCAP_IS2_ACT_MIRROR_ENA] = { 7, 1},
729 [VCAP_IS2_ACT_LRN_DIS] = { 8, 1},
730 [VCAP_IS2_ACT_POLICE_ENA] = { 9, 1},
732 [VCAP_IS2_ACT_POLICE_VCAP_ONLY] = { 21, 1},
744 .count = 1,
764 .action_type_width = 1,
785 static int vsc9953_gcb_soft_rst_status(struct ocelot *ocelot) in vsc9953_gcb_soft_rst_status() argument
789 ocelot_field_read(ocelot, GCB_SOFT_RST_SWC_RST, &val); in vsc9953_gcb_soft_rst_status()
794 static int vsc9953_sys_ram_init_status(struct ocelot *ocelot) in vsc9953_sys_ram_init_status() argument
798 ocelot_field_read(ocelot, SYS_RESET_CFG_MEM_INIT, &val); in vsc9953_sys_ram_init_status()
808 static int vsc9953_reset(struct ocelot *ocelot) in vsc9953_reset() argument
812 /* soft-reset the switch core */ in vsc9953_reset()
813 ocelot_field_write(ocelot, GCB_SOFT_RST_SWC_RST, 1); in vsc9953_reset()
815 err = readx_poll_timeout(vsc9953_gcb_soft_rst_status, ocelot, val, !val, in vsc9953_reset()
818 dev_err(ocelot->dev, "timeout: switch core reset\n"); in vsc9953_reset()
823 ocelot_field_write(ocelot, SYS_RESET_CFG_MEM_ENA, 1); in vsc9953_reset()
824 ocelot_field_write(ocelot, SYS_RESET_CFG_MEM_INIT, 1); in vsc9953_reset()
826 err = readx_poll_timeout(vsc9953_sys_ram_init_status, ocelot, val, !val, in vsc9953_reset()
830 dev_err(ocelot->dev, "timeout: switch sram init\n"); in vsc9953_reset()
835 ocelot_field_write(ocelot, SYS_RESET_CFG_CORE_ENA, 1); in vsc9953_reset()
841 * Bit 9: Unit; 0:1, 1:16
842 * Bit 8-0: Value to be multiplied with unit
879 static int vsc9953_mdio_bus_alloc(struct ocelot *ocelot) in vsc9953_mdio_bus_alloc() argument
881 struct felix *felix = ocelot_to_felix(ocelot); in vsc9953_mdio_bus_alloc()
882 struct device *dev = ocelot->dev; in vsc9953_mdio_bus_alloc()
887 felix->pcs = devm_kcalloc(dev, felix->info->num_ports, in vsc9953_mdio_bus_alloc()
890 if (!felix->pcs) { in vsc9953_mdio_bus_alloc()
892 return -ENOMEM; in vsc9953_mdio_bus_alloc()
896 ocelot->targets[GCB], in vsc9953_mdio_bus_alloc()
897 ocelot->map[GCB][GCB_MIIM_MII_STATUS & REG_MASK], in vsc9953_mdio_bus_alloc()
911 felix->imdio = bus; in vsc9953_mdio_bus_alloc()
913 for (port = 0; port < felix->info->num_ports; port++) { in vsc9953_mdio_bus_alloc()
914 struct ocelot_port *ocelot_port = ocelot->ports[port]; in vsc9953_mdio_bus_alloc()
918 if (dsa_is_unused_port(felix->ds, port)) in vsc9953_mdio_bus_alloc()
921 if (ocelot_port->phy_mode == PHY_INTERFACE_MODE_INTERNAL) in vsc9953_mdio_bus_alloc()
924 phylink_pcs = lynx_pcs_create_mdiodev(felix->imdio, addr); in vsc9953_mdio_bus_alloc()
928 felix->pcs[port] = phylink_pcs; in vsc9953_mdio_bus_alloc()
936 static void vsc9953_mdio_bus_free(struct ocelot *ocelot) in vsc9953_mdio_bus_free() argument
938 struct felix *felix = ocelot_to_felix(ocelot); in vsc9953_mdio_bus_free()
941 for (port = 0; port < ocelot->num_phys_ports; port++) { in vsc9953_mdio_bus_free()
942 struct phylink_pcs *phylink_pcs = felix->pcs[port]; in vsc9953_mdio_bus_free()
975 struct ocelot *ocelot; in seville_probe() local
982 err = -ENOMEM; in seville_probe()
983 dev_err(&pdev->dev, "Failed to allocate driver memory\n"); in seville_probe()
989 ocelot = &felix->ocelot; in seville_probe()
990 ocelot->dev = &pdev->dev; in seville_probe()
991 ocelot->num_flooding_pgids = 1; in seville_probe()
992 felix->info = &seville_info_vsc9953; in seville_probe()
996 err = -EINVAL; in seville_probe()
997 dev_err(&pdev->dev, "Invalid resource\n"); in seville_probe()
1000 felix->switch_base = res->start; in seville_probe()
1004 err = -ENOMEM; in seville_probe()
1005 dev_err(&pdev->dev, "Failed to allocate DSA switch\n"); in seville_probe()
1009 ds->dev = &pdev->dev; in seville_probe()
1010 ds->num_ports = felix->info->num_ports; in seville_probe()
1011 ds->ops = &felix_switch_ops; in seville_probe()
1012 ds->priv = ocelot; in seville_probe()
1013 felix->ds = ds; in seville_probe()
1014 felix->tag_proto = DSA_TAG_PROTO_SEVILLE; in seville_probe()
1018 dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); in seville_probe()
1039 dsa_unregister_switch(felix->ds); in seville_remove()
1041 kfree(felix->ds); in seville_remove()
1052 dsa_switch_shutdown(felix->ds); in seville_shutdown()
1058 { .compatible = "mscc,vsc9953-switch" },